Vadim Girlin [2011-11-17 03:33]:
Merge may produce incorrect order of operations for r600-eg:
x: inst1 R0.x, ... ; //from current group
...
t: inst0 R0.x, ... ; //from previous group, same destination
Result of inst1 will be lost.
So compare destinations and don't
Am Mittwoch, 16. November 2011 17:44 CET, Michel Dänzer mic...@daenzer.net
schrieb:
From: Michel Dänzer michel.daen...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/mesa/main/readpix.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git
blinking-teapot is an UBO demo.
---
src/glsl/CMakeLists.txt |1 +
src/glsl/Makefile.am |2 +
src/glsl/blinking-teapot.c| 207 +
src/glsl/blinking-teapot.frag | 31 ++
src/glsl/blinking-teapot.vert | 16 +++
5 files
On Don, 2011-11-17 at 13:45 +0100, Theiss, Ingo wrote:
Hi Michel,
with this patch (b11c167...) I get a regression compared to (4517153...) with
piglit test 'texture-al -auto'.
texture-al: failure with format GL_ALPHA:
expected color = 1, 0.5, 0, 1
result color = 3, 0.501961, 0, 1
On Wed, 16 Nov 2011 11:08:23 -0800, Ian Romanick i...@freedesktop.org wrote:
From: Ian Romanick ian.d.roman...@intel.com
Previously the fixed-function fragment shader was tracked as a
gl_program. This means that it shows up in the driver as a Mesa IR
program instead of as a GLSL IR program.
On Wed, 16 Nov 2011 00:21:59 -0800, Kenneth Graunke kenn...@whitecape.org
wrote:
On 11/15/2011 05:55 PM, Eric Anholt wrote:
This will be used to drive chosing formats and determining framebuffer
completeness, instead of the bunch of ad-hoc checks we have had until
now.
---
On Wed, 16 Nov 2011 01:51:31 -0800 (PST), Jose Fonseca jfons...@vmware.com
wrote:
Neither DX9 or DX10 expose equivalent to GL_RGB16F_ARB:
- http://msdn.microsoft.com/en-us/library/bb172558.aspx (D3D9)
- http://msdn.microsoft.com/en-us/library/bb173059.aspx (D3D10)
So probably no hardware
Mesa 7.11.1 has been released. Mesa 7.11.1 is a bug fix release which
fixes bugs found since the 7.11 release.
The tag in the GIT repository for Mesa 7.11.1 is 'mesa-7.11.1'.
Mesa 7.11.1 is available for download at
ftp://freedesktop.org/pub/mesa/7.11.1/
md5sums:
The special stencil span accessors, as set by intel_span_init_funcs.
perform software W detiling. Since intel_renderbuffer_map() now uses
MapRenderbuffer, rb-Data points to an *untiled* stencil buffer.
Fixes several Piglit tests on gen7.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad
1. Don't map the depthstencil buffer twice
Place a guard in intel_renderbuffer_map() to prevent a renderbuffer
from being mapped twice. This happened if a single buffer was attached to
the framebuffer's depth and stencil attachment points. (Interestingly,
because
The function gathered the stencil buffer into the depth buffer only when
the map mode contained the read bit. But we must do the gather even if the
map mode is write-only. If we do not, then, when the depth buffer's stencil
bits are scattered into the stencil buffer by intel_unmap_renderbuffer(),
A great refactor thrashing begins after this commit for HiZ and separate
stencil. Removing code for texture HiZ will make that refactoring easier,
because then we don't have to maintain that code during the refactor.
To disable HiZ for textures, I've removed the hook in
intel_update_wrapper()
The only user of intel_framebuffer_get_hiz_region() was
intel_framebuffer_has_hiz(). So I folded the body of the former into the
latter.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.h | 20 +++-
1 files changed, 3
Move the following inline functions:
intel_get_rb_region
intel_framebuffer_has_hiz
A future commit will replace the renderbuffer's region with a miptree.
This small refactor will eliminate the need for intel_fbo.h to include
intel_mipmap_tree.h on that commit. I'd like to avoid the
This function creates a miptree that is suitable as storage for
a non-texture renderbuffer.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 21 +
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 15
Essentially, this patch just globally substitutes `irb-region` with
`irb-mt-region` and then does some minor cleanups to avoid segfaults
and other problems.
This is in preparation for
1. Fixing scatter/gather for mipmapped separate stencil textures.
2. Supporting HiZ for mipmapped depth
Extract the body of the inner loop into a new function,
intel_miptree_copy_slice().
This is in preparation for adding support for separate stencil and HiZ to
intel_miptree_copy_teximage(). When copying a slice of a depthstencil
miptree that uses separate stencil, we will also need to copy the
For all texture targets except GL_TEXTURE_CUBE_MAP, the 'nr_images' and
'depth' fields of intel_mipmap_level were identical. In the exceptional
case, nr_images == 6 and depth == 1.
It is simple to determine if a texture is a cube or not, so the presence
of two fields here was not helpful. Worse,
Add two fields to intel_renderbuffer:
mt_level
mt_layer
Multiple renderbuffers may simultaneously wrap a single texture and each
provide a different view into that texture. [Consider
glFramebufferTextureLayer()]. The new fields indicate which slice of the
miptree is wrapped by the
Since the renderbuffer tracks the miptree level and layer that it wraps,
the 'tex_image' and 'zoffset' params are no longer needed to calculate the draw
offsets.
Not only are they no longer needed, but their presence would prevent
calculating the renderbuffer draw offsets in situations where
This is a small helper function that asserts that a given level and layer
are valid for a miptree. I will be extensively using it in the future
miptree HiZ functions.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 13 +
This is in preparation for properly implementing glFramebufferTexture*()
for mipmapped depthstencil textures. The FIXME comments deleted by this
patch give a rough explanation of what was broken.
This refactor does the following:
- In intel_update_wrapper() and intel_wrap_texture(), prepare to
For depthstencil textures using separate stencil, we embedded a stencil
buffer in intel_texture_image. The intention was that the embedded stencil
buffer would be the golden copy of the texture's stencil bits. When
necessary, we scattered/gathered the stencil bits between the texture
miptree and
This is required to correctly implement HiZ for mipmapped and
multi-layered textures.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_misc_state.c |5 +++--
src/mesa/drivers/dri/intel/intel_context.c | 20 ++--
Remove the following functions:
i830_hiz_resolve_noop
i915_hiz_resolve_noop
brw_hiz_resolve_noop
My original strategy for how intel-vtbl.resolve_*buffer was used has
substantially changed. The above functions are no longer called in the
current strategy.
Signed-off-by: Chad Versace
Now that intel_renderbuffer::region has been replaced with a miptree, the
HiZ functions region parameter must be replaced with a miptree parameter.
Change the return type from bool to void.
Rename the 'depth' parameter to 'layer', because it will correspond to
irb-mt_layer.
Signed-off-by: Chad
This is a map of miptree slices to needed resolves, implemented as
a linked list. A future commit will embed such a list in
intel_mipmap_tree.
If you think I'm crazy to put a list in a miptree, read the Doxygen in
this patch for intel_resolve_map.
Signed-off-by: Chad Versace
This is a map of miptree slices to needed resolves.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
Add functions that
- set a miptree slice as needing a resolve
- resolve a single slice of a miptree
- resolve all slices of a miptree
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 118 +++-
Add the following functions:
intel_renderbuffer_resolve_hiz
intel_renderbuffer_resolve_depth
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 63
src/mesa/drivers/dri/intel/intel_fbo.h | 31
brw_context::hiz contains state needed to perform HiZ meta-ops and
indicates if a HiZ operation is currently in progress.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 35 +++
1 files changed, 35
Some state batches also need to be manipulated. That's done in the next
commit.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/gen6_hiz.c | 305 +-
1 files changed, 303 insertions(+), 2 deletions(-)
diff --git
A lot of the state manipulation is handled by the meta-op state setup.
However, some batches need manual intervention.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c |9 -
src/mesa/drivers/dri/i965/gen6_clip_state.c | 17
Before emitting primitives in brw_try_draw_prims(), resolve the depth
buffer's HiZ buffer and resolve the depth buffer of each enabled depth
texture.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c | 73 ++
1
Factor the mapping loops from intelSpanRenderStart() into
intel_span_map_buffers(). This in preparation for the next commit,
which resolves the buffers before mapping.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_span.c | 41
Resolve all buffers that will be mapped by intelSpanRenderStart. This
comprises resolving the depth buffer of each enabled texture and of the
read and draw buffers.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_span.c | 40
After brw_try_draw_prims() emits a batch, mark that the depth buffer needs
a depth resolve if the buffer was written to and if it has an accompanying
HiZ buffer.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c | 23 +++
1
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 21 -
1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_tex.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_tex.c
b/src/mesa/drivers/dri/intel/intel_tex.c
index 505e617..9884a57 100644
---
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index 5b2a7ac..0b6b227 100644
---
When a depth texture is first attached to framebuffer, allocate a HiZ
miptree for it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git
This allows us to replace all the calls to
intel_get_texture_alignment_unit() with a single call at miptree creation.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 26 +++
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_defines.h |9 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |8 ++--
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
For depthstencil renderbuffers, we were using separate stencil only if the
hardware required it. Since the performance gains from HiZ is so high, we
should always use separate stencil if the hardware supports it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
Regresses one Piglit test: glean/fbo.
I'm not enabling HiZ for gen7 yet because it causes a mysterious
performance regression.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
I found the line of code that breaks the test, but don't know how to
easily fix it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git
The two patches tries to fix an issue that happened while calling glDrawPixels
with texture enabled.
Here I attached a piglit testcase for this issue.
Yuanhan Liu (2):
swrast: simplify the prototype of function texture_combine
swrast: fix unmatched span-array-ChanType
Parameter n and rgbaChan are both from structure span, thus using span
as paramter to simplify the prototype. Function texture_combine is only
used by _swrast_texture_span, so I guess it's safe to do so.
This patch is mainly for the next patch.
Signed-off-by: Yuanhan Liu
texture_combine converts the result rgba to CHAN_TYPE from FLOAT. At the
same time, make sure the span-array-ChanType is changed, too.
Signed-off-by: Yuanhan Liu yuanhan@linux.intel.com
---
src/mesa/swrast/s_texcombine.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff
On Fri, Nov 18, 2011 at 03:38:46PM +0800, Yuanhan Liu wrote:
The two patches tries to fix an issue that happened while calling glDrawPixels
with texture enabled.
Here I attached a piglit testcase for this issue.
Yuanhan Liu (2):
swrast: simplify the prototype of function
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