Re: [Mesa-dev] [PATCH 3/9] glsl: Make is_16bit_constant from i965 an ir_constant method.
On 04/07/2014 06:24 AM, Ian Romanick wrote: On 04/06/2014 11:49 PM, Kenneth Graunke wrote: The i965 MUL instruction doesn't natively support 32-bit by 32-bit integer multiplication; additional instructions (MACH/MOV) are required. However, we can avoid those if we know one of the operands can be represented in 16 bits or less. The vector backend's is_16bit_constant static helper function checks for this. In IVB+ the hardware actually does 32-bit by 16-bit to give a 48-bit result (on SNB and earlier it's 16-bit by 16-bit... yay). According to Emil Persson, new generation consoles have similar (but different) integer multiplication issues (see slide 35 from http://www.humus.name/index.php?page=CommentsID=371). Should we expose a lesser precision integer multiply function similar to mul24()? As, say, a GLSL built-in function? Possibly. Presumably our restrictions are different than anyone else's though, and even ours changed between generations. So I wonder if anyone would bother using what we cooked up. Plus, Broadwell just handles this properly, so this really only saves a couple of instructions on old hardware. Obviously, it's not really old, but...by the time we draft a GL extension, implement it, and get people to bother using it in upcoming applications...we'll be down the road a ways. So, I doubt it's really worth doing, but I wouldn't be horribly against it if someone bothered. One big source of integer multiplication is for computing byte offsets into UBOs or other constant buffers. In that case, we're usually scaling by a small constant factor (say, 4 or 16 bytes), which is well covered by our existing optimization. --Ken signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/9] glsl: Make is_16bit_constant from i965 an ir_constant method.
On 04/07/2014 05:41 AM, Ilia Mirkin wrote: On Mon, Apr 7, 2014 at 2:49 AM, Kenneth Graunke kenn...@whitecape.org wrote: The i965 MUL instruction doesn't natively support 32-bit by 32-bit integer multiplication; additional instructions (MACH/MOV) are required. However, we can avoid those if we know one of the operands can be represented in 16 bits or less. The vector backend's is_16bit_constant static helper function checks for this. We want to be able to use it in the scalar backend as well, which means moving the function to a more generally-usable location. Since it isn't i965 specific, I decided to make it an ir_constant method, in case it ends up being useful to other people as well. Signed-off-by: Kenneth Graunke kenn...@whitecape.org --- src/glsl/ir.cpp| 9 + src/glsl/ir.h | 11 +++ src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 18 ++ 3 files changed, 22 insertions(+), 16 deletions(-) diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp index a41eddf..07c0a9b 100644 --- a/src/glsl/ir.cpp +++ b/src/glsl/ir.cpp @@ -1223,6 +1223,15 @@ ir_constant::is_basis() const return ones == 1; } +bool +ir_constant::is_16bit_integer_constant() const Perhaps make this is_uint16_constant? Otherwise one might assume based on the name that it would return true for a value like -1. I like that. I've renamed it to is_uint16_constant and updated the comments to clarify that it can return true for signed values, as long as those values are non-negative and fit in 16-bits. --Ken signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] docs: Expand ARB_gpu_shader5 to describe status of individual features
This extension is a huge grab-bag of stuff that's in DX11. Break it apart to make it clear what still needs to be done. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- docs/GL3.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/docs/GL3.txt b/docs/GL3.txt index bf51e3a..0688977 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -101,6 +101,17 @@ GL 4.0: GL_ARB_draw_buffers_blendDONE (i965, nv50, nvc0, r600, radeonsi, softpipe) GL_ARB_draw_indirect DONE (i965) GL_ARB_gpu_shader5 started + - 'precise' qualifiernot started + - Dynamically uniform sampler array indices not started + - Unrestricted UBO array indices not started + - Implicit signed - unsigned conversionsnot started + - Fused multiply-add DONE + - Packing/bitfield/conversion functions DONE + - Enhanced textureGather DONE + - Geometry shader instancing DONE + - Geometry shader multiple streams not started + - Enhanced per-sample shadingDONE + - Interpolation functionsstarted GL_ARB_gpu_shader_fp64 not started GL_ARB_sample_shadingDONE (i965) GL_ARB_shader_subroutine not started -- 1.9.1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] glsl: Use M_PI_* macros.
Notice our multiple values for M_PI_2, which rounded ...32 up to
...4 and ...5.
---
src/glsl/builtin_functions.cpp | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 26ea923..3991f9d 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -62,6 +62,12 @@
#include program/prog_instruction.h
#include limits
+#define f(x) join(x)
+#define join(x) x ## f
+#define M_PIf f(M_PI)
+#define M_PI_2f f(M_PI_2)
+#define M_PI_4f f(M_PI_4)
+
using namespace ir_builder;
/**
@@ -2538,11 +2544,11 @@ ir_expression *
builtin_builder::asin_expr(ir_variable *x)
{
return mul(sign(x),
- sub(imm(1.5707964f),
+ sub(imm(M_PI_2f),
mul(sqrt(sub(imm(1.0f), abs(x))),
- add(imm(1.5707964f),
+ add(imm(M_PI_2f),
mul(abs(x),
- add(imm(-0.21460183f),
+ add(imm(M_PI_4f - 1.0f),
mul(abs(x),
add(imm(0.086566724f),
mul(abs(x),
imm(-0.03102955f));
@@ -2586,7 +2592,7 @@ builtin_builder::_acos(const glsl_type *type)
ir_variable *x = in_var(type, x);
MAKE_SIG(type, always_available, 1, x);
- body.emit(ret(sub(imm(1.5707964f), asin_expr(x;
+ body.emit(ret(sub(imm(M_PI_2f), asin_expr(x;
return sig;
}
@@ -2623,13 +2629,13 @@ builtin_builder::_atan2(const glsl_type *type)
ir_if *inner_if = new(mem_ctx) ir_if(less(x, imm(0.0f)));
inner_if-then_instructions.push_tail(
if_tree(gequal(y, imm(0.0f)),
- assign(r, add(r, imm(3.141593f))),
- assign(r, sub(r, imm(3.141593f);
+ assign(r, add(r, imm(M_PIf))),
+ assign(r, sub(r, imm(M_PIf);
outer_then.emit(inner_if);
/* Else... */
outer_if-else_instructions.push_tail(
- assign(r, mul(sign(y), imm(1.5707965f;
+ assign(r, mul(sign(y), imm(M_PI_2f;
body.emit(outer_if);
--
1.8.3.2
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Re: [Mesa-dev] [PATCH 9/9] glsl: Convert mul/div by power-of-two factors to shift expressions.
On 04/07/2014 11:00 AM, Matt Turner wrote:
On Sun, Apr 6, 2014 at 11:49 PM, Kenneth Graunke kenn...@whitecape.org
wrote:
Integer shifts are basically always well supported and efficient; that
isn't always true of integer division, and sometimes even integer
multiplication isn't without issues.
On some Intel hardware, INTDIV can't be used in SIMD16 mode. It also
doesn't support immediate operands (on any generation), while ASR can.
On Haswell, this cuts the number of instructions in dolphin/efb2ram by
7.94%. It also removes a single MOV in dolphin/realxfb (due to ASR
supporting immediates), and gains SIMD16 support (due to no INTDIV).
Just a note that the upstream shaders have already been changed to not
do integer division. That's the reason I didn't bother fixing up my
patch a couple of weeks ago.
Sure. I was actually looking at a different program (some webgl demo)
when I started implementing this, though. Seems generally useful.
[snip]
+ ir_constant_data shift_data;
+ for (int i = 0; i const_op-type-vector_elements; i++) {
+ if (const_op-type-base_type == GLSL_TYPE_INT
+ const_op-value.i[i] = 0) {
+ /* Negative values aren't powers of two. */
I was going to comment on the is_power_of_two() function returning
true for 0 and how this was going to break things, but I see this
check for = 0 should handle it.
Right.
I don't know what is_power_of_two() should return for zero. The
comment Negative values would be more correct if we returned false
from is_power_of_two() though.
Not sure either. I just moved the function from i965, and also found
that Gallium's u_math.h has a util_is_power_of_two() function which is
implemented identically - that's actually where the comment comes from.
--Ken
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[Mesa-dev] [PATCH] i915: Fix build error.
is_power_of_two() is now provided by mesa so its definition must be removed
from the i915 driver code.
---
src/mesa/drivers/dri/i915/intel_context.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/intel_context.h
b/src/mesa/drivers/dri/i915/intel_context.h
index 94960f6..fccf821 100644
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ b/src/mesa/drivers/dri/i915/intel_context.h
@@ -504,12 +504,6 @@ intel_context(struct gl_context * ctx)
return (struct intel_context *) ctx;
}
-static INLINE bool
-is_power_of_two(uint32_t value)
-{
- return (value (value - 1)) == 0;
-}
-
#ifdef __cplusplus
}
#endif
--
1.8.3.2
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Re: [Mesa-dev] [PATCH] mesa: add bounds checking to eliminate buffer overrun
On 04/07/2014 09:20 PM, Courtney Goeltzenleuchter wrote:
Decompressing ETC2 textures was causing intermitent segfault
by copying resulting 4x4 texel block to the destination texture
regardless of the size of the destination texture. Issue found
via application crash in GLBenchmark 3.0's Manhattan test.
v2: add more explanatory comments
v3: add bugzilla reference
v4: Correct cc syntax in commit log
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988
Cc: 9.2 10.0 10.1 mesa-sta...@lists.freedesktop.org
---
src/mesa/main/texcompress_etc.c | 49
+
1 file changed, 25 insertions(+), 24 deletions(-)
diff --git a/src/mesa/main/texcompress_etc.c b/src/mesa/main/texcompress_etc.c
index cbda689..39775e2 100644
--- a/src/mesa/main/texcompress_etc.c
+++ b/src/mesa/main/texcompress_etc.c
@@ -683,9 +683,10 @@ etc2_unpack_rgb8(uint8_t *dst_row,
etc2_rgb8_parse_block(block, src,
false /* punchthrough_alpha */);
- for (j = 0; j bh; j++) {
+ /* be sure to stay within the bounds of the texture */
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgb8_fetch_texel(block, i, j, dst,
false /* punchthrough_alpha */);
dst[3] = 255;
@@ -720,9 +721,9 @@ etc2_unpack_srgb8(uint8_t *dst_row,
etc2_rgb8_parse_block(block, src,
false /* punchthrough_alpha */);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgb8_fetch_texel(block, i, j, dst,
false /* punchthrough_alpha */);
/* Convert to MESA_FORMAT_B8G8R8A8_SRGB */
@@ -763,9 +764,9 @@ etc2_unpack_rgba8(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_rgba8_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgba8_fetch_texel(block, i, j, dst);
dst += comps;
}
@@ -800,9 +801,9 @@ etc2_unpack_srgb8_alpha8(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_rgba8_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgba8_fetch_texel(block, i, j, dst);
/* Convert to MESA_FORMAT_B8G8R8A8_SRGB */
@@ -842,9 +843,9 @@ etc2_unpack_r11(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_r11_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps *
comp_size;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_r11_fetch_texel(block, i, j, dst);
dst += comps * comp_size;
}
@@ -878,10 +879,10 @@ etc2_unpack_rg11(uint8_t *dst_row,
/* red component */
etc2_r11_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride +
x * comps * comp_size;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_r11_fetch_texel(block, i, j, dst);
dst += comps * comp_size;
}
@@ -889,10 +890,10 @@ etc2_unpack_rg11(uint8_t *dst_row,
/* green component */
etc2_r11_parse_block(block, src + 8);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride +
x * comps * comp_size;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_r11_fetch_texel(block, i, j, dst + comp_size);
dst += comps * comp_size;
}
@@ -925,10 +926,10 @@ etc2_unpack_signed_r11(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_r11_parse_block(block, src);
- for (j = 0; j bh;
Re: [Mesa-dev] [PATCH] i915: Fix build error.
On 04/08/2014 12:27 AM, Iago Toral Quiroga wrote:
is_power_of_two() is now provided by mesa so its definition must be removed
from the i915 driver code.
---
src/mesa/drivers/dri/i915/intel_context.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/intel_context.h
b/src/mesa/drivers/dri/i915/intel_context.h
index 94960f6..fccf821 100644
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ b/src/mesa/drivers/dri/i915/intel_context.h
@@ -504,12 +504,6 @@ intel_context(struct gl_context * ctx)
return (struct intel_context *) ctx;
}
-static INLINE bool
-is_power_of_two(uint32_t value)
-{
- return (value (value - 1)) == 0;
-}
-
#ifdef __cplusplus
}
#endif
Yikes, sorry. I remembered to build Gallium, but left my
--with-dri-drivers=i965 flag in place. Thanks for the fix.
R-b and pushed.
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[Mesa-dev] [PATCH 0/2] Revert Fix initial MakeCurrent for single-buffer drawables
Thanks for the review Eric. I am attaching reverts for two commits: intel: Fix initial MakeCurrent for single-buffer drawables 11baad35088dfd4bdabc1710df650dbfb413e7a3 i965: Only update renderbuffers on initial intelMakeCurrent 05da4a7a5e7d5bd988cb31f94ed8e1f053d9ee39 The first commit is the one I was reverting in practice with the patch I sent for review. However, I understand that you think we should always call intel_prepare_render in MakeCurrent, unconditionally, and for that we also need to revert the second commit. If that is not what you meant you can simply ignore the second revert. Iago Toral Quiroga (2): Revert intel: Fix initial MakeCurrent for single-buffer drawables Revert i965: Only update renderbuffers on initial intelMakeCurrent src/mesa/drivers/dri/i965/brw_context.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] Revert i965: Only update renderbuffers on initial intelMakeCurrent
This reverts commit 05da4a7a5e7d5bd988cb31f94ed8e1f053d9ee39.
We should always call intel_prepare_render in MakeCurrent.
---
src/mesa/drivers/dri/i965/brw_context.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 7c6281a..1b77541 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -932,7 +932,6 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
if (driContextPriv) {
struct gl_context *ctx = brw-ctx;
struct gl_framebuffer *fb, *readFb;
- struct intel_renderbuffer *rb = NULL;
if (driDrawPriv == NULL driReadPriv == NULL) {
fb = _mesa_get_incomplete_framebuffer();
@@ -940,7 +939,6 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
} else {
fb = driDrawPriv-driverPrivate;
readFb = driReadPriv-driverPrivate;
- rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
driContextPriv-dri2.draw_stamp = driDrawPriv-dri2.stamp - 1;
driContextPriv-dri2.read_stamp = driReadPriv-dri2.stamp - 1;
}
@@ -952,12 +950,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
intel_gles3_srgb_workaround(brw, fb);
intel_gles3_srgb_workaround(brw, readFb);
- if (rb !rb-mt) {
- /* If we don't have buffers for the drawable yet, force a call to
- * getbuffers here so we can have a default drawable size. */
- intel_prepare_render(brw);
- }
-
+ intel_prepare_render(brw);
_mesa_make_current(ctx, fb, readFb);
} else {
_mesa_make_current(NULL, NULL, NULL);
--
1.8.3.2
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[Mesa-dev] [PATCH 1/2] Revert intel: Fix initial MakeCurrent for single-buffer drawables
This reverts commit 11baad35088dfd4bdabc1710df650dbfb413e7a3.
This was producing regressions, at least:
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74005
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77083
---
src/mesa/drivers/dri/i965/brw_context.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index e113654..7c6281a 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -932,6 +932,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
if (driContextPriv) {
struct gl_context *ctx = brw-ctx;
struct gl_framebuffer *fb, *readFb;
+ struct intel_renderbuffer *rb = NULL;
if (driDrawPriv == NULL driReadPriv == NULL) {
fb = _mesa_get_incomplete_framebuffer();
@@ -939,6 +940,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
} else {
fb = driDrawPriv-driverPrivate;
readFb = driReadPriv-driverPrivate;
+ rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
driContextPriv-dri2.draw_stamp = driDrawPriv-dri2.stamp - 1;
driContextPriv-dri2.read_stamp = driReadPriv-dri2.stamp - 1;
}
@@ -950,11 +952,11 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
intel_gles3_srgb_workaround(brw, fb);
intel_gles3_srgb_workaround(brw, readFb);
- /* If the context viewport hasn't been initialized, force a call out to
- * the loader to get buffers so we have a drawable size for the initial
- * viewport. */
- if (!brw-ctx.ViewportInitialized)
+ if (rb !rb-mt) {
+ /* If we don't have buffers for the drawable yet, force a call to
+ * getbuffers here so we can have a default drawable size. */
intel_prepare_render(brw);
+ }
_mesa_make_current(ctx, fb, readFb);
} else {
--
1.8.3.2
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Re: [Mesa-dev] [PATCH V3 15/30] i965: Adjust surface_state emission to account for view parameters
On 04/02/2014 01:05 AM, Chris Forbes wrote: Signed-off-by: Chris Forbes chr...@ijw.co.nz Reviewed-by: Ian Romanick ian.d.roman...@intel.com --- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index b9d6c8b..b6f2cff 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -288,7 +288,7 @@ gen7_update_texture_surface(struct gl_context *ctx, memset(surf, 0, 8 * 4); uint32_t tex_format = translate_tex_format(brw, - mt-format, + intelObj-_Format, sampler-sRGBDecode); if (for_gather tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT) @@ -310,6 +310,11 @@ gen7_update_texture_surface(struct gl_context *ctx, if (mt-logical_depth0 1 tObj-Target != GL_TEXTURE_3D) surf[0] |= GEN7_SURFACE_IS_ARRAY; + /* if this is a view with restricted NumLayers, then +* our effective depth is not just the miptree depth. */ Please put the closing */ on its own line (here and in other patches). + uint32_t effective_depth = (tObj-Immutable tObj-Target != GL_TEXTURE_3D) + ? tObj-NumLayers : mt-logical_depth0; + if (mt-array_spacing_lod0) surf[0] |= GEN7_SURFACE_ARYSPC_LOD0; @@ -317,14 +322,17 @@ gen7_update_texture_surface(struct gl_context *ctx, surf[2] = SET_FIELD(mt-logical_width0 - 1, GEN7_SURFACE_WIDTH) | SET_FIELD(mt-logical_height0 - 1, GEN7_SURFACE_HEIGHT); - surf[3] = SET_FIELD(mt-logical_depth0 - 1, BRW_SURFACE_DEPTH) | + + surf[3] = SET_FIELD(effective_depth - 1, BRW_SURFACE_DEPTH) | (mt-region-pitch - 1); - surf[4] = gen7_surface_msaa_bits(mt-num_samples, mt-msaa_layout); + surf[4] = gen7_surface_msaa_bits(mt-num_samples, mt-msaa_layout) | + SET_FIELD(tObj-MinLayer, GEN7_SURFACE_MIN_ARRAY_ELEMENT); + + surf[4] |= (effective_depth - 1) 7; I'd prefer to get rid of the magic 7...and these could be combined: surf[4] = gen7_surface_msaa_bits(mt-num_samples, mt-msaa_layout) | SET_FIELD(tObj-MinLayer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) | SET_FIELD((effective_depth - 1), GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT); surf[5] = (SET_FIELD(GEN7_MOCS_L3, GEN7_SURFACE_MOCS) | - SET_FIELD(tObj-BaseLevel - mt-first_level, -GEN7_SURFACE_MIN_LOD) | + SET_FIELD(tObj-MinLevel + tObj-BaseLevel - mt-first_level, GEN7_SURFACE_MIN_LOD) | /* mip count */ (intelObj-_MaxLevel - tObj-BaseLevel)); signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V3 07/30] i965: Render R8G8B8X8 as R8G8B8A8
On 04/02/2014 01:05 AM, Chris Forbes wrote: The sampler can handle R8G8B8X8 (and substitute 1.0 for the fourth component) but we can't use it as a render target. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/brw_surface_formats.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index f203f52..3f82f80 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -583,6 +583,9 @@ brw_init_surface_formats(struct brw_context *brw) */ render = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; + case BRW_SURFACEFORMAT_R8G8B8X8_UNORM: + render = BRW_SURFACEFORMAT_R8G8B8A8_UNORM; + break; } rinfo = surface_formats[render]; My x_to_a patches handle this a bit more generally, but they need some reworking, so I'll rebase on this when I get around to respinning them. signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [BUG] mesa/mesa fails to build
Building fails in i830_state.c Broken version: 73f80c20f68cd30421c13da29d7d7801ed096101 Last known good version: 4ccff1499c956b51f18710c7308cbce883f64cd9 In file included from intel_batchbuffer.h:6:0, from i830_state.c:40: intel_context.h:508:1: error: redefinition of 'is_power_of_two' is_power_of_two(uint32_t value) ^ In file included from i830_state.c:31:0: ../../../../../src/mesa/main/macros.h:693:1: note: previous definition of 'is_power_of_two' was here is_power_of_two(unsigned value) ^ Xorg configuration options used during build: --with-dri-drivers=i915 --with-gallium-drivers=i915 --disable-xaa --disable-radeon --enable-gles1 --enable-gles2 --localstatedir=/home/knut/fast/xorg/X11-e/var --enable-config-dbus --with-serverconfig-path=/home/knut/fast/xorg/X11-e/usr/share/X11/xorg.conf.d --enable-xkb --without-xf86misc --without-fontcache --with-fop=no --disable-docs --disable-devel-docs --disable-specs --disable-dependency-tracking --disable-systemd-logind --without-systemd-daemon --with-fc-confdir=/home/knut/fast/xorg/X11-e/etc/fonts cu, Knut ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V3 00/30] ARB_texture_view for i965
On 04/02/2014 01:04 AM, Chris Forbes wrote: This series adds ARB_texture_view support for i965 Gen7/7.5. Significant changes from V2: - All the assorted post-V2 format fixups are moved to the start of the series. This gives us consistent memory layout for all the formats between which we have to support casting. - Texture validation changes are simplified (Eric) - CopyTexSubImage respects view parameters. Series is: Reviewed-by: Kenneth Graunke kenn...@whitecape.org I do think it would be worth trying various benchmarks and games against the series, to see if the RGBA vs. BGRA swizzling issue makes much of a difference. It will probably change some things, but I don't have a good sense of how. I'll also need to port this to Gen8... Nice work, Chris! Thanks for doing this. signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [BUG] mesa/mesa fails to build
Hi Knut, this should be now fixed in master by commit dff3439fef8690192bcc40108729da711fcf706b. Thanks, Iago On Tue, 2014-04-08 at 10:49 +0200, Knut Petersen wrote: Building fails in i830_state.c Broken version: 73f80c20f68cd30421c13da29d7d7801ed096101 Last known good version: 4ccff1499c956b51f18710c7308cbce883f64cd9 In file included from intel_batchbuffer.h:6:0, from i830_state.c:40: intel_context.h:508:1: error: redefinition of 'is_power_of_two' is_power_of_two(uint32_t value) ^ In file included from i830_state.c:31:0: ../../../../../src/mesa/main/macros.h:693:1: note: previous definition of 'is_power_of_two' was here is_power_of_two(unsigned value) ^ Xorg configuration options used during build: --with-dri-drivers=i915 --with-gallium-drivers=i915 --disable-xaa --disable-radeon --enable-gles1 --enable-gles2 --localstatedir=/home/knut/fast/xorg/X11-e/var --enable-config-dbus --with-serverconfig-path=/home/knut/fast/xorg/X11-e/usr/share/X11/xorg.conf.d --enable-xkb --without-xf86misc --without-fontcache --with-fop=no --disable-docs --disable-devel-docs --disable-specs --disable-dependency-tracking --disable-systemd-logind --without-systemd-daemon --with-fc-confdir=/home/knut/fast/xorg/X11-e/etc/fonts cu, Knut ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [BUG] mesa/mesa fails to build
On 04/08/2014 01:49 AM, Knut Petersen wrote: Building fails in i830_state.c Broken version: 73f80c20f68cd30421c13da29d7d7801ed096101 Last known good version: 4ccff1499c956b51f18710c7308cbce883f64cd9 In file included from intel_batchbuffer.h:6:0, from i830_state.c:40: intel_context.h:508:1: error: redefinition of 'is_power_of_two' is_power_of_two(uint32_t value) ^ In file included from i830_state.c:31:0: ../../../../../src/mesa/main/macros.h:693:1: note: previous definition of 'is_power_of_two' was here is_power_of_two(unsigned value) ^ Please re-pull, this was fixed in the very next commit, within 30 minutes of the breakage: commit dff3439fef8690192bcc40108729da711fcf706b (thanks to Iago for fixing it! and, sorry for the breakage.) --Ken signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [BUG] mesa/mesa fails to build
On 08.04.2014 11:27, Kenneth Graunke wrote: On 04/08/2014 01:49 AM, Knut Petersen wrote: Building fails in i830_state.c Broken version: 73f80c20f68cd30421c13da29d7d7801ed096101 Last known good version: 4ccff1499c956b51f18710c7308cbce883f64cd9 In file included from intel_batchbuffer.h:6:0, from i830_state.c:40: intel_context.h:508:1: error: redefinition of 'is_power_of_two' is_power_of_two(uint32_t value) ^ In file included from i830_state.c:31:0: ../../../../../src/mesa/main/macros.h:693:1: note: previous definition of 'is_power_of_two' was here is_power_of_two(unsigned value) ^ Please re-pull, this was fixed in the very next commit, within 30 minutes of the breakage: commit dff3439fef8690192bcc40108729da711fcf706b (thanks to Iago for fixing it! and, sorry for the breakage.) So I had a perfect timing. Fix verified, thanks, Knut --Ken ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 00/18] Implement GL_ARB_multi_bind
On 01/21/2014 03:35 PM, Fredrik Höglund wrote: So here is my take on GL_ARB_multi_bind. I tried to come up with names for the new hash table functions that don't suggest that they should be used to do unlocked insertions/lookups. I'm not entirely happy with the ones I came up with though, so I'm hoping someone will have better suggestions. When binding 32 textures glBindTextures() seems to be about three times faster than calling glActiveTexture() + glBindTexture() in a loop. When binding 4 textures it's about twice as fast. I hope to land this series this week if there are no major issues. Note that I haven't been able to test the glBindImageTextures() implementation. This series is also available at: git://people.freedesktop.org/~fredrik/mesa arb-multi-bind Hi Fredrik, Where are we at with this? It sounds like there were a few review comments and suggestions - were you planning to send out a v2? It would be great to land this. --Ken signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().
This should help prevent situations where we render without proper index
bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455
---
src/mesa/drivers/dri/i965/brw_draw.c | 24 ++--
src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c | 6 ++---
src/mesa/tnl/t_context.c | 2 +-
src/mesa/tnl/t_draw.c| 34 +---
src/mesa/tnl/tnl.h | 9
5 files changed, 27 insertions(+), 48 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index ef0f273..0c131be 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -550,17 +550,6 @@ void brw_draw_prims( struct gl_context *ctx,
return;
}
- /* If we're going to have to upload any of the user's vertex arrays, then
-* get the minimum and maximum of their index buffer so we know what range
-* to upload.
-*/
- if (!index_bounds_valid
- (ctx-RenderMode != GL_RENDER || !vbo_all_varyings_in_vbos(arrays))) {
- perf_debug(Scanning index buffer to compute index buffer bounds.
- Use glDrawRangeElements() to avoid this.\n);
- vbo_get_minmax_indices(ctx, prims, ib, min_index, max_index, nr_prims);
- }
-
/* Do GL_SELECT and GL_FEEDBACK rendering using swrast, even though it
* won't support all the extensions we support.
*/
@@ -569,10 +558,21 @@ void brw_draw_prims( struct gl_context *ctx,
_mesa_lookup_enum_by_nr(ctx-RenderMode));
_swsetup_Wakeup(ctx);
_tnl_wakeup(ctx);
- _tnl_draw_prims(ctx, arrays, prims, nr_prims, ib, min_index, max_index);
+ _tnl_draw_prims(ctx, prims, nr_prims, ib,
+ index_bounds_valid, min_index, max_index, NULL, NULL);
return;
}
+ /* If we're going to have to upload any of the user's vertex arrays, then
+* get the minimum and maximum of their index buffer so we know what range
+* to upload.
+*/
+ if (!index_bounds_valid !vbo_all_varyings_in_vbos(arrays)) {
+ perf_debug(Scanning index buffer to compute index buffer bounds.
+ Use glDrawRangeElements() to avoid this.\n);
+ vbo_get_minmax_indices(ctx, prims, ib, min_index, max_index, nr_prims);
+ }
+
/* Try drawing with the hardware, but don't do anything else if we can't
* manage it. swrast doesn't support our featureset, so we can't fall back
* to it.
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
index dff947a..c85acec 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
@@ -504,9 +504,9 @@ TAG(vbo_check_render_prims)(struct gl_context *ctx,
tfb_vertcount, indirect);
if (nctx-fallback == SWTNL)
- _tnl_vbo_draw_prims(ctx, prims, nr_prims, ib,
- index_bounds_valid, min_index, max_index,
- tfb_vertcount, indirect);
+ _tnl_draw_prims(ctx, prims, nr_prims, ib,
+ index_bounds_valid, min_index, max_index,
+ tfb_vertcount, indirect);
}
void
diff --git a/src/mesa/tnl/t_context.c b/src/mesa/tnl/t_context.c
index 134f699..eb5bae4 100644
--- a/src/mesa/tnl/t_context.c
+++ b/src/mesa/tnl/t_context.c
@@ -93,7 +93,7 @@ _tnl_CreateContext( struct gl_context *ctx )
}
/* plug in the VBO drawing function */
- vbo_set_draw_func(ctx, _tnl_vbo_draw_prims);
+ vbo_set_draw_func(ctx, _tnl_draw_prims);
_math_init_transformation();
_math_init_translate();
diff --git a/src/mesa/tnl/t_draw.c b/src/mesa/tnl/t_draw.c
index 2755ae6..be3f059 100644
--- a/src/mesa/tnl/t_draw.c
+++ b/src/mesa/tnl/t_draw.c
@@ -411,7 +411,11 @@ static void unmap_vbos( struct gl_context *ctx,
}
-void _tnl_vbo_draw_prims(struct gl_context *ctx,
+/* This is the main entrypoint into the slimmed-down software tnl
+ * module. In a regular swtnl driver, this can be plugged straight
+ * into the vbo-Driver.DrawPrims() callback.
+ */
+void _tnl_draw_prims(struct gl_context *ctx,
const struct _mesa_prim *prim,
GLuint nr_prims,
const struct _mesa_index_buffer *ib,
@@ -421,32 +425,16 @@ void _tnl_vbo_draw_prims(struct gl_context *ctx,
struct gl_transform_feedback_object *tfb_vertcount,
struct gl_buffer_object *indirect)
{
- const struct gl_client_array **arrays = ctx-Array._DrawArrays;
-
- if (!index_bounds_valid)
- vbo_get_minmax_indices(ctx, prim, ib, min_index, max_index, nr_prims);
-
- _tnl_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
-}
-
-/* This is the main entrypoint into the slimmed-down software tnl
- * module. In a regular
Re: [Mesa-dev] [PATCH 1/4] xa: handle solid-fill src/mask
btw, I think I've tracked down at least one of the rendercheck issues I was having. Which seems to be a pre-existing condition. The problem is a composite operation with xrgb src and a8 dst. Ends up generating a shader along the lines of: 0: TEX TEMP[0], IN[0], SAMP[0], 2D 1: MOV TEMP[0].w, IMM[..] 2: MOV OUT[0], TEMP[0]. 3: END in this case, my compiler optimizes out the texture fetch. But that causes a bit of confusion in freedreno because half the driver thinks there is a texture and sets things up accordingly. I'm not entirely sure if XA should detect this.. or if that should be fixed in the driver.. BR, -R On Thu, Apr 3, 2014 at 10:53 AM, Brian Paul bri...@vmware.com wrote: On 04/03/2014 08:41 AM, Brian Paul wrote: On 04/03/2014 08:13 AM, Rob Clark wrote: On Thu, Apr 3, 2014 at 10:07 AM, Brian Paul bri...@vmware.com wrote: On 04/02/2014 11:17 PM, Thomas Hellstrom wrote: On 04/01/2014 05:04 PM, Rob Clark wrote: From: Rob Clark robcl...@freedesktop.org Add support to property handle solid-fill src and/or mask. Without this we fallback to sw a lot for common things like text rendering. Signed-off-by: Rob Clark robcl...@freedesktop.org --- src/gallium/state_trackers/xa/xa_composite.c | 88 src/gallium/state_trackers/xa/xa_priv.h | 7 +- src/gallium/state_trackers/xa/xa_renderer.c | 289 --- src/gallium/state_trackers/xa/xa_tgsi.c | 31 ++- 4 files changed, 242 insertions(+), 173 deletions(-) Rob, While testing this patch it looks like we sometimes set two samplers, and the first one is NULL. The SVGA driver asserts on that condition. We might need to move the active sampler to the first entry in that case, and adjust tex coords and shader accordingly. I'll discuss with BrianP. I think the root problem is a disagreement between texture samplers and sampler views. If a texture sampler is non-null, the corresponding sampler view be should be non-null too, and vice versa. We're tripping over an assertion when a a sampler view is non-null but the corresponding sampler is NULL. Right.. Well, I think it would be not to hard to make things always start with SAMP[0], which would avoid this. But I am pretty fuzzy about whether it is the driver or state tracker that is wrong here.. I started with the assumption that it was just a freedreno bug, but if it causes problem w/ vmware too, then maybe the state tracker is at fault. I believe the general policy is that drivers can assume they're being passed valid input and consistent state. State trackers shouldn't pass inconsistent state to drivers. In this case, the number of texture samplers and sampler views is inconsistent. The drivers could examine the current shader to determine which samplers/views are actually used (which might be a subset of what was specified by the state tracker). But that's extra work that all drivers would have to implement. It seems much more economical to take care of this in the state trackers. Though, with the DX10-level SAMPLE instructions, samplers and sampler views really are independent so the number could be different there. But with TEX instructions, the numbers should be the same. -Brian ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/vec4: fix record clearing in copy propagation
On Tue, Apr 8, 2014 at 2:52 AM, Eric Anholt e...@anholt.net wrote: Chia-I Wu olva...@gmail.com writes: From: Chia-I Wu o...@lunarg.com Given mov vgrf7, vgrf9.xyxz add vgrf9.xyz, vgrf4.xyzw, vgrf5.xyzw add vgrf10.x, vgrf6.xyzw, vgrf7. the last instruction would be wrongly changed to add vgrf10.x, vgrf6.xyzw, vgrf9. during copy propagation. The issue is that when deciding if a record should be cleared, the old code checked for inst-dst.writemask (1 ch) instead of inst-dst.writemask (1 BRW_GET_SWZ(src-swizzle, ch)) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749 Signed-off-by: Chia-I Wu o...@lunarg.com Cc: Jordan Justen jljus...@gmail.com Cc: Matt Turner matts...@gmail.com Reviewed-by: Eric Anholt e...@anholt.net I've just sent a patch for adding a unit test of copy propagation -- it would be nice to see an additional test on top of that for this bug. Nice. I will do that maybe tomorrow. -- o...@lunarg.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().
It looks like i965 was the only thing directly calling _tnl_draw_prims
without going through _tnl_vbo_draw_prims. That was a good suggestion,
Eric.
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
On 04/08/2014 04:01 AM, Iago Toral Quiroga wrote:
This should help prevent situations where we render without proper index
bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455
---
src/mesa/drivers/dri/i965/brw_draw.c | 24 ++--
src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c | 6 ++---
src/mesa/tnl/t_context.c | 2 +-
src/mesa/tnl/t_draw.c| 34
+---
src/mesa/tnl/tnl.h | 9
5 files changed, 27 insertions(+), 48 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index ef0f273..0c131be 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -550,17 +550,6 @@ void brw_draw_prims( struct gl_context *ctx,
return;
}
- /* If we're going to have to upload any of the user's vertex arrays, then
-* get the minimum and maximum of their index buffer so we know what range
-* to upload.
-*/
- if (!index_bounds_valid
- (ctx-RenderMode != GL_RENDER || !vbo_all_varyings_in_vbos(arrays))) {
- perf_debug(Scanning index buffer to compute index buffer bounds.
- Use glDrawRangeElements() to avoid this.\n);
- vbo_get_minmax_indices(ctx, prims, ib, min_index, max_index,
nr_prims);
- }
-
/* Do GL_SELECT and GL_FEEDBACK rendering using swrast, even though it
* won't support all the extensions we support.
*/
@@ -569,10 +558,21 @@ void brw_draw_prims( struct gl_context *ctx,
_mesa_lookup_enum_by_nr(ctx-RenderMode));
_swsetup_Wakeup(ctx);
_tnl_wakeup(ctx);
- _tnl_draw_prims(ctx, arrays, prims, nr_prims, ib, min_index,
max_index);
+ _tnl_draw_prims(ctx, prims, nr_prims, ib,
+ index_bounds_valid, min_index, max_index, NULL, NULL);
return;
}
+ /* If we're going to have to upload any of the user's vertex arrays, then
+* get the minimum and maximum of their index buffer so we know what range
+* to upload.
+*/
+ if (!index_bounds_valid !vbo_all_varyings_in_vbos(arrays)) {
+ perf_debug(Scanning index buffer to compute index buffer bounds.
+ Use glDrawRangeElements() to avoid this.\n);
+ vbo_get_minmax_indices(ctx, prims, ib, min_index, max_index,
nr_prims);
+ }
+
/* Try drawing with the hardware, but don't do anything else if we can't
* manage it. swrast doesn't support our featureset, so we can't fall
back
* to it.
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
index dff947a..c85acec 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
@@ -504,9 +504,9 @@ TAG(vbo_check_render_prims)(struct gl_context *ctx,
tfb_vertcount, indirect);
if (nctx-fallback == SWTNL)
- _tnl_vbo_draw_prims(ctx, prims, nr_prims, ib,
- index_bounds_valid, min_index, max_index,
- tfb_vertcount, indirect);
+ _tnl_draw_prims(ctx, prims, nr_prims, ib,
+ index_bounds_valid, min_index, max_index,
+ tfb_vertcount, indirect);
}
void
diff --git a/src/mesa/tnl/t_context.c b/src/mesa/tnl/t_context.c
index 134f699..eb5bae4 100644
--- a/src/mesa/tnl/t_context.c
+++ b/src/mesa/tnl/t_context.c
@@ -93,7 +93,7 @@ _tnl_CreateContext( struct gl_context *ctx )
}
/* plug in the VBO drawing function */
- vbo_set_draw_func(ctx, _tnl_vbo_draw_prims);
+ vbo_set_draw_func(ctx, _tnl_draw_prims);
_math_init_transformation();
_math_init_translate();
diff --git a/src/mesa/tnl/t_draw.c b/src/mesa/tnl/t_draw.c
index 2755ae6..be3f059 100644
--- a/src/mesa/tnl/t_draw.c
+++ b/src/mesa/tnl/t_draw.c
@@ -411,7 +411,11 @@ static void unmap_vbos( struct gl_context *ctx,
}
-void _tnl_vbo_draw_prims(struct gl_context *ctx,
+/* This is the main entrypoint into the slimmed-down software tnl
+ * module. In a regular swtnl driver, this can be plugged straight
+ * into the vbo-Driver.DrawPrims() callback.
+ */
+void _tnl_draw_prims(struct gl_context *ctx,
const struct _mesa_prim *prim,
GLuint nr_prims,
const struct _mesa_index_buffer *ib,
@@ -421,32 +425,16 @@ void _tnl_vbo_draw_prims(struct gl_context *ctx,
struct gl_transform_feedback_object *tfb_vertcount,
struct gl_buffer_object *indirect)
{
- const
Re: [Mesa-dev] [PATCH] docs: Expand ARB_gpu_shader5 to describe status of individual features
On Mon, Apr 7, 2014 at 11:57 PM, Chris Forbes chr...@ijw.co.nz wrote: This extension is a huge grab-bag of stuff that's in DX11. Break it apart to make it clear what still needs to be done. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- docs/GL3.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/docs/GL3.txt b/docs/GL3.txt index bf51e3a..0688977 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -101,6 +101,17 @@ GL 4.0: GL_ARB_draw_buffers_blendDONE (i965, nv50, nvc0, r600, radeonsi, softpipe) GL_ARB_draw_indirect DONE (i965) GL_ARB_gpu_shader5 started + - 'precise' qualifiernot started + - Dynamically uniform sampler array indices not started + - Unrestricted UBO array indices not started + - Implicit signed - unsigned conversionsnot started + - Fused multiply-add DONE + - Packing/bitfield/conversion functions DONE + - Enhanced textureGather DONE + - Geometry shader instancing DONE + - Geometry shader multiple streams not started + - Enhanced per-sample shadingDONE + - Interpolation functionsstarted GL_ARB_gpu_shader_fp64 not started GL_ARB_sample_shadingDONE (i965) GL_ARB_shader_subroutine not started -- 1.9.1 Looks right to me. Reviewed-by: Matt Turner matts...@gmail.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa: add bounds checking to eliminate buffer overrun
Apologies folks, I had made those changes and somehow grabbed the wrong
patch when I went to add the bug reference. Ugh.
This time for sure! I'll follow this with the -- real -- patch.
Courtney
On Tue, Apr 8, 2014 at 1:28 AM, Kenneth Graunke kenn...@whitecape.orgwrote:
On 04/07/2014 09:20 PM, Courtney Goeltzenleuchter wrote:
Decompressing ETC2 textures was causing intermitent segfault
by copying resulting 4x4 texel block to the destination texture
regardless of the size of the destination texture. Issue found
via application crash in GLBenchmark 3.0's Manhattan test.
v2: add more explanatory comments
v3: add bugzilla reference
v4: Correct cc syntax in commit log
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988
Cc: 9.2 10.0 10.1 mesa-sta...@lists.freedesktop.org
---
src/mesa/main/texcompress_etc.c | 49
+
1 file changed, 25 insertions(+), 24 deletions(-)
diff --git a/src/mesa/main/texcompress_etc.c
b/src/mesa/main/texcompress_etc.c
index cbda689..39775e2 100644
--- a/src/mesa/main/texcompress_etc.c
+++ b/src/mesa/main/texcompress_etc.c
@@ -683,9 +683,10 @@ etc2_unpack_rgb8(uint8_t *dst_row,
etc2_rgb8_parse_block(block, src,
false /* punchthrough_alpha */);
- for (j = 0; j bh; j++) {
+ /* be sure to stay within the bounds of the texture */
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgb8_fetch_texel(block, i, j, dst,
false /* punchthrough_alpha */);
dst[3] = 255;
@@ -720,9 +721,9 @@ etc2_unpack_srgb8(uint8_t *dst_row,
etc2_rgb8_parse_block(block, src,
false /* punchthrough_alpha */);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgb8_fetch_texel(block, i, j, dst,
false /* punchthrough_alpha */);
/* Convert to MESA_FORMAT_B8G8R8A8_SRGB */
@@ -763,9 +764,9 @@ etc2_unpack_rgba8(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_rgba8_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgba8_fetch_texel(block, i, j, dst);
dst += comps;
}
@@ -800,9 +801,9 @@ etc2_unpack_srgb8_alpha8(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_rgba8_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_rgba8_fetch_texel(block, i, j, dst);
/* Convert to MESA_FORMAT_B8G8R8A8_SRGB */
@@ -842,9 +843,9 @@ etc2_unpack_r11(uint8_t *dst_row,
for (x = 0; x width; x+= bw) {
etc2_r11_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps *
comp_size;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_r11_fetch_texel(block, i, j, dst);
dst += comps * comp_size;
}
@@ -878,10 +879,10 @@ etc2_unpack_rg11(uint8_t *dst_row,
/* red component */
etc2_r11_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride +
x * comps * comp_size;
-for (i = 0; i bw; i++) {
+for (i = 0; i bw (i+x) width; i++) {
etc2_r11_fetch_texel(block, i, j, dst);
dst += comps * comp_size;
}
@@ -889,10 +890,10 @@ etc2_unpack_rg11(uint8_t *dst_row,
/* green component */
etc2_r11_parse_block(block, src + 8);
- for (j = 0; j bh; j++) {
+ for (j = 0; j bh (j+y) height; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride +
x * comps * comp_size;
-for (i = 0; i bw; i++) {
+
[Mesa-dev] [PATCH] mesa: add bounds checking to eliminate buffer overrun
Decompressing ETC2 textures was causing intermitent segfault
by copying resulting 4x4 texel block to the destination texture
regardless of the size of the destination texture. Issue found
via application crash in GLBenchmark 3.0's Manhattan test.
v2: add more detail comment. Compute limit outside inner loops.
v3: add bugzilla reference
v4: Correct cc syntax in commit log
v5: really grab the right patch
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988
Cc: 9.2 10.0 10.1 mesa-sta...@lists.freedesktop.org
---
src/mesa/main/texcompress_etc.c | 78 -
1 file changed, 54 insertions(+), 24 deletions(-)
diff --git a/src/mesa/main/texcompress_etc.c b/src/mesa/main/texcompress_etc.c
index a06d29f..080b790 100644
--- a/src/mesa/main/texcompress_etc.c
+++ b/src/mesa/main/texcompress_etc.c
@@ -679,14 +679,25 @@ etc2_unpack_rgb8(uint8_t *dst_row,
for (y = 0; y height; y += bh) {
const uint8_t *src = src_row;
+ /*
+ * Destination texture may not be a multiple of four texels in
+ * height. Compute a safe height to avoid writing outside the texture.
+ */
+ const unsigned h = MIN2(bh, height - y);
for (x = 0; x width; x+= bw) {
etc2_rgb8_parse_block(block, src,
false /* punchthrough_alpha */);
- for (j = 0; j bh; j++) {
+ /*
+ * Destination texture may not be a multiple of four texels in
+ * width. Compute a safe width to avoid writing outside the texture.
+ */
+ const unsigned w = MIN2(bw, width - x);
+
+ for (j = 0; j h; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i w; i++) {
etc2_rgb8_fetch_texel(block, i, j, dst,
false /* punchthrough_alpha */);
dst[3] = 255;
@@ -716,14 +727,17 @@ etc2_unpack_srgb8(uint8_t *dst_row,
for (y = 0; y height; y += bh) {
const uint8_t *src = src_row;
+ const unsigned h = MIN2(bh, height - y);
for (x = 0; x width; x+= bw) {
+ const unsigned w = MIN2(bw, width - x);
etc2_rgb8_parse_block(block, src,
false /* punchthrough_alpha */);
- for (j = 0; j bh; j++) {
+
+ for (j = 0; j h; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i w; i++) {
etc2_rgb8_fetch_texel(block, i, j, dst,
false /* punchthrough_alpha */);
/* Convert to MESA_FORMAT_SARGB8 */
@@ -760,13 +774,15 @@ etc2_unpack_rgba8(uint8_t *dst_row,
for (y = 0; y height; y += bh) {
const uint8_t *src = src_row;
+ const unsigned h = MIN2(bh, height - y);
for (x = 0; x width; x+= bw) {
+ const unsigned w = MIN2(bw, width - x);
etc2_rgba8_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j h; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i w; i++) {
etc2_rgba8_fetch_texel(block, i, j, dst);
dst += comps;
}
@@ -796,14 +812,16 @@ etc2_unpack_srgb8_alpha8(uint8_t *dst_row,
uint8_t tmp;
for (y = 0; y height; y += bh) {
+ const unsigned h = MIN2(bh, height - y);
const uint8_t *src = src_row;
for (x = 0; x width; x+= bw) {
+ const unsigned w = MIN2(bw, width - x);
etc2_rgba8_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j h; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps;
-for (i = 0; i bw; i++) {
+for (i = 0; i w; i++) {
etc2_rgba8_fetch_texel(block, i, j, dst);
/* Convert to MESA_FORMAT_SARGB8 */
@@ -838,14 +856,16 @@ etc2_unpack_r11(uint8_t *dst_row,
unsigned x, y, i, j;
for (y = 0; y height; y += bh) {
+ const unsigned h = MIN2(bh, height - y);
const uint8_t *src = src_row;
for (x = 0; x width; x+= bw) {
+ const unsigned w = MIN2(bw, width - x);
etc2_r11_parse_block(block, src);
- for (j = 0; j bh; j++) {
+ for (j = 0; j h; j++) {
uint8_t *dst = dst_row + (y + j) * dst_stride + x * comps *
comp_size;
-for (i = 0; i bw; i++) {
+for (i = 0; i w; i++) {
etc2_r11_fetch_texel(block, i, j, dst);
dst += comps * comp_size;
}
@@ -873,16 +893,18 @@ etc2_unpack_rg11(uint8_t *dst_row,
unsigned x, y, i, j;
for (y = 0; y height; y += bh) {
+ const unsigned h = MIN2(bh, height - y);
const uint8_t *src = src_row;
for (x = 0; x width; x+= bw) {
[Mesa-dev] [PATCH 1/2] st/omx/enc: allocate input buffer private on demand
From: Christian König christian.koe...@amd.com
v2: move allocation to a function as first step
to clean vid_enc_EncodeFrame
Signed-off-by: Christian König christian.koe...@amd.com
Signed-off-by: Leo Liu leo@amd.com
---
src/gallium/state_trackers/omx/vid_enc.c | 124 +++
1 file changed, 42 insertions(+), 82 deletions(-)
diff --git a/src/gallium/state_trackers/omx/vid_enc.c
b/src/gallium/state_trackers/omx/vid_enc.c
index cd4a25b..2874451 100644
--- a/src/gallium/state_trackers/omx/vid_enc.c
+++ b/src/gallium/state_trackers/omx/vid_enc.c
@@ -72,10 +72,6 @@ static OMX_ERRORTYPE vid_enc_GetParameter(OMX_HANDLETYPE
handle, OMX_INDEXTYPE i
static OMX_ERRORTYPE vid_enc_SetConfig(OMX_HANDLETYPE handle, OMX_INDEXTYPE
idx, OMX_PTR config);
static OMX_ERRORTYPE vid_enc_GetConfig(OMX_HANDLETYPE handle, OMX_INDEXTYPE
idx, OMX_PTR config);
static OMX_ERRORTYPE vid_enc_MessageHandler(OMX_COMPONENTTYPE *comp,
internalRequestMessageType *msg);
-static OMX_ERRORTYPE vid_enc_AllocateInBuffer(omx_base_PortType *port,
OMX_INOUT OMX_BUFFERHEADERTYPE **buf,
- OMX_IN OMX_U32 idx, OMX_IN
OMX_PTR private, OMX_IN OMX_U32 size);
-static OMX_ERRORTYPE vid_enc_UseInBuffer(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE **buf, OMX_U32 idx,
- OMX_PTR private, OMX_U32 size, OMX_U8
*mem);
static OMX_ERRORTYPE vid_enc_FreeInBuffer(omx_base_PortType *port, OMX_U32
idx, OMX_BUFFERHEADERTYPE *buf);
static OMX_ERRORTYPE vid_enc_EncodeFrame(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE *buf);
static OMX_ERRORTYPE vid_enc_AllocateOutBuffer(omx_base_PortType *comp,
OMX_INOUT OMX_BUFFERHEADERTYPE **buf,
@@ -222,8 +218,6 @@ static OMX_ERRORTYPE vid_enc_Constructor(OMX_COMPONENTTYPE
*comp, OMX_STRING nam
port-sPortParam.nBufferCountMin = 4;
port-Port_SendBufferFunction = vid_enc_EncodeFrame;
- port-Port_AllocateBuffer = vid_enc_AllocateInBuffer;
- port-Port_UseBuffer = vid_enc_UseInBuffer;
port-Port_FreeBuffer = vid_enc_FreeInBuffer;
port = (omx_base_video_PortType
*)priv-ports[OMX_BASE_FILTER_OUTPUTPORT_INDEX];
@@ -566,78 +560,6 @@ static OMX_ERRORTYPE
vid_enc_MessageHandler(OMX_COMPONENTTYPE* comp, internalReq
return omx_base_component_MessageHandler(comp, msg);
}
-static OMX_ERRORTYPE vid_enc_AllocateInBuffer(omx_base_PortType *port,
OMX_INOUT OMX_BUFFERHEADERTYPE **buf,
- OMX_IN OMX_U32 idx, OMX_IN
OMX_PTR private, OMX_IN OMX_U32 size)
-{
- OMX_VIDEO_PORTDEFINITIONTYPE *def = port-sPortParam.format.video;
- OMX_COMPONENTTYPE* comp = port-standCompContainer;
- vid_enc_PrivateType *priv = comp-pComponentPrivate;
- struct pipe_video_buffer templat = {};
- struct input_buf_private *inp;
- OMX_ERRORTYPE r;
-
- r = base_port_AllocateBuffer(port, buf, idx, private, size);
- if (r)
- return r;
-
- inp = (*buf)-pInputPortPrivate = CALLOC(1, sizeof(struct
input_buf_private));
- if (!inp) {
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- templat.buffer_format = PIPE_FORMAT_NV12;
- templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
- templat.width = def-nFrameWidth;
- templat.height = def-nFrameHeight;
- templat.interlaced = false;
-
- inp-buf = priv-s_pipe-create_video_buffer(priv-s_pipe, templat);
- if (!inp-buf) {
- FREE(inp);
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- return OMX_ErrorNone;
-}
-
-static OMX_ERRORTYPE vid_enc_UseInBuffer(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE **buf, OMX_U32 idx,
- OMX_PTR private, OMX_U32 size, OMX_U8
*mem)
-{
- OMX_VIDEO_PORTDEFINITIONTYPE *def = port-sPortParam.format.video;
- OMX_COMPONENTTYPE* comp = port-standCompContainer;
- vid_enc_PrivateType *priv = comp-pComponentPrivate;
- struct pipe_video_buffer templat = {};
- struct input_buf_private *inp;
- OMX_ERRORTYPE r;
-
- r = base_port_UseBuffer(port, buf, idx, private, size, mem);
- if (r)
- return r;
-
- inp = (*buf)-pInputPortPrivate = CALLOC(1, sizeof(struct
input_buf_private));
- if (!inp) {
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- templat.buffer_format = PIPE_FORMAT_NV12;
- templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
- templat.width = def-nFrameWidth;
- templat.height = def-nFrameHeight;
- templat.interlaced = false;
-
- inp-buf = priv-s_pipe-create_video_buffer(priv-s_pipe, templat);
- if (!inp-buf) {
- FREE(inp);
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- return OMX_ErrorNone;
-}
-
static OMX_ERRORTYPE vid_enc_FreeInBuffer(omx_base_PortType *port, OMX_U32
idx, OMX_BUFFERHEADERTYPE *buf)
{
struct input_buf_private *inp = buf-pInputPortPrivate;
@@ -685,18
[Mesa-dev] [PATCH 2/2] st/omx/enc: cleanup omx/vid_enc.c
From: Leo Liu leo@amd.com
cleanup by moving each step into a separate function
Signed-off-by: Leo Liu leo@amd.com
---
src/gallium/state_trackers/omx/vid_enc.c | 220 +--
1 file changed, 118 insertions(+), 102 deletions(-)
diff --git a/src/gallium/state_trackers/omx/vid_enc.c
b/src/gallium/state_trackers/omx/vid_enc.c
index 2874451..8ec0439 100644
--- a/src/gallium/state_trackers/omx/vid_enc.c
+++ b/src/gallium/state_trackers/omx/vid_enc.c
@@ -638,113 +638,85 @@ static OMX_ERRORTYPE
enc_NeedInputPortPrivate(omx_base_PortType *port, OMX_BUFFE
return OMX_ErrorNone;
}
-static OMX_ERRORTYPE vid_enc_EncodeFrame(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE *buf)
+static OMX_ERRORTYPE enc_LoadImage(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE *buf)
{
OMX_COMPONENTTYPE* comp = port-standCompContainer;
vid_enc_PrivateType *priv = comp-pComponentPrivate;
- unsigned size =
priv-ports[OMX_BASE_FILTER_OUTPUTPORT_INDEX]-sPortParam.nBufferSize;
OMX_VIDEO_PORTDEFINITIONTYPE *def = port-sPortParam.format.video;
- struct pipe_h264_enc_picture_desc picture;
- struct pipe_h264_enc_rate_control *rate_ctrl = picture.rate_ctrl;
- struct input_buf_private *inp;
- struct pipe_video_buffer *vbuf;
- OMX_ERRORTYPE err;
-
- err = enc_NeedInputPortPrivate(port, buf);
- if (err != OMX_ErrorNone)
- return err;
-
- if (buf-nFilledLen == 0) {
- if (buf-nFlags OMX_BUFFERFLAG_EOS)
- buf-nFilledLen = buf-nAllocLen;
- return base_port_SendBufferFunction(port, buf);
- }
-
- inp = buf-pInputPortPrivate;
- if (buf-pOutputPortPrivate) {
- vbuf = buf-pOutputPortPrivate;
- buf-pOutputPortPrivate = inp-buf;
- inp-buf = vbuf;
- } else {
- /* --- load input image into video buffer */
- struct pipe_sampler_view **views;
- struct pipe_box box = {};
- void *ptr;
-
- views = inp-buf-get_sampler_view_planes(inp-buf);
- if (!views)
- return OMX_ErrorInsufficientResources;
-
- ptr = buf-pBuffer;
-
- box.width = def-nFrameWidth;
- box.height = def-nFrameHeight;
- box.depth = 1;
-
- priv-s_pipe-transfer_inline_write(priv-s_pipe, views[0]-texture, 0,
- PIPE_TRANSFER_WRITE, box,
- ptr, def-nStride, 0);
-
-
- ptr = ((uint8_t*)buf-pBuffer) + (def-nStride * box.height);
-
- box.width = def-nFrameWidth / 2;
- box.height = def-nFrameHeight / 2;
- box.depth = 1;
-
- priv-s_pipe-transfer_inline_write(priv-s_pipe, views[1]-texture, 0,
- PIPE_TRANSFER_WRITE, box,
- ptr, def-nStride, 0);
- vbuf = inp-buf;
- }
-
- /* -- scale input image - */
-
- if (priv-scale_buffer[priv-current_scale_buffer]) {
- struct vl_compositor *compositor = priv-compositor;
- struct vl_compositor_state *s = priv-cstate;
- struct pipe_sampler_view **views;
- struct pipe_surface **dst_surface;
- unsigned i;
-
- views = vbuf-get_sampler_view_planes(vbuf);
- dst_surface =
priv-scale_buffer[priv-current_scale_buffer]-get_surfaces
- (priv-scale_buffer[priv-current_scale_buffer]);
- vl_compositor_clear_layers(s);
-
- for (i = 0; i VL_MAX_SURFACES; ++i) {
- struct u_rect src_rect;
+ struct input_buf_private *inp = buf-pInputPortPrivate;
+ struct pipe_sampler_view **views;
+ struct pipe_box box = {};
+ void *ptr;
- if (!views[i] || !dst_surface[i])
-continue;
+ views = inp-buf-get_sampler_view_planes(inp-buf);
+ if (!views)
+ return OMX_ErrorInsufficientResources;
- src_rect.x0 = 0;
- src_rect.y0 = 0;
- src_rect.x1 = port-sPortParam.format.video.nFrameWidth;
- src_rect.y1 = port-sPortParam.format.video.nFrameHeight;
+ ptr = buf-pBuffer;
+ box.width = def-nFrameWidth;
+ box.height = def-nFrameHeight;
+ box.depth = 1;
+ priv-s_pipe-transfer_inline_write(priv-s_pipe, views[0]-texture, 0,
+ PIPE_TRANSFER_WRITE, box,
+ ptr, def-nStride, 0);
+ ptr = ((uint8_t*)buf-pBuffer) + (def-nStride * box.height);
+ box.width = def-nFrameWidth / 2;
+ box.height = def-nFrameHeight / 2;
+ box.depth = 1;
+ priv-s_pipe-transfer_inline_write(priv-s_pipe, views[1]-texture, 0,
+ PIPE_TRANSFER_WRITE, box,
+ ptr, def-nStride, 0);
+ return OMX_ErrorNone;
+}
- if (i 0) {
-src_rect.x1 /= 2;
-src_rect.y1 /= 2;
- }
+static void enc_ScaleInput(omx_base_PortType *port,
+OMX_BUFFERHEADERTYPE *buf, struct pipe_video_buffer **vbuf,
unsigned *size)
+{
+ OMX_COMPONENTTYPE* comp = port-standCompContainer;
+ vid_enc_PrivateType *priv =
Re: [Mesa-dev] [PATCH 1/2] st/omx/enc: allocate input buffer private on demand
Am 08.04.2014 16:57, schrieb Leo Liu:
From: Christian König christian.koe...@amd.com
v2: move allocation to a function as first step
to clean vid_enc_EncodeFrame
Signed-off-by: Christian König christian.koe...@amd.com
Signed-off-by: Leo Liu leo@amd.com
Reviewed and pushed both patches.
Thanks,
Christian.
---
src/gallium/state_trackers/omx/vid_enc.c | 124 +++
1 file changed, 42 insertions(+), 82 deletions(-)
diff --git a/src/gallium/state_trackers/omx/vid_enc.c
b/src/gallium/state_trackers/omx/vid_enc.c
index cd4a25b..2874451 100644
--- a/src/gallium/state_trackers/omx/vid_enc.c
+++ b/src/gallium/state_trackers/omx/vid_enc.c
@@ -72,10 +72,6 @@ static OMX_ERRORTYPE vid_enc_GetParameter(OMX_HANDLETYPE
handle, OMX_INDEXTYPE i
static OMX_ERRORTYPE vid_enc_SetConfig(OMX_HANDLETYPE handle, OMX_INDEXTYPE
idx, OMX_PTR config);
static OMX_ERRORTYPE vid_enc_GetConfig(OMX_HANDLETYPE handle, OMX_INDEXTYPE
idx, OMX_PTR config);
static OMX_ERRORTYPE vid_enc_MessageHandler(OMX_COMPONENTTYPE *comp,
internalRequestMessageType *msg);
-static OMX_ERRORTYPE vid_enc_AllocateInBuffer(omx_base_PortType *port,
OMX_INOUT OMX_BUFFERHEADERTYPE **buf,
- OMX_IN OMX_U32 idx, OMX_IN
OMX_PTR private, OMX_IN OMX_U32 size);
-static OMX_ERRORTYPE vid_enc_UseInBuffer(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE **buf, OMX_U32 idx,
- OMX_PTR private, OMX_U32 size, OMX_U8
*mem);
static OMX_ERRORTYPE vid_enc_FreeInBuffer(omx_base_PortType *port, OMX_U32
idx, OMX_BUFFERHEADERTYPE *buf);
static OMX_ERRORTYPE vid_enc_EncodeFrame(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE *buf);
static OMX_ERRORTYPE vid_enc_AllocateOutBuffer(omx_base_PortType *comp,
OMX_INOUT OMX_BUFFERHEADERTYPE **buf,
@@ -222,8 +218,6 @@ static OMX_ERRORTYPE vid_enc_Constructor(OMX_COMPONENTTYPE
*comp, OMX_STRING nam
port-sPortParam.nBufferCountMin = 4;
port-Port_SendBufferFunction = vid_enc_EncodeFrame;
- port-Port_AllocateBuffer = vid_enc_AllocateInBuffer;
- port-Port_UseBuffer = vid_enc_UseInBuffer;
port-Port_FreeBuffer = vid_enc_FreeInBuffer;
port = (omx_base_video_PortType *)priv-ports[OMX_BASE_FILTER_OUTPUTPORT_INDEX];
@@ -566,78 +560,6 @@ static OMX_ERRORTYPE
vid_enc_MessageHandler(OMX_COMPONENTTYPE* comp, internalReq
return omx_base_component_MessageHandler(comp, msg);
}
-static OMX_ERRORTYPE vid_enc_AllocateInBuffer(omx_base_PortType *port, OMX_INOUT OMX_BUFFERHEADERTYPE **buf,
- OMX_IN OMX_U32 idx, OMX_IN
OMX_PTR private, OMX_IN OMX_U32 size)
-{
- OMX_VIDEO_PORTDEFINITIONTYPE *def = port-sPortParam.format.video;
- OMX_COMPONENTTYPE* comp = port-standCompContainer;
- vid_enc_PrivateType *priv = comp-pComponentPrivate;
- struct pipe_video_buffer templat = {};
- struct input_buf_private *inp;
- OMX_ERRORTYPE r;
-
- r = base_port_AllocateBuffer(port, buf, idx, private, size);
- if (r)
- return r;
-
- inp = (*buf)-pInputPortPrivate = CALLOC(1, sizeof(struct
input_buf_private));
- if (!inp) {
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- templat.buffer_format = PIPE_FORMAT_NV12;
- templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
- templat.width = def-nFrameWidth;
- templat.height = def-nFrameHeight;
- templat.interlaced = false;
-
- inp-buf = priv-s_pipe-create_video_buffer(priv-s_pipe, templat);
- if (!inp-buf) {
- FREE(inp);
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- return OMX_ErrorNone;
-}
-
-static OMX_ERRORTYPE vid_enc_UseInBuffer(omx_base_PortType *port,
OMX_BUFFERHEADERTYPE **buf, OMX_U32 idx,
- OMX_PTR private, OMX_U32 size, OMX_U8
*mem)
-{
- OMX_VIDEO_PORTDEFINITIONTYPE *def = port-sPortParam.format.video;
- OMX_COMPONENTTYPE* comp = port-standCompContainer;
- vid_enc_PrivateType *priv = comp-pComponentPrivate;
- struct pipe_video_buffer templat = {};
- struct input_buf_private *inp;
- OMX_ERRORTYPE r;
-
- r = base_port_UseBuffer(port, buf, idx, private, size, mem);
- if (r)
- return r;
-
- inp = (*buf)-pInputPortPrivate = CALLOC(1, sizeof(struct
input_buf_private));
- if (!inp) {
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- templat.buffer_format = PIPE_FORMAT_NV12;
- templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
- templat.width = def-nFrameWidth;
- templat.height = def-nFrameHeight;
- templat.interlaced = false;
-
- inp-buf = priv-s_pipe-create_video_buffer(priv-s_pipe, templat);
- if (!inp-buf) {
- FREE(inp);
- base_port_FreeBuffer(port, idx, *buf);
- return OMX_ErrorInsufficientResources;
- }
-
- return OMX_ErrorNone;
-}
-
static OMX_ERRORTYPE vid_enc_FreeInBuffer(omx_base_PortType
Re: [Mesa-dev] [PATCH] i965: fix MakeCurrent when switching a context between multiple drawables.
On Mon, Apr 7, 2014 at 9:24 AM, Eric Anholt e...@anholt.net wrote:
Iago Toral Quiroga ito...@igalia.com writes:
Commit 11baad35088dfd4bdabc1710df650dbfb413e7a3 produces a regression when
switching a single context between multiple drawables.
The problem is that we check whether we have a viewport set to decide if we
need to generate buffers for the drawble, but the viewport is initialized
with the first call to MakeCurrent for that context, so calling MakeCurrent
on
the same context with a different drawable will have the viewport already
initialized and will not generate buffers for the new drawable.
This patch fixes the problem by reverting to the previous solution
implemented
in commit 05da4a7a5e7d5bd988cb31f94ed8e1f053d9ee39 with a small fix to
suppport
single buffer drawables too. This solution checks if we have a renderbuffer
for
the drawable to decide if we need to generate a buffer or not. The original
implementation, however, did this by checking the BACK_LEFT buffer, which is
not a valid solution for single buffer drawables. This patch modifies this
to check the FRONT_LEFT buffer instead, which should work in both scenarios.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74005
---
src/mesa/drivers/dri/i965/brw_context.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index c9719f5..c593286 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -926,6 +926,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
{
struct brw_context *brw;
GET_CURRENT_CONTEXT(curCtx);
+ struct intel_renderbuffer *rb = NULL;
if (driContextPriv)
brw = (struct brw_context *) driContextPriv-driverPrivate;
@@ -950,6 +951,7 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
} else {
fb = driDrawPriv-driverPrivate;
readFb = driReadPriv-driverPrivate;
+ rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
driContextPriv-dri2.draw_stamp = driDrawPriv-dri2.stamp - 1;
driContextPriv-dri2.read_stamp = driReadPriv-dri2.stamp - 1;
}
@@ -961,10 +963,9 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
intel_gles3_srgb_workaround(brw, fb);
intel_gles3_srgb_workaround(brw, readFb);
- /* If the context viewport hasn't been initialized, force a call out
to
- * the loader to get buffers so we have a drawable size for the
initial
- * viewport. */
- if (!brw-ctx.ViewportInitialized)
+ /* If we don't have buffers for the drawable yet, force a call to
+ * getbuffers here so we can have a default drawable size. */
+ if (rb !rb-mt)
intel_prepare_render(brw);
We won't have an rb-mt for the front unless you're doing front buffer
rendering, so I think you're basically just backing out krh's change.
Which I think is good -- it looks like he was papering over a bug
elsewhere, and I think we *should* just prepare_render in makecurrent.
But if we're going to revert, let's just actually revert.
Here's what I wrote in https://bugs.freedesktop.org/show_bug.cgi?id=74005:
We don't want to revert the behaviour. The initial patch removed a
call to intel_prepare_render() in intelMakeCurrent(). We're supposed
to call intel_prepare_render() any time we're about to touch the
buffers, but the up-front call to intel_prepare_render() in
intelMakeCurrent covered up a few places where we forgot. The fix now
isn't to put back the up-front intel_prepare_render() call but to add
it in the rendering paths that are missing it.
Also, for reference, we need the buffer size for the initial value of
the context viewport. So the first time a context is made current, we
call intel_prepare_render() to get the buffers so we can see what size
they are. When the same context is later made current with a
different drawable, we have a value for the viewport and we're not
supposed to change it, so there's no point in getting buffers.
Kristian
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Re: [Mesa-dev] [PATCH] docs: Expand ARB_gpu_shader5 to describe status of individual features
On 04/07/2014 11:57 PM, Chris Forbes wrote: This extension is a huge grab-bag of stuff that's in DX11. Break it apart to make it clear what still needs to be done. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- docs/GL3.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/docs/GL3.txt b/docs/GL3.txt index bf51e3a..0688977 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -101,6 +101,17 @@ GL 4.0: GL_ARB_draw_buffers_blendDONE (i965, nv50, nvc0, r600, radeonsi, softpipe) GL_ARB_draw_indirect DONE (i965) GL_ARB_gpu_shader5 started + - 'precise' qualifiernot started + - Dynamically uniform sampler array indices not started + - Unrestricted UBO array indices not started I believe UBO array indices are also dynamically uniform. + - Implicit signed - unsigned conversionsnot started + - Fused multiply-add DONE + - Packing/bitfield/conversion functions DONE + - Enhanced textureGather DONE + - Geometry shader instancing DONE + - Geometry shader multiple streams not started + - Enhanced per-sample shadingDONE + - Interpolation functionsstarted GL_ARB_gpu_shader_fp64 not started GL_ARB_sample_shadingDONE (i965) GL_ARB_shader_subroutine not started ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V3 00/30] ARB_texture_view for i965
Kenneth Graunke kenn...@whitecape.org writes: On 04/02/2014 01:04 AM, Chris Forbes wrote: This series adds ARB_texture_view support for i965 Gen7/7.5. Significant changes from V2: - All the assorted post-V2 format fixups are moved to the start of the series. This gives us consistent memory layout for all the formats between which we have to support casting. - Texture validation changes are simplified (Eric) - CopyTexSubImage respects view parameters. Series is: Reviewed-by: Kenneth Graunke kenn...@whitecape.org I haven't done a thorough review, but the general plan seems right (like handling of channel swizzles), so: Acked-by: Eric Anholt e...@anholt.net pgppE6RJJtAdF.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V3 00/30] ARB_texture_view for i965
On 04/08/2014 02:13 AM, Kenneth Graunke wrote: On 04/02/2014 01:04 AM, Chris Forbes wrote: This series adds ARB_texture_view support for i965 Gen7/7.5. Significant changes from V2: - All the assorted post-V2 format fixups are moved to the start of the series. This gives us consistent memory layout for all the formats between which we have to support casting. - Texture validation changes are simplified (Eric) - CopyTexSubImage respects view parameters. Series is: Reviewed-by: Kenneth Graunke kenn...@whitecape.org I do think it would be worth trying various benchmarks and games against the series, to see if the RGBA vs. BGRA swizzling issue makes much of a difference. It will probably change some things, but I don't have a good sense of how. I believe the losing BGRA is going to hurt web browsers... Eric also indicated that it would hurt Glamor. I think we should add an extension that enables BGRA for TexStorage. On ES, EXT_texture_storage + APPLE_texture_format_BGRA does this by adding GL_BGRA8_EXT as an internal format for *only* TexStorage. I'll also need to port this to Gen8... Nice work, Chris! Thanks for doing this. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa: add bounds checking to eliminate buffer overrun
On 04/08/2014 08:10 AM, Courtney Goeltzenleuchter wrote: Decompressing ETC2 textures was causing intermitent segfault by copying resulting 4x4 texel block to the destination texture regardless of the size of the destination texture. Issue found via application crash in GLBenchmark 3.0's Manhattan test. v2: add more detail comment. Compute limit outside inner loops. v3: add bugzilla reference v4: Correct cc syntax in commit log v5: really grab the right patch Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988 Cc: 9.2 10.0 10.1 mesa-sta...@lists.freedesktop.org Pushed to master - thanks! remote: I: 1 patch(es) updated to state Accepted. To ssh://git.freedesktop.org/git/mesa/mesa a22d944..cb4ad13 master - master --Ken signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v2 00/10] Map support for GBM bos
On 04/04/2014 01:20 PM, Thomas Hellstrom wrote: NAK! No generic mmap() APIs of GBM bos, please. The reason is that this impossible to implement in an efficient way on non-coherent architectures, and once the interface is there, people will start using it and ignore the non-coherent architectures. And these will, in the end, have to implement a horrendous solution to this problem. I didn't make it clear enough that the interface is optional. I'll send another version that makes that more evident. One thing to note is that this doesn't implement support for map in the default gbm backend (dri). Users need a bit of a special setup to be able to use the new API. Anyway, comments on how to improve the interface would be really welcome. I understand that for non-coherent architectures one would need at least read and write flags and damage reporting, is that right? Thanks, Ander This problem has been discussed on the dri-devel list, linaro-mm-sig and on the mesa-list before when the Mir developers attempted to add another variant of an mmap interface. /Thomas On 04/04/2014 10:36 AM, Ander Conselvan de Oliveira wrote: From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com Changes from previous version: - removed the extra gbm egl platform; - set errno to ENOSYS when the map/unmap capability is not implemented. Thanks, Ander Ander Conselvan de Oliveira (9): gbm: Set errno on errors gbm: Move private pointer from gbm_dri_surface to gbm_surface egl: Protect use of gbm_dri with ifdef HAVE_DRM_PLATFORM gbm: Add a native intel backend gbm_drm: Keep a reference to drm native objects dri, i965: Add an extension for sharing the drm bufmgr dri, i965: Add entry point for creating image from native handle egl/drm: Add support for native gbm backends gbm: Add entry points for mapping and unmapping bos Neil Roberts (1): wayland: Fix the logic in disabling the prime capability include/GL/internal/dri_interface.h | 24 ++- src/egl/drivers/dri2/egl_dri2.c | 11 +- src/egl/drivers/dri2/egl_dri2.h | 8 +- src/egl/drivers/dri2/platform_drm.c | 252 -- src/egl/drivers/dri2/platform_wayland.c | 2 +- src/gbm/Makefile.am | 14 +- src/gbm/backends/dri/gbm_dri.c| 49 +++-- src/gbm/backends/dri/gbm_driint.h | 2 - src/gbm/backends/intel/gbm_intel.c| 286 ++ src/gbm/backends/intel/gbm_intel.h| 76 src/gbm/main/backend.c| 2 + src/gbm/main/common_drm.h | 13 ++ src/gbm/main/gbm.c| 56 +- src/gbm/main/gbm.h| 10 ++ src/gbm/main/gbmint.h | 4 + src/mesa/drivers/dri/common/dri_util.c| 2 + src/mesa/drivers/dri/common/dri_util.h| 1 + src/mesa/drivers/dri/i965/intel_regions.c | 50 +++--- src/mesa/drivers/dri/i965/intel_regions.h | 6 + src/mesa/drivers/dri/i965/intel_screen.c | 46 - 20 files changed, 807 insertions(+), 107 deletions(-) create mode 100644 src/gbm/backends/intel/gbm_intel.c create mode 100644 src/gbm/backends/intel/gbm_intel.h ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 01/10] gbm: Set errno on errors
On 04/04/2014 01:37 PM, Emil Velikov wrote:
On 04/04/14 09:36, Ander Conselvan de Oliveira wrote:
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
This should give the caller some information of what called the error.
For the gbm_bo_import() case, for instance, it is possible to know if
the import is not supported or the error was caused by an invalid
parameter.
Perhaps I'm seeing things but you're setting errno to EINVAL in almost all
cases, which IMHO is not that much of an improvement. A couple of suggestions
below and I'm assuming that some of the rest can be more descriptive as well.
Browsing through the file I've noticed that there are a few cases where errno
is not set. Was that intentional (example when we fail to allocate memory) ?
Yep, malloc() and calloc() set errno to ENOMEM.
See other comments below.
---
src/gbm/backends/dri/gbm_dri.c | 38 ++
src/gbm/main/gbm.c | 20 +---
2 files changed, 43 insertions(+), 15 deletions(-)
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index 50fa588..9d08a97 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -30,6 +30,7 @@
#include stddef.h
#include stdint.h
#include string.h
+#include errno.h
#include limits.h
#include sys/types.h
@@ -353,8 +354,10 @@ gbm_dri_bo_write(struct gbm_bo *_bo, const void *buf,
size_t count)
{
struct gbm_dri_bo *bo = gbm_dri_bo(_bo);
- if (bo-image != NULL)
+ if (bo-image != NULL) {
+ errno = EINVAL;
The gbm device does not have the image DRI extension so should we be using
ENOSYS ?
Not having the image DRI extension is a fatal error for the gbm dri
backend. However, the check above returns EINVAL if the bo supplied to
gbm_bo_write() has a DRI image allocated for it. That is invalid because
we only allow gbm_bo_write() for bos backed by dumb buffers (allocated
with the GBM_BO_USE_WRITE flag) and those don't have a DRI image.
return -1;
+ }
memcpy(bo-map, buf, count);
@@ -432,8 +435,10 @@ gbm_dri_bo_import(struct gbm_device *gbm,
int gbm_format;
/* Required for query image WIDTH HEIGHT */
- if (dri-image-base.version 4)
+ if (dri-image-base.version 4) {
+ errno = ENOSYS;
return NULL;
+ }
switch (type) {
#if HAVE_WAYLAND_PLATFORM
@@ -441,12 +446,16 @@ gbm_dri_bo_import(struct gbm_device *gbm,
{
struct wl_drm_buffer *wb;
- if (!dri-wl_drm)
+ if (!dri-wl_drm) {
+ errno = EINVAL;
return NULL;
+ }
wb = wayland_drm_buffer_get(dri-wl_drm, (struct wl_resource *) buffer);
- if (!wb)
+ if (!wb) {
+ errno = EINVAL;
return NULL;
+ }
image = dri-image-dupImage(wb-driver_buffer, NULL);
@@ -473,15 +482,19 @@ gbm_dri_bo_import(struct gbm_device *gbm,
case GBM_BO_IMPORT_EGL_IMAGE:
{
int dri_format;
- if (dri-lookup_image == NULL)
+ if (dri-lookup_image == NULL) {
+ errno = EINVAL;
return NULL;
+ }
image = dri-lookup_image(dri-screen, buffer, dri-lookup_user_data);
image = dri-image-dupImage(image, NULL);
dri-image-queryImage(image, __DRI_IMAGE_ATTRIB_FORMAT, dri_format);
gbm_format = gbm_dri_to_gbm_format(dri_format);
- if (gbm_format == 0)
+ if (gbm_format == 0) {
+ errno = EINVAL;
return NULL;
+ }
break;
}
@@ -502,6 +515,7 @@ gbm_dri_bo_import(struct gbm_device *gbm,
}
default:
+ errno = ENOSYS;
return NULL;
}
@@ -518,6 +532,7 @@ gbm_dri_bo_import(struct gbm_device *gbm,
dri_use |= __DRI_IMAGE_USE_CURSOR;
if (dri-image-base.version = 2
!dri-image-validateUsage(bo-image, dri_use)) {
+ errno = EINVAL;
ENOSYS ?
This is a tricky one. The patch doesn't change the behavior, which is
try to validate the usage if the version of the DRI image extension
implements validateUsage(), otherwise, just assume things will work. So
the failure only happens if the call to validateUsage() fails, and that
means the imported buffer is incompatible with the requested usage.
free(bo);
return NULL;
}
@@ -549,10 +564,14 @@ create_dumb(struct gbm_device *gbm,
struct drm_mode_destroy_dumb destroy_arg;
int ret;
- if (!(usage GBM_BO_USE_CURSOR_64X64))
+ if (!(usage GBM_BO_USE_CURSOR_64X64)) {
+ errno = EINVAL;
return NULL;
- if (format != GBM_FORMAT_ARGB)
+ }
+ if (format != GBM_FORMAT_ARGB) {
+ errno = EINVAL;
return NULL;
+ }
bo = calloc(1, sizeof *bo);
if (bo == NULL)
@@ -643,6 +662,7 @@ gbm_dri_bo_create(struct gbm_device *gbm,
dri_format = __DRI_IMAGE_FORMAT_XRGB2101010;
break;
default:
+ errno = EINVAL;
goto failed;
}
@@ -722,6 +742,8 @@ dri_device_create(int fd)
int ret;
Re: [Mesa-dev] [PATCH 05/10] gbm: Add a native intel backend
On 04/04/2014 02:06 PM, Emil Velikov wrote:
On 04/04/14 09:36, Ander Conselvan de Oliveira wrote:
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
A few minor nits inline.
---
src/gbm/Makefile.am| 14 +-
src/gbm/backends/intel/gbm_intel.c | 258 +
src/gbm/backends/intel/gbm_intel.h | 74 +++
src/gbm/main/backend.c | 2 +
src/gbm/main/common_drm.h | 1 +
5 files changed, 347 insertions(+), 2 deletions(-)
create mode 100644 src/gbm/backends/intel/gbm_intel.c
create mode 100644 src/gbm/backends/intel/gbm_intel.h
diff --git a/src/gbm/Makefile.am b/src/gbm/Makefile.am
index ea06ce1..b53a68d 100644
--- a/src/gbm/Makefile.am
+++ b/src/gbm/Makefile.am
@@ -49,6 +49,16 @@ libgbm_la_LIBADD += \
libgbm_dri.la $(top_builddir)/src/mapi/shared-glapi/libglapi.la
$(LIBDRM_LIBS)
endif
-TESTS = gbm-symbols-check
+if HAVE_I965_DRI
+noinst_LTLIBRARIES = libgbm_intel.la
+libgbm_intel_la_SOURCES = \
+ backends/intel/gbm_intel.c
+
+libgbm_intel_la_CFLAGS = \
+ $(AM_CFLAGS) $(INTEL_CFLAGS)
+
+libgbm_la_LIBADD += \
+ libgbm_intel.la $(INTEL_LIBS)
+endif
-include $(top_srcdir)/install-lib-links.mk
You might want to keep this line.
+TESTS = gbm-symbols-check
diff --git a/src/gbm/backends/intel/gbm_intel.c
b/src/gbm/backends/intel/gbm_intel.c
new file mode 100644
index 000..2e7ced3
--- /dev/null
+++ b/src/gbm/backends/intel/gbm_intel.c
@@ -0,0 +1,258 @@
+/*
+ * Copyright © 2011-2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
+ */
+
+#include errno.h
+#include stdlib.h
+#include stdint.h
+#include string.h
+#include sys/types.h
+#include unistd.h
+
+#include gbm_intel.h
+
+#include gbmint.h
+
+static int
+gbm_intel_is_format_supported(struct gbm_device *gbm,
+uint32_t format,
+uint32_t usage)
+{
Why do people avoid std_bool ? The function name already indicates that the
return value is true/false yet you use int.
This matches GBM's public interface for gbm_is_format_supported(). I
don't know why stdbool wasn't used in the first place.
I'll fix the other issues and resend.
Thanks for reviewing.
Cheers,
Ander
+ switch (format) {
+ case GBM_BO_FORMAT_XRGB:
+ case GBM_FORMAT_XRGB:
+ break;
+ case GBM_BO_FORMAT_ARGB:
+ case GBM_FORMAT_ARGB:
+ if (usage GBM_BO_USE_SCANOUT)
+ return 0;
+ break;
+ default:
+ return 0;
+ }
+
+ if (usage GBM_BO_USE_CURSOR_64X64
+ usage GBM_BO_USE_RENDERING)
+ return 0;
+
+ return 1;
+}
+
[snip]
+
+static inline int
+align(int value, int size)
+{
Please use ALIGN from mesa/main/macros.h
+ return (value + size - 1) ~(size - 1);
+}
+
[snip]
+
+static struct gbm_device *
+gbm_intel_device_create(int fd)
+{
+ struct gbm_intel_device *igbm;
+
+ igbm = calloc(1, sizeof *igbm);
+ if (igbm == NULL)
+ return NULL;
-Emil
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Re: [Mesa-dev] [PATCH V3 00/30] ARB_texture_view for i965
Ian, Would we put that format in a view class by itself? -- Chris On Wed, Apr 9, 2014 at 7:49 AM, Ian Romanick i...@freedesktop.org wrote: On 04/08/2014 02:13 AM, Kenneth Graunke wrote: On 04/02/2014 01:04 AM, Chris Forbes wrote: This series adds ARB_texture_view support for i965 Gen7/7.5. Significant changes from V2: - All the assorted post-V2 format fixups are moved to the start of the series. This gives us consistent memory layout for all the formats between which we have to support casting. - Texture validation changes are simplified (Eric) - CopyTexSubImage respects view parameters. Series is: Reviewed-by: Kenneth Graunke kenn...@whitecape.org I do think it would be worth trying various benchmarks and games against the series, to see if the RGBA vs. BGRA swizzling issue makes much of a difference. It will probably change some things, but I don't have a good sense of how. I believe the losing BGRA is going to hurt web browsers... Eric also indicated that it would hurt Glamor. I think we should add an extension that enables BGRA for TexStorage. On ES, EXT_texture_storage + APPLE_texture_format_BGRA does this by adding GL_BGRA8_EXT as an internal format for *only* TexStorage. I'll also need to port this to Gen8... Nice work, Chris! Thanks for doing this. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 00/11] Map support for GBM
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com Changes from previous version: - make it clearer that the interface is optional; - fix other issues raised on the last review round. Thanks, Ander Ander Conselvan de Oliveira (10): gbm/dri: Fix out-of-memory error path in dri_device_create() gbm: Set errno on errors gbm: Move private pointer from gbm_dri_surface to gbm_surface egl: Protect use of gbm_dri with ifdef HAVE_DRM_PLATFORM gbm: Add a native intel backend gbm_drm: Keep a reference to drm native objects dri, i965: Add an extension for sharing the drm bufmgr dri, i965: Add entry point for creating image from native handle egl/drm: Add support for native gbm backends gbm: Add entry points for mapping and unmapping bos Neil Roberts (1): wayland: Fix the logic in disabling the prime capability include/GL/internal/dri_interface.h | 24 ++- src/egl/drivers/dri2/egl_dri2.c | 11 +- src/egl/drivers/dri2/egl_dri2.h | 8 +- src/egl/drivers/dri2/platform_drm.c | 252 -- src/egl/drivers/dri2/platform_wayland.c | 2 +- src/gbm/Makefile.am | 12 ++ src/gbm/backends/dri/gbm_dri.c| 49 -- src/gbm/backends/dri/gbm_driint.h | 2 - src/gbm/backends/intel/gbm_intel.c| 282 ++ src/gbm/backends/intel/gbm_intel.h| 76 src/gbm/main/backend.c| 2 + src/gbm/main/common_drm.h | 13 ++ src/gbm/main/gbm.c| 73 +++- src/gbm/main/gbm.h| 11 ++ src/gbm/main/gbmint.h | 4 + src/mesa/drivers/dri/common/dri_util.c| 2 + src/mesa/drivers/dri/common/dri_util.h| 1 + src/mesa/drivers/dri/i965/intel_regions.c | 50 +++--- src/mesa/drivers/dri/i965/intel_regions.h | 6 + src/mesa/drivers/dri/i965/intel_screen.c | 46 - 20 files changed, 821 insertions(+), 105 deletions(-) create mode 100644 src/gbm/backends/intel/gbm_intel.c create mode 100644 src/gbm/backends/intel/gbm_intel.h -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 04/11] gbm: Move private pointer from gbm_dri_surface to gbm_surface
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
This allows the pointer stored in dri2_surf in the EGL platform to be
changed to a generic gbm_surface pointer.
---
src/egl/drivers/dri2/egl_dri2.h | 2 +-
src/egl/drivers/dri2/platform_drm.c | 37 -
src/gbm/backends/dri/gbm_dri.c | 8
src/gbm/backends/dri/gbm_driint.h | 2 --
src/gbm/main/gbmint.h | 2 ++
5 files changed, 23 insertions(+), 28 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index e62e265..990b246 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -235,7 +235,7 @@ struct dri2_egl_surface
#endif
#ifdef HAVE_DRM_PLATFORM
- struct gbm_dri_surface *gbm_surf;
+ struct gbm_surface *gbm_surface;
#endif
#if defined(HAVE_WAYLAND_PLATFORM) || defined(HAVE_DRM_PLATFORM)
diff --git a/src/egl/drivers/dri2/platform_drm.c
b/src/egl/drivers/dri2/platform_drm.c
index 9a7633a..70b26ea 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -40,10 +40,9 @@
#include loader.h
static struct gbm_bo *
-lock_front_buffer(struct gbm_surface *_surf)
+lock_front_buffer(struct gbm_surface *surf)
{
- struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
- struct dri2_egl_surface *dri2_surf = surf-dri_private;
+ struct dri2_egl_surface *dri2_surf = surf-priv;
struct gbm_bo *bo;
if (dri2_surf-current == NULL) {
@@ -59,10 +58,9 @@ lock_front_buffer(struct gbm_surface *_surf)
}
static void
-release_buffer(struct gbm_surface *_surf, struct gbm_bo *bo)
+release_buffer(struct gbm_surface *surf, struct gbm_bo *bo)
{
- struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
- struct dri2_egl_surface *dri2_surf = surf-dri_private;
+ struct dri2_egl_surface *dri2_surf = surf-priv;
int i;
for (i = 0; i ARRAY_SIZE(dri2_surf-color_buffers); i++) {
@@ -73,10 +71,9 @@ release_buffer(struct gbm_surface *_surf, struct gbm_bo *bo)
}
static int
-has_free_buffers(struct gbm_surface *_surf)
+has_free_buffers(struct gbm_surface *surf)
{
- struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
- struct dri2_egl_surface *dri2_surf = surf-dri_private;
+ struct dri2_egl_surface *dri2_surf = surf-priv;
int i;
for (i = 0; i ARRAY_SIZE(dri2_surf-color_buffers); i++)
@@ -94,8 +91,7 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
EGLint type,
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_config *dri2_conf = dri2_egl_config(conf);
struct dri2_egl_surface *dri2_surf;
- struct gbm_surface *window = native_window;
- struct gbm_dri_surface *surf;
+ struct gbm_surface *surf = native_window;
(void) drv;
@@ -110,13 +106,12 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay
*disp, EGLint type,
switch (type) {
case EGL_WINDOW_BIT:
- if (!window)
+ if (!surf)
return NULL;
- surf = gbm_dri_surface(window);
- dri2_surf-gbm_surf = surf;
- dri2_surf-base.Width = surf-base.width;
- dri2_surf-base.Height = surf-base.height;
- surf-dri_private = dri2_surf;
+ dri2_surf-gbm_surface = surf;
+ dri2_surf-base.Width = surf-width;
+ dri2_surf-base.Height = surf-height;
+ surf-priv = dri2_surf;
break;
default:
goto cleanup_surf;
@@ -125,7 +120,7 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
EGLint type,
dri2_surf-dri_drawable =
(*dri2_dpy-dri2-createNewDrawable) (dri2_dpy-dri_screen,
dri2_conf-dri_double_config,
- dri2_surf-gbm_surf);
+ dri2_surf-gbm_surface);
if (dri2_surf-dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, dri2-createNewDrawable);
@@ -197,7 +192,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
{
struct dri2_egl_display *dri2_dpy =
dri2_egl_display(dri2_surf-base.Resource.Display);
- struct gbm_dri_surface *surf = dri2_surf-gbm_surf;
+ struct gbm_surface *surf = dri2_surf-gbm_surface;
int i;
if (dri2_surf-back == NULL) {
@@ -213,8 +208,8 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
return -1;
if (dri2_surf-back-bo == NULL)
dri2_surf-back-bo = gbm_bo_create(dri2_dpy-gbm_dri-base.base,
- surf-base.width, surf-base.height,
- surf-base.format, surf-base.flags);
+ surf-width, surf-height,
+ surf-format, surf-flags);
if (dri2_surf-back-bo == NULL)
return -1;
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index 9d08a97..cbb4c8c 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@
[Mesa-dev] [PATCH 03/11] wayland: Fix the logic in disabling the prime capability
From: Neil Roberts n...@linux.intel.com
It looks like this bit of code is trying to disable the prime capability if
the driver doesn't support createImageFromFds. However the logic looks a bit
broken and what it would actually do is disable all other capabilities apart
from prime. This patch fixes it to actually disable prime.
Cc: 10.0 10.1 mesa-sta...@lists.freedesktop.org
Reviewed-by: Emil Velikov emil.l.veli...@gmail.com
---
src/egl/drivers/dri2/platform_wayland.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/egl/drivers/dri2/platform_wayland.c
b/src/egl/drivers/dri2/platform_wayland.c
index 691f3e1..37dcf19 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -1049,7 +1049,7 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay
*disp)
if (dri2_dpy-image-base.version 7 ||
dri2_dpy-image-createImageFromFds == NULL)
- dri2_dpy-capabilities = WL_DRM_CAPABILITY_PRIME;
+ dri2_dpy-capabilities = ~WL_DRM_CAPABILITY_PRIME;
types = EGL_WINDOW_BIT;
for (i = 0; dri2_dpy-driver_configs[i]; i++) {
--
1.8.3.2
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[Mesa-dev] [PATCH 05/11] egl: Protect use of gbm_dri with ifdef HAVE_DRM_PLATFORM
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com Otherwise it fails to compile if the drm egl platform is disabled. Cc: 10.0 10.1 mesa-sta...@lists.freedesktop.org Reviewed-by: Emil Velikov emil.l.veli...@gmail.com --- src/egl/drivers/dri2/egl_dri2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index dc541ad..a132964 100644 --- a/src/egl/drivers/dri2/egl_dri2.c +++ b/src/egl/drivers/dri2/egl_dri2.c @@ -2013,10 +2013,12 @@ dri2_bind_wayland_display_wl(_EGLDriver *drv, _EGLDisplay *disp, if (!dri2_dpy-wl_server_drm) return EGL_FALSE; +#ifdef HAVE_DRM_PLATFORM /* We have to share the wl_drm instance with gbm, so gbm can convert * wl_buffers to gbm bos. */ if (dri2_dpy-gbm_dri) dri2_dpy-gbm_dri-wl_drm = dri2_dpy-wl_server_drm; +#endif return EGL_TRUE; } -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 11/11] gbm: Add entry points for mapping and unmapping bos
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Add gbm_bo_map() and gbm_bo_unmap(). This lets a user access the
contents of a bo using the CPU.
v2:
- improve documentation to clarify this is an optional interface;
- make gbm_bo_create() fail with ENOSYS if the GBM_BO_USE_MAP flag
was supplied and gbm_bo_map() is not implemented.
---
src/gbm/backends/dri/gbm_dri.c | 3 +++
src/gbm/backends/intel/gbm_intel.c | 24 +
src/gbm/backends/intel/gbm_intel.h | 2 ++
src/gbm/main/gbm.c | 53 ++
src/gbm/main/gbm.h | 11
src/gbm/main/gbmint.h | 2 ++
6 files changed, 95 insertions(+)
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index cbb4c8c..8295a25 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -346,6 +346,9 @@ gbm_dri_is_format_supported(struct gbm_device *gbm,
usage GBM_BO_USE_RENDERING)
return 0;
+ if (usage GBM_BO_USE_MAP)
+ return 0;
+
return 1;
}
diff --git a/src/gbm/backends/intel/gbm_intel.c
b/src/gbm/backends/intel/gbm_intel.c
index c897f70..ced75d5 100644
--- a/src/gbm/backends/intel/gbm_intel.c
+++ b/src/gbm/backends/intel/gbm_intel.c
@@ -76,6 +76,24 @@ gbm_intel_bo_write(struct gbm_bo *bo, const void *buf,
size_t count)
return drm_intel_bo_unmap(ibo-bo);
}
+static void *
+gbm_intel_bo_map(struct gbm_bo *bo)
+{
+ struct gbm_intel_bo *ibo = gbm_intel_bo(bo);
+
+ drm_intel_bo_map(ibo-bo, 1);
+
+ return ibo-bo-virtual;
+}
+
+static void
+gbm_intel_bo_unmap(struct gbm_bo *bo)
+{
+ struct gbm_intel_bo *ibo = gbm_intel_bo(bo);
+
+ drm_intel_bo_unmap(ibo-bo);
+}
+
static void
gbm_intel_bo_destroy(struct gbm_bo *_bo)
{
@@ -99,6 +117,7 @@ gbm_intel_bo_create_with_bo(struct gbm_device *gbm,
return NULL;
ibo-bo = bo;
+ ibo-usage = usage;
ibo-base.base.gbm = gbm;
ibo-base.base.width = width;
@@ -141,6 +160,9 @@ gbm_intel_bo_create(struct gbm_device *gbm,
tiling = I915_TILING_NONE;
}
+ if (usage GBM_BO_USE_MAP)
+ tiling = I915_TILING_NONE;
+
if (usage GBM_BO_USE_RENDERING)
flags |= BO_ALLOC_FOR_RENDER;
@@ -233,6 +255,8 @@ gbm_intel_device_create(int fd)
igbm-base.base.is_format_supported = gbm_intel_is_format_supported;
igbm-base.base.bo_write = gbm_intel_bo_write;
igbm-base.base.bo_get_fd = gbm_intel_bo_get_fd;
+ igbm-base.base.bo_map = gbm_intel_bo_map;
+ igbm-base.base.bo_unmap = gbm_intel_bo_unmap;
igbm-base.base.bo_destroy = gbm_intel_bo_destroy;
igbm-base.base.destroy = gbm_intel_destroy;
igbm-base.base.surface_create = gbm_intel_surface_create;
diff --git a/src/gbm/backends/intel/gbm_intel.h
b/src/gbm/backends/intel/gbm_intel.h
index af0689b..1958355 100644
--- a/src/gbm/backends/intel/gbm_intel.h
+++ b/src/gbm/backends/intel/gbm_intel.h
@@ -46,6 +46,8 @@ struct gbm_intel_device {
struct gbm_intel_bo {
struct gbm_drm_bo base;
+ uint32_t usage;
+
drm_intel_bo *bo;
};
diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c
index 907ca3c..42d0d78 100644
--- a/src/gbm/main/gbm.c
+++ b/src/gbm/main/gbm.c
@@ -267,6 +267,49 @@ gbm_bo_write(struct gbm_bo *bo, const void *buf, size_t
count)
return bo-gbm-bo_write(bo, buf, count);
}
+/** Map a buffer object in CPU accesible memory
+ *
+ * \remark A GBM backend may not implement this interface. Users should
+ * implement a fallback path.
+ *
+ * This makes the content of the bo available for CPU access until
+ * \ref gbm_bo_unmap() is called. Synchronization between CPU and GPU
+ * will be done at unmap time, so the caller shouldn't assume coherency
+ * for mapped buffers.
+ *
+ * A GBM backend may choose not to implement this functionality. In that
+ * case, both this function and \ref gbm_bo_create() with the \ref
+ * GBM_BO_USE_MAP flag should fail, and errno set to ENOSYS.
+ *
+ * \param bo The buffer object to be mapped
+ * \return Pointer to the mapped buffer object or NULL on failure
+ */
+GBM_EXPORT void *
+gbm_bo_map(struct gbm_bo *bo)
+{
+ if (!bo-gbm-bo_map) {
+ errno = ENOSYS;
+ return NULL;
+ }
+
+ return bo-gbm-bo_map(bo);
+}
+
+/** Unmap a previously mapped buffer object
+ *
+ * Unmaps the given bo and perform any necessary synchronization such as
+ * cache flushing, copying, etc, so that the GPU sees the same data as
+ * written by the CPU.
+ *
+ * \param The buffer object to be unmapped
+ */
+GBM_EXPORT void
+gbm_bo_unmap(struct gbm_bo *bo)
+{
+ if (bo-gbm-bo_unmap)
+ bo-gbm-bo_unmap(bo);
+}
+
/** Get the gbm device used to create the buffer object
*
* \param bo The buffer object
@@ -335,6 +378,11 @@ gbm_bo_destroy(struct gbm_bo *bo)
* when no longer needed. If an error occurs during allocation %NULL will be
* returned and errno set.
*
+ * Allocation may also fail due to an unsupported usage type. For instance,
+ * the flag \ref GBM_BO_USE_MAP
[Mesa-dev] [PATCH 10/11] egl/drm: Add support for native gbm backends
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
---
src/egl/drivers/dri2/egl_dri2.c | 9 +-
src/egl/drivers/dri2/egl_dri2.h | 3 +-
src/egl/drivers/dri2/platform_drm.c | 217 ++--
src/gbm/main/common_drm.h | 6 +
4 files changed, 200 insertions(+), 35 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index a132964..5f5b452 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -684,7 +684,7 @@ dri2_terminate(_EGLDriver *drv, _EGLDisplay *disp)
#ifdef HAVE_DRM_PLATFORM
case _EGL_PLATFORM_DRM:
if (dri2_dpy-own_device) {
- gbm_device_destroy(dri2_dpy-gbm_dri-base.base);
+ gbm_device_destroy(dri2_dpy-gbm_drm-base);
}
break;
#endif
@@ -2016,8 +2016,11 @@ dri2_bind_wayland_display_wl(_EGLDriver *drv,
_EGLDisplay *disp,
#ifdef HAVE_DRM_PLATFORM
/* We have to share the wl_drm instance with gbm, so gbm can convert
* wl_buffers to gbm bos. */
- if (dri2_dpy-gbm_dri)
- dri2_dpy-gbm_dri-wl_drm = dri2_dpy-wl_server_drm;
+ if (dri2_dpy-gbm_drm
+ dri2_dpy-gbm_drm-type == GBM_DRM_DRIVER_TYPE_DRI) {
+ struct gbm_dri_device *gbm_dri =
gbm_dri_device(dri2_dpy-gbm_drm-base);
+ gbm_dri-wl_drm = dri2_dpy-wl_server_drm;
+ }
#endif
return EGL_TRUE;
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 7c19f5e..bad5fb0 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -44,6 +44,7 @@
#include GL/internal/dri_interface.h
#ifdef HAVE_DRM_PLATFORM
+#include common_drm.h
#include gbm_driint.h
#endif
@@ -167,7 +168,7 @@ struct dri2_egl_display
int max_swap_interval;
int default_swap_interval;
#ifdef HAVE_DRM_PLATFORM
- struct gbm_dri_device*gbm_dri;
+ struct gbm_drm_device*gbm_drm;
#endif
char *device_name;
diff --git a/src/egl/drivers/dri2/platform_drm.c
b/src/egl/drivers/dri2/platform_drm.c
index 70b26ea..3b3458e 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -39,6 +39,10 @@
#include egl_dri2_fallbacks.h
#include loader.h
+static __DRIimage *
+bo_to_dri_image(struct gbm_bo *bo, struct dri2_egl_display *dri2_dpy,
+void *loaderPrivate);
+
static struct gbm_bo *
lock_front_buffer(struct gbm_surface *surf)
{
@@ -92,6 +96,7 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
EGLint type,
struct dri2_egl_config *dri2_conf = dri2_egl_config(conf);
struct dri2_egl_surface *dri2_surf;
struct gbm_surface *surf = native_window;
+ void *loaderPrivate;
(void) drv;
@@ -117,10 +122,15 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay
*disp, EGLint type,
goto cleanup_surf;
}
+ if (dri2_dpy-gbm_drm-type == GBM_DRM_DRIVER_TYPE_DRI)
+ loaderPrivate = dri2_surf-gbm_surface;
+ else
+ loaderPrivate = dri2_surf;
+
dri2_surf-dri_drawable =
(*dri2_dpy-dri2-createNewDrawable) (dri2_dpy-dri_screen,
dri2_conf-dri_double_config,
- dri2_surf-gbm_surface);
+ loaderPrivate);
if (dri2_surf-dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, dri2-createNewDrawable);
@@ -207,7 +217,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
if (dri2_surf-back == NULL)
return -1;
if (dri2_surf-back-bo == NULL)
- dri2_surf-back-bo = gbm_bo_create(dri2_dpy-gbm_dri-base.base,
+ dri2_surf-back-bo = gbm_bo_create(dri2_dpy-gbm_drm-base,
surf-width, surf-height,
surf-format, surf-flags);
if (dri2_surf-back-bo == NULL)
@@ -343,14 +353,14 @@ dri2_drm_image_get_buffers(__DRIdrawable *driDrawable,
struct __DRIimageList *buffers)
{
struct dri2_egl_surface *dri2_surf = loaderPrivate;
- struct gbm_dri_bo *bo;
+ struct dri2_egl_display *dri2_dpy =
+ dri2_egl_display(dri2_surf-base.Resource.Display);
if (get_back_bo(dri2_surf) 0)
return 0;
- bo = (struct gbm_dri_bo *) dri2_surf-back-bo;
buffers-image_mask = __DRI_IMAGE_BUFFER_BACK;
- buffers-back = bo-image;
+ buffers-back = bo_to_dri_image(dri2_surf-back-bo, dri2_dpy, NULL);
return 1;
}
@@ -362,6 +372,13 @@ dri2_drm_flush_front_buffer(__DRIdrawable * driDrawable,
void *loaderPrivate)
(void) loaderPrivate;
}
+static const __DRIimageLoaderExtension image_loader_extension = {
+ .base = { __DRI_IMAGE_LOADER, 1 },
+
+ .getBuffers = dri2_drm_image_get_buffers,
+ .flushFrontBuffer= dri2_drm_flush_front_buffer,
+};
+
static EGLBoolean
dri2_drm_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *draw)
{
@@ -400,12 +417,78 @@
[Mesa-dev] [PATCH 06/11] gbm: Add a native intel backend
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
v2:
- restore src/gbm/Makefile.am include that was deleted by mistake;
- fix error path of gbm_intel_device_create();
- remove unused function align().
---
src/gbm/Makefile.am| 12 ++
src/gbm/backends/intel/gbm_intel.c | 254 +
src/gbm/backends/intel/gbm_intel.h | 74 +++
src/gbm/main/backend.c | 2 +
src/gbm/main/common_drm.h | 1 +
5 files changed, 343 insertions(+)
create mode 100644 src/gbm/backends/intel/gbm_intel.c
create mode 100644 src/gbm/backends/intel/gbm_intel.h
diff --git a/src/gbm/Makefile.am b/src/gbm/Makefile.am
index f6545ee..a6d177e 100644
--- a/src/gbm/Makefile.am
+++ b/src/gbm/Makefile.am
@@ -55,6 +55,18 @@ libgbm_la_LIBADD += \
libgbm_dri.la $(top_builddir)/src/mapi/shared-glapi/libglapi.la
$(LIBDRM_LIBS)
endif
+if HAVE_I965_DRI
+noinst_LTLIBRARIES = libgbm_intel.la
+libgbm_intel_la_SOURCES = \
+ backends/intel/gbm_intel.c
+
+libgbm_intel_la_CFLAGS = \
+ $(AM_CFLAGS) $(INTEL_CFLAGS)
+
+libgbm_la_LIBADD += \
+ libgbm_intel.la $(INTEL_LIBS)
+endif
+
TESTS = gbm-symbols-check
include $(top_srcdir)/install-lib-links.mk
diff --git a/src/gbm/backends/intel/gbm_intel.c
b/src/gbm/backends/intel/gbm_intel.c
new file mode 100644
index 000..767cf63
--- /dev/null
+++ b/src/gbm/backends/intel/gbm_intel.c
@@ -0,0 +1,254 @@
+/*
+ * Copyright © 2011-2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
+ */
+
+#include errno.h
+#include stdlib.h
+#include stdint.h
+#include string.h
+#include sys/types.h
+#include unistd.h
+
+#include gbm_intel.h
+
+#include gbmint.h
+
+static int
+gbm_intel_is_format_supported(struct gbm_device *gbm,
+uint32_t format,
+uint32_t usage)
+{
+ switch (format) {
+ case GBM_BO_FORMAT_XRGB:
+ case GBM_FORMAT_XRGB:
+ break;
+ case GBM_BO_FORMAT_ARGB:
+ case GBM_FORMAT_ARGB:
+ if (usage GBM_BO_USE_SCANOUT)
+ return 0;
+ break;
+ default:
+ return 0;
+ }
+
+ if (usage GBM_BO_USE_CURSOR_64X64
+ usage GBM_BO_USE_RENDERING)
+ return 0;
+
+ return 1;
+}
+
+static int
+gbm_intel_bo_write(struct gbm_bo *bo, const void *buf, size_t count)
+{
+ struct gbm_intel_bo *ibo = gbm_intel_bo(bo);
+ int ret;
+
+ ret = drm_intel_bo_map(ibo-bo, 1);
+ if (ret 0)
+ return ret;
+
+ memcpy(ibo-bo-virtual, buf, count);
+
+ return drm_intel_bo_unmap(ibo-bo);
+}
+
+static void
+gbm_intel_bo_destroy(struct gbm_bo *_bo)
+{
+ struct gbm_intel_bo *ibo = gbm_intel_bo(_bo);
+
+ drm_intel_bo_unreference(ibo-bo);
+
+ free(ibo);
+}
+
+static struct gbm_intel_bo *
+gbm_intel_bo_create_with_bo(struct gbm_device *gbm,
+uint32_t width, uint32_t height, uint32_t stride,
+uint32_t format, uint32_t usage,
+drm_intel_bo *bo)
+{
+ struct gbm_intel_bo *ibo;
+
+ ibo = calloc(1, sizeof *ibo);
+ if (!ibo)
+ return NULL;
+
+ ibo-bo = bo;
+
+ ibo-base.base.gbm = gbm;
+ ibo-base.base.width = width;
+ ibo-base.base.height = height;
+ ibo-base.base.stride = stride;
+ ibo-base.base.format = format;
+ ibo-base.base.handle.s32 = ibo-bo-handle;
+
+ return ibo;
+}
+
+static struct gbm_bo *
+gbm_intel_bo_create(struct gbm_device *gbm,
+uint32_t width, uint32_t height,
+uint32_t format, uint32_t usage)
+{
+ struct gbm_intel_device *igbm = gbm_intel_device(gbm);
+ struct gbm_intel_bo *ibo;
+ drm_intel_bo *bo;
+ uint32_t tiling;
+ unsigned long stride, flags = 0;
+
+ switch (format) {
+ case GBM_BO_FORMAT_XRGB:
+ case GBM_FORMAT_XRGB:
+
[Mesa-dev] [PATCH 07/11] gbm_drm: Keep a reference to drm native objects
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Add bo and bufmgr fields to gbm_drm_bo and gbm_drm_device respectively.
---
src/gbm/backends/intel/gbm_intel.c | 4
src/gbm/main/common_drm.h | 6 ++
2 files changed, 10 insertions(+)
diff --git a/src/gbm/backends/intel/gbm_intel.c
b/src/gbm/backends/intel/gbm_intel.c
index 767cf63..c897f70 100644
--- a/src/gbm/backends/intel/gbm_intel.c
+++ b/src/gbm/backends/intel/gbm_intel.c
@@ -107,6 +107,8 @@ gbm_intel_bo_create_with_bo(struct gbm_device *gbm,
ibo-base.base.format = format;
ibo-base.base.handle.s32 = ibo-bo-handle;
+ ibo-base.bo = bo;
+
return ibo;
}
@@ -245,6 +247,8 @@ gbm_intel_device_create(int fd)
return NULL;
}
+ igbm-base.bufmgr = igbm-bufmgr;
+
return igbm-base.base;
}
diff --git a/src/gbm/main/common_drm.h b/src/gbm/main/common_drm.h
index 9fa0716..c49a6f9 100644
--- a/src/gbm/main/common_drm.h
+++ b/src/gbm/main/common_drm.h
@@ -40,10 +40,16 @@ struct gbm_drm_device {
struct gbm_device base;
enum gbm_drm_driver_type type;
char *driver_name;
+
+ /* Driver dependent buffer manager object */
+ void *bufmgr;
};
struct gbm_drm_bo {
struct gbm_bo base;
+
+ /* Driver dependent buffer object */
+ void *bo;
};
#endif
--
1.8.3.2
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[Mesa-dev] [PATCH 08/11] dri, i965: Add an extension for sharing the drm bufmgr
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
If the fd used by the DRI driver is going to be shared with something
else, like gbm, this lets the loader pass the bufmgr struct so it is
shared too.
---
include/GL/internal/dri_interface.h | 11 +++
src/egl/drivers/dri2/egl_dri2.h | 3 ++-
src/mesa/drivers/dri/common/dri_util.c | 2 ++
src/mesa/drivers/dri/common/dri_util.h | 1 +
src/mesa/drivers/dri/i965/intel_screen.c | 9 +++--
5 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index d028d05..6c2312a 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -1424,4 +1424,15 @@ struct __DRIimageDriverExtensionRec {
__DRIgetAPIMaskFunc getAPIMask;
};
+/**
+ * Allows the DRI screen to share a low-level (drm) bufmgr with gbm.
+ */
+#define __DRI_SHARED_BUFMGR DRI_SHARED_BUFMGR
+#define __DRI_SHARED_BUFMGR_VERSION 1
+
+typedef struct __DRIsharedBufmgrExtensionRec {
+ __DRIextension base;
+ void *bufmgr;
+} __DRIsharedBufmgrExtension;
+
#endif
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 990b246..7c19f5e 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -175,7 +175,8 @@ struct dri2_egl_display
__DRIdri2LoaderExtensiondri2_loader_extension;
__DRIswrastLoaderExtension swrast_loader_extension;
- const __DRIextension *extensions[5];
+ __DRIsharedBufmgrExtension shared_bufmgr_extension;
+ const __DRIextension *extensions[6];
const __DRIextension**driver_extensions;
#ifdef HAVE_X11_PLATFORM
diff --git a/src/mesa/drivers/dri/common/dri_util.c
b/src/mesa/drivers/dri/common/dri_util.c
index aed73c7..3046d60 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -81,6 +81,8 @@ setupLoaderExtensions(__DRIscreen *psp,
psp-swrast_loader = (__DRIswrastLoaderExtension *) extensions[i];
if (strcmp(extensions[i]-name, __DRI_IMAGE_LOADER) == 0)
psp-image.loader = (__DRIimageLoaderExtension *) extensions[i];
+ if (strcmp(extensions[i]-name, __DRI_SHARED_BUFMGR) == 0)
+ psp-dri2.bufmgr = (__DRIsharedBufmgrExtension *) extensions[i];
}
}
diff --git a/src/mesa/drivers/dri/common/dri_util.h
b/src/mesa/drivers/dri/common/dri_util.h
index a37a0bb..49c380c 100644
--- a/src/mesa/drivers/dri/common/dri_util.h
+++ b/src/mesa/drivers/dri/common/dri_util.h
@@ -177,6 +177,7 @@ struct __DRIscreenRec {
__DRIdri2LoaderExtension *loader;
__DRIimageLookupExtension *image;
__DRIuseInvalidateExtension *useInvalidate;
+ __DRIsharedBufmgrExtension *bufmgr;
} dri2;
struct {
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index 8cb1260..8ffbf17 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -952,8 +952,10 @@ static void
intelDestroyScreen(__DRIscreen * sPriv)
{
struct intel_screen *intelScreen = sPriv-driverPrivate;
+ __DRIscreen *spriv = intelScreen-driScrnPriv;
- dri_bufmgr_destroy(intelScreen-bufmgr);
+ if (!spriv-dri2.bufmgr)
+ dri_bufmgr_destroy(intelScreen-bufmgr);
driDestroyOptionInfo(intelScreen-optionCache);
ralloc_free(intelScreen);
@@ -1074,7 +1076,10 @@ intel_init_bufmgr(struct intel_screen *intelScreen)
intelScreen-no_hw = getenv(INTEL_NO_HW) != NULL;
- intelScreen-bufmgr = intel_bufmgr_gem_init(spriv-fd, BATCH_SZ);
+ if (spriv-dri2.bufmgr)
+ intelScreen-bufmgr = spriv-dri2.bufmgr-bufmgr;
+ else
+ intelScreen-bufmgr = intel_bufmgr_gem_init(spriv-fd, BATCH_SZ);
if (intelScreen-bufmgr == NULL) {
fprintf(stderr, [%s:%u] Error initializing buffer manager.\n,
__func__, __LINE__);
--
1.8.3.2
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[Mesa-dev] [PATCH 09/11] dri, i965: Add entry point for creating image from native handle
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
The native handle is a pointer to drm_intel_bo for the i965 driver.
---
include/GL/internal/dri_interface.h | 13 +++-
src/mesa/drivers/dri/i965/intel_regions.c | 50 ++-
src/mesa/drivers/dri/i965/intel_regions.h | 6
src/mesa/drivers/dri/i965/intel_screen.c | 37 +--
4 files changed, 82 insertions(+), 24 deletions(-)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index 6c2312a..552dd2a 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -1005,7 +1005,7 @@ struct __DRIdri2ExtensionRec {
* extensions.
*/
#define __DRI_IMAGE DRI_IMAGE
-#define __DRI_IMAGE_VERSION 8
+#define __DRI_IMAGE_VERSION 9
/**
* These formats correspond to the similarly named MESA_FORMAT_*
@@ -1239,6 +1239,17 @@ struct __DRIimageExtensionRec {
enum __DRIChromaSiting vert_siting,
unsigned *error,
void *loaderPrivate);
+ /**
+* Create image from a driver-dependent handle. Depends on the shared
+* bufmgr extension.
+*
+* \since 9 ?
+*/
+ __DRIimage *(*createImageFromHandle)(__DRIscreen *screen,
+ int width, int height, int format,
+ void *handle, int pitch,
+ void *loaderPrivate);
+
};
diff --git a/src/mesa/drivers/dri/i965/intel_regions.c
b/src/mesa/drivers/dri/i965/intel_regions.c
index d891e09..745bfe6 100644
--- a/src/mesa/drivers/dri/i965/intel_regions.c
+++ b/src/mesa/drivers/dri/i965/intel_regions.c
@@ -172,30 +172,47 @@ intel_region_flink(struct intel_region *region, uint32_t
*name)
}
struct intel_region *
-intel_region_alloc_for_handle(struct intel_screen *screen,
+intel_region_alloc_for_buffer(struct intel_screen *screen,
GLuint cpp,
GLuint width, GLuint height, GLuint pitch,
- GLuint handle, const char *name)
+ drm_intel_bo *buffer, const char *name)
{
struct intel_region *region;
- drm_intel_bo *buffer;
int ret;
uint32_t bit_6_swizzle, tiling;
- buffer = intel_bo_gem_create_from_name(screen-bufmgr, name, handle);
- if (buffer == NULL)
- return NULL;
ret = drm_intel_bo_get_tiling(buffer, tiling, bit_6_swizzle);
if (ret != 0) {
- fprintf(stderr, Couldn't get tiling of buffer %d (%s): %s\n,
- handle, name, strerror(-ret));
- drm_intel_bo_unreference(buffer);
+ fprintf(stderr, Couldn't get tiling of buffer (%s): %s\n,
+ name, strerror(-ret));
return NULL;
}
region = intel_region_alloc_internal(screen, cpp,
width, height, pitch, tiling, buffer);
- if (region == NULL) {
+ if (region == NULL)
+ return NULL;
+
+ return region;
+}
+
+struct intel_region *
+intel_region_alloc_for_handle(struct intel_screen *screen,
+ GLuint cpp,
+ GLuint width, GLuint height, GLuint pitch,
+ GLuint handle, const char *name)
+{
+ struct intel_region *region;
+ drm_intel_bo *buffer;
+
+ buffer = intel_bo_gem_create_from_name(screen-bufmgr, name, handle);
+ if (buffer == NULL)
+ return NULL;
+
+ region = intel_region_alloc_for_buffer(screen, cpp, width, height, pitch,
+ buffer, name);
+
+ if (!region) {
drm_intel_bo_unreference(buffer);
return NULL;
}
@@ -214,22 +231,13 @@ intel_region_alloc_for_fd(struct intel_screen *screen,
{
struct intel_region *region;
drm_intel_bo *buffer;
- int ret;
- uint32_t bit_6_swizzle, tiling;
buffer = drm_intel_bo_gem_create_from_prime(screen-bufmgr, fd, size);
if (buffer == NULL)
return NULL;
- ret = drm_intel_bo_get_tiling(buffer, tiling, bit_6_swizzle);
- if (ret != 0) {
- fprintf(stderr, Couldn't get tiling of buffer (%s): %s\n,
- name, strerror(-ret));
- drm_intel_bo_unreference(buffer);
- return NULL;
- }
- region = intel_region_alloc_internal(screen, cpp,
- width, height, pitch, tiling, buffer);
+ region = intel_region_alloc_for_buffer(screen, cpp, width, height, pitch,
+ buffer, name);
if (region == NULL) {
drm_intel_bo_unreference(buffer);
return NULL;
diff --git a/src/mesa/drivers/dri/i965/intel_regions.h
b/src/mesa/drivers/dri/i965/intel_regions.h
index eb2123e..a35eae8 100644
--- a/src/mesa/drivers/dri/i965/intel_regions.h
+++ b/src/mesa/drivers/dri/i965/intel_regions.h
@@ -83,6 +83,12 @@ struct intel_region *intel_region_alloc(struct intel_screen
[Mesa-dev] [PATCH 01/11] gbm/dri: Fix out-of-memory error path in dri_device_create()
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com Cc: 10.0 10.1 mesa-sta...@lists.freedesktop.org --- src/gbm/backends/dri/gbm_dri.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c index 50fa588..f681836 100644 --- a/src/gbm/backends/dri/gbm_dri.c +++ b/src/gbm/backends/dri/gbm_dri.c @@ -722,6 +722,8 @@ dri_device_create(int fd) int ret; dri = calloc(1, sizeof *dri); + if (!dri) + return NULL; dri-base.base.fd = fd; dri-base.base.bo_create = gbm_dri_bo_create; -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 02/11] gbm: Set errno on errors
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
This should give the caller some information of what called the error.
For the gbm_bo_import() case, for instance, it is possible to know if
the import is not supported or the error was caused by an invalid
parameter.
---
src/gbm/backends/dri/gbm_dri.c | 36
src/gbm/main/gbm.c | 20 +---
2 files changed, 41 insertions(+), 15 deletions(-)
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index f681836..9d08a97 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -30,6 +30,7 @@
#include stddef.h
#include stdint.h
#include string.h
+#include errno.h
#include limits.h
#include sys/types.h
@@ -353,8 +354,10 @@ gbm_dri_bo_write(struct gbm_bo *_bo, const void *buf,
size_t count)
{
struct gbm_dri_bo *bo = gbm_dri_bo(_bo);
- if (bo-image != NULL)
+ if (bo-image != NULL) {
+ errno = EINVAL;
return -1;
+ }
memcpy(bo-map, buf, count);
@@ -432,8 +435,10 @@ gbm_dri_bo_import(struct gbm_device *gbm,
int gbm_format;
/* Required for query image WIDTH HEIGHT */
- if (dri-image-base.version 4)
+ if (dri-image-base.version 4) {
+ errno = ENOSYS;
return NULL;
+ }
switch (type) {
#if HAVE_WAYLAND_PLATFORM
@@ -441,12 +446,16 @@ gbm_dri_bo_import(struct gbm_device *gbm,
{
struct wl_drm_buffer *wb;
- if (!dri-wl_drm)
+ if (!dri-wl_drm) {
+ errno = EINVAL;
return NULL;
+ }
wb = wayland_drm_buffer_get(dri-wl_drm, (struct wl_resource *) buffer);
- if (!wb)
+ if (!wb) {
+ errno = EINVAL;
return NULL;
+ }
image = dri-image-dupImage(wb-driver_buffer, NULL);
@@ -473,15 +482,19 @@ gbm_dri_bo_import(struct gbm_device *gbm,
case GBM_BO_IMPORT_EGL_IMAGE:
{
int dri_format;
- if (dri-lookup_image == NULL)
+ if (dri-lookup_image == NULL) {
+ errno = EINVAL;
return NULL;
+ }
image = dri-lookup_image(dri-screen, buffer, dri-lookup_user_data);
image = dri-image-dupImage(image, NULL);
dri-image-queryImage(image, __DRI_IMAGE_ATTRIB_FORMAT, dri_format);
gbm_format = gbm_dri_to_gbm_format(dri_format);
- if (gbm_format == 0)
+ if (gbm_format == 0) {
+ errno = EINVAL;
return NULL;
+ }
break;
}
@@ -502,6 +515,7 @@ gbm_dri_bo_import(struct gbm_device *gbm,
}
default:
+ errno = ENOSYS;
return NULL;
}
@@ -518,6 +532,7 @@ gbm_dri_bo_import(struct gbm_device *gbm,
dri_use |= __DRI_IMAGE_USE_CURSOR;
if (dri-image-base.version = 2
!dri-image-validateUsage(bo-image, dri_use)) {
+ errno = EINVAL;
free(bo);
return NULL;
}
@@ -549,10 +564,14 @@ create_dumb(struct gbm_device *gbm,
struct drm_mode_destroy_dumb destroy_arg;
int ret;
- if (!(usage GBM_BO_USE_CURSOR_64X64))
+ if (!(usage GBM_BO_USE_CURSOR_64X64)) {
+ errno = EINVAL;
return NULL;
- if (format != GBM_FORMAT_ARGB)
+ }
+ if (format != GBM_FORMAT_ARGB) {
+ errno = EINVAL;
return NULL;
+ }
bo = calloc(1, sizeof *bo);
if (bo == NULL)
@@ -643,6 +662,7 @@ gbm_dri_bo_create(struct gbm_device *gbm,
dri_format = __DRI_IMAGE_FORMAT_XRGB2101010;
break;
default:
+ errno = EINVAL;
goto failed;
}
diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c
index 6179e5b..907ca3c 100644
--- a/src/gbm/main/gbm.c
+++ b/src/gbm/main/gbm.c
@@ -36,6 +36,7 @@
#include sys/types.h
#include sys/stat.h
#include unistd.h
+#include errno.h
#include gbm.h
#include gbmint.h
@@ -109,7 +110,7 @@ _gbm_mesa_get_device(int fd)
int i;
if (fd 0 || fstat(fd, buf) 0 || !S_ISCHR(buf.st_mode)) {
- fprintf(stderr, _gbm_mesa_get_device: invalid fd: %d\n, fd);
+ errno = EINVAL;
return NULL;
}
@@ -145,7 +146,7 @@ gbm_create_device(int fd)
struct stat buf;
if (fd 0 || fstat(fd, buf) 0 || !S_ISCHR(buf.st_mode)) {
- fprintf(stderr, gbm_create_device: invalid fd: %d\n, fd);
+ errno = EINVAL;
return NULL;
}
@@ -258,7 +259,7 @@ gbm_bo_get_fd(struct gbm_bo *bo)
* \param bo The buffer object
* \param buf The data to write
* \param count The number of bytes to write
- * \return Returns -1 on error, 0 otherwise
+ * \return Returns 0 on success, otherwise -1 is returned an errno set
*/
GBM_EXPORT int
gbm_bo_write(struct gbm_bo *bo, const void *buf, size_t count)
@@ -332,7 +333,7 @@ gbm_bo_destroy(struct gbm_bo *bo)
*
* \return A newly allocated buffer that should be freed with gbm_bo_destroy()
* when no longer needed. If an error occurs during allocation %NULL will be
- * returned.
+ * returned and errno set.
*
* \sa enum gbm_bo_format for the list of formats
* \sa enum gbm_bo_flags for the list of usage
[Mesa-dev] [PATCH v2 1/5] st/xa: remove unneeded args
From: Rob Clark robcl...@freedesktop.org
Signed-off-by: Rob Clark robcl...@freedesktop.org
---
src/gallium/state_trackers/xa/xa_composite.c | 3 +--
src/gallium/state_trackers/xa/xa_context.c | 5 +
src/gallium/state_trackers/xa/xa_priv.h | 3 +--
src/gallium/state_trackers/xa/xa_renderer.c | 7 ---
src/gallium/state_trackers/xa/xa_yuv.c | 2 +-
5 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/src/gallium/state_trackers/xa/xa_composite.c
b/src/gallium/state_trackers/xa/xa_composite.c
index abe5be2..b65f6eb 100644
--- a/src/gallium/state_trackers/xa/xa_composite.c
+++ b/src/gallium/state_trackers/xa/xa_composite.c
@@ -477,8 +477,7 @@ xa_composite_prepare(struct xa_context *ctx,
return ret;
ctx-dst = dst_srf;
-renderer_bind_destination(ctx, ctx-srf, ctx-srf-width,
- ctx-srf-height);
+renderer_bind_destination(ctx, ctx-srf);
ret = bind_composite_blend_state(ctx, comp);
if (ret != XA_ERR_NONE)
diff --git a/src/gallium/state_trackers/xa/xa_context.c
b/src/gallium/state_trackers/xa/xa_context.c
index c2dc53b..ee32676 100644
--- a/src/gallium/state_trackers/xa/xa_context.c
+++ b/src/gallium/state_trackers/xa/xa_context.c
@@ -281,7 +281,6 @@ xa_solid_prepare(struct xa_context *ctx, struct xa_surface
*dst,
{
unsigned vs_traits, fs_traits;
struct xa_shader shader;
-int width, height;
int ret;
ret = xa_ctx_srf_create(ctx, dst);
@@ -295,8 +294,6 @@ xa_solid_prepare(struct xa_context *ctx, struct xa_surface
*dst,
ctx-has_solid_color = 1;
ctx-dst = dst;
-width = ctx-srf-width;
-height = ctx-srf-height;
#if 0
debug_printf(Color Pixel=(%d, %d, %d, %d), RGBA=(%f, %f, %f, %f)\n,
@@ -309,7 +306,7 @@ xa_solid_prepare(struct xa_context *ctx, struct xa_surface
*dst,
vs_traits = VS_SOLID_FILL;
fs_traits = FS_SOLID_FILL;
-renderer_bind_destination(ctx, ctx-srf, width, height);
+renderer_bind_destination(ctx, ctx-srf);
bind_solid_blend_state(ctx);
cso_set_samplers(ctx-cso, PIPE_SHADER_FRAGMENT, 0, NULL);
cso_set_sampler_views(ctx-cso, PIPE_SHADER_FRAGMENT, 0, NULL);
diff --git a/src/gallium/state_trackers/xa/xa_priv.h
b/src/gallium/state_trackers/xa/xa_priv.h
index b99c214..8b96bf5 100644
--- a/src/gallium/state_trackers/xa/xa_priv.h
+++ b/src/gallium/state_trackers/xa/xa_priv.h
@@ -236,8 +236,7 @@ void renderer_draw_yuv(struct xa_context *r,
struct xa_surface *srf[]);
void renderer_bind_destination(struct xa_context *r,
- struct pipe_surface *surface, int width,
- int height);
+ struct pipe_surface *surface);
void renderer_init_state(struct xa_context *r);
void renderer_copy_prepare(struct xa_context *r,
diff --git a/src/gallium/state_trackers/xa/xa_renderer.c
b/src/gallium/state_trackers/xa/xa_renderer.c
index 8a122dc..33ae133 100644
--- a/src/gallium/state_trackers/xa/xa_renderer.c
+++ b/src/gallium/state_trackers/xa/xa_renderer.c
@@ -325,8 +325,10 @@ setup_vertex_data_yuv(struct xa_context *r,
*/
void
renderer_bind_destination(struct xa_context *r,
- struct pipe_surface *surface, int width, int height)
+ struct pipe_surface *surface)
{
+int width = surface-width;
+int height = surface-height;
struct pipe_framebuffer_state fb;
struct pipe_viewport_state viewport;
@@ -406,8 +408,7 @@ renderer_copy_prepare(struct xa_context *r,
PIPE_BIND_RENDER_TARGET));
(void)screen;
-renderer_bind_destination(r, dst_surface,
- dst_surface-width, dst_surface-height);
+renderer_bind_destination(r, dst_surface);
/* set misc state we care about */
{
diff --git a/src/gallium/state_trackers/xa/xa_yuv.c
b/src/gallium/state_trackers/xa/xa_yuv.c
index 9c7c4d6..43f56ff 100644
--- a/src/gallium/state_trackers/xa/xa_yuv.c
+++ b/src/gallium/state_trackers/xa/xa_yuv.c
@@ -131,7 +131,7 @@ xa_yuv_planar_blit(struct xa_context *r,
if (ret != XA_ERR_NONE)
return -XA_ERR_NORES;
-renderer_bind_destination(r, r-srf, r-srf-width, r-srf-height);
+renderer_bind_destination(r, r-srf);
xa_yuv_bind_blend_state(r);
xa_yuv_bind_shaders(r);
xa_yuv_bind_samplers(r, yuv);
--
1.9.0
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 0/5] XA composite and perf improvements and fixes
From: Rob Clark robcl...@freedesktop.org While still more of a stop-gap solution (until glamor) for freedreno, with these few relatively simple changes I get a pretty big performance boost (~40%) for xf86-video-freedreno. Since the first iteration of these patches, I have: * re-worked the 'solid-fill src/mask' patch to always use SAMP[0..n] rather than hard-coding SAMP[0] to src and SAMP[1] to mask (to avoid having a NULL sampler[0] * Thomas's version of the 'cache render target surface' patch * Added a patch to fix some problems with xRGB - a8 operations With this, especially after the 'xrgb-a' patch, rendercheck is at least not exploding. Some tests are still failing, but that appears to be freedreno issues which I am still looking into. (Mostly problems with some oddball formats.) Rob Clark (4): st/xa: remove unneeded args st/xa: scissor to help tilers st/xa: handle solid-fill src/mask st/xa: handle xrgb-a better Thomas Hellstrom (1): st/xa: Cache render target surface src/gallium/state_trackers/xa/xa_composite.c | 129 ++- src/gallium/state_trackers/xa/xa_context.c | 26 ++- src/gallium/state_trackers/xa/xa_priv.h | 55 - src/gallium/state_trackers/xa/xa_renderer.c | 319 --- src/gallium/state_trackers/xa/xa_tgsi.c | 73 -- src/gallium/state_trackers/xa/xa_yuv.c | 2 +- 6 files changed, 380 insertions(+), 224 deletions(-) -- 1.9.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 2/5] st/xa: scissor to help tilers
From: Rob Clark robcl...@freedesktop.org
Keep track of the maximal bounds of all the operations and set scissor
accordingly. For tiling GPU's this can be a big win by reducing the
memory bandwidth spent moving pixels from system memory to tile buffer
and back.
You could imagine being more sophisticated and splitting up disjoint
operations. But this simplistic approach is good enough for the common
cases.
Signed-off-by: Rob Clark robcl...@freedesktop.org
---
src/gallium/state_trackers/xa/xa_composite.c | 2 ++
src/gallium/state_trackers/xa/xa_context.c | 3 +++
src/gallium/state_trackers/xa/xa_priv.h | 29
src/gallium/state_trackers/xa/xa_renderer.c | 14 ++
4 files changed, 48 insertions(+)
diff --git a/src/gallium/state_trackers/xa/xa_composite.c
b/src/gallium/state_trackers/xa/xa_composite.c
index b65f6eb..7ae35a1 100644
--- a/src/gallium/state_trackers/xa/xa_composite.c
+++ b/src/gallium/state_trackers/xa/xa_composite.c
@@ -512,6 +512,8 @@ xa_composite_rect(struct xa_context *ctx,
const float *src_matrix = NULL;
const float *mask_matrix = NULL;
+ xa_scissor_update(ctx, dstX, dstY, dstX + width, dstY + height);
+
if (comp-src-has_transform)
src_matrix = comp-src-transform;
if (comp-mask comp-mask-has_transform)
diff --git a/src/gallium/state_trackers/xa/xa_context.c
b/src/gallium/state_trackers/xa/xa_context.c
index ee32676..867999a 100644
--- a/src/gallium/state_trackers/xa/xa_context.c
+++ b/src/gallium/state_trackers/xa/xa_context.c
@@ -238,6 +238,8 @@ xa_copy(struct xa_context *ctx,
{
struct pipe_box src_box;
+xa_scissor_update(ctx, dx, dy, dx + width, dy + height);
+
if (ctx-simple_copy) {
u_box_2d(sx, sy, width, height, src_box);
ctx-pipe-resource_copy_region(ctx-pipe,
@@ -324,6 +326,7 @@ xa_solid_prepare(struct xa_context *ctx, struct xa_surface
*dst,
XA_EXPORT void
xa_solid(struct xa_context *ctx, int x, int y, int width, int height)
{
+xa_scissor_update(ctx, x, y, x + width, y + height);
renderer_solid(ctx, x, y, x + width, y + height, ctx-solid_color);
}
diff --git a/src/gallium/state_trackers/xa/xa_priv.h
b/src/gallium/state_trackers/xa/xa_priv.h
index 8b96bf5..b673379 100644
--- a/src/gallium/state_trackers/xa/xa_priv.h
+++ b/src/gallium/state_trackers/xa/xa_priv.h
@@ -38,6 +38,8 @@
#include pipe/p_context.h
#include pipe/p_state.h
+#include util/u_math.h
+
#if defined(__GNUC__) __GNUC__ = 4
#define XA_EXPORT __attribute__ ((visibility(default)))
#else
@@ -105,6 +107,12 @@ struct xa_context {
struct xa_surface *dst;
struct pipe_surface *srf;
+/* destination scissor state.. we scissor out untouched parts
+ * of the dst for the benefit of tilers:
+ */
+struct pipe_scissor_state scissor;
+int scissor_valid;
+
int simple_copy;
int has_solid_color;
@@ -115,6 +123,27 @@ struct xa_context {
const struct xa_composite *comp;
};
+static INLINE void
+xa_scissor_reset(struct xa_context *ctx)
+{
+ctx-scissor.maxx = 0;
+ctx-scissor.maxy = 0;
+ctx-scissor.minx = ~0;
+ctx-scissor.miny = ~0;
+ctx-scissor_valid = FALSE;
+}
+
+static INLINE void
+xa_scissor_update(struct xa_context *ctx, unsigned minx, unsigned miny,
+ unsigned maxx, unsigned maxy)
+{
+ctx-scissor.maxx = MAX2(ctx-scissor.maxx, maxx);
+ctx-scissor.maxy = MAX2(ctx-scissor.maxy, maxy);
+ctx-scissor.minx = MIN2(ctx-scissor.minx, minx);
+ctx-scissor.miny = MIN2(ctx-scissor.miny, miny);
+ctx-scissor_valid = TRUE;
+}
+
enum xa_vs_traits {
VS_COMPOSITE = 1 0,
VS_MASK = 1 1,
diff --git a/src/gallium/state_trackers/xa/xa_renderer.c
b/src/gallium/state_trackers/xa/xa_renderer.c
index 33ae133..121d8ed 100644
--- a/src/gallium/state_trackers/xa/xa_renderer.c
+++ b/src/gallium/state_trackers/xa/xa_renderer.c
@@ -79,11 +79,22 @@ renderer_draw(struct xa_context *r)
if (!r-buffer_size)
return;
+if (!r-scissor_valid) {
+ r-scissor.minx = 0;
+ r-scissor.miny = 0;
+ r-scissor.maxx = r-dst-tex-width0;
+ r-scissor.maxy = r-dst-tex-height0;
+}
+
+r-pipe-set_scissor_states(r-pipe, 0, 1, r-scissor);
+
cso_set_vertex_elements(r-cso, r-attrs_per_vertex, r-velems);
util_draw_user_vertex_buffer(r-cso, r-buffer, PIPE_PRIM_QUADS,
num_verts,/* verts */
r-attrs_per_vertex); /* attribs/vert */
r-buffer_size = 0;
+
+xa_scissor_reset(r);
}
static INLINE void
@@ -111,6 +122,7 @@ renderer_init_state(struct xa_context *r)
raster.half_pixel_center = 1;
raster.bottom_edge_rule = 1;
raster.depth_clip = 1;
+raster.scissor = 1;
cso_set_rasterizer(r-cso, raster);
/* vertex elements state */
@@ -333,6 +345,8 @@ renderer_bind_destination(struct xa_context *r,
struct pipe_framebuffer_state fb;
struct pipe_viewport_state
Re: [Mesa-dev] [PATCH v3 00/11] Map support for GBM
On 04/08/2014 10:28 PM, Ander Conselvan de Oliveira wrote: From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com Changes from previous version: - make it clearer that the interface is optional; No! this is still a NAK! The reason is, just like the last time, that as soon as the major drivers implement this, The users of the interface will stop caring about the slowpath (no mmap() available). There are some other good reasons too, like for example the buffers being tiled or uncached. If you desperately need a generic way to access accelerated buffer contents using the CPU, then implement something similar to glTex[sub]Image() or gl[read|write]Pixels. Thanks, /Thomas ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 4/5] st/xa: handle solid-fill src/mask
From: Rob Clark robcl...@freedesktop.org
Add support to property handle solid-fill src and/or mask. Without this
we fallback to sw a lot for common things like text rendering.
Signed-off-by: Rob Clark robcl...@freedesktop.org
---
src/gallium/state_trackers/xa/xa_composite.c | 115 +--
src/gallium/state_trackers/xa/xa_priv.h | 13 +-
src/gallium/state_trackers/xa/xa_renderer.c | 298 ---
src/gallium/state_trackers/xa/xa_tgsi.c | 36 +++-
4 files changed, 263 insertions(+), 199 deletions(-)
diff --git a/src/gallium/state_trackers/xa/xa_composite.c
b/src/gallium/state_trackers/xa/xa_composite.c
index 7ae35a1..b70fd47 100644
--- a/src/gallium/state_trackers/xa/xa_composite.c
+++ b/src/gallium/state_trackers/xa/xa_composite.c
@@ -111,12 +111,6 @@ blend_for_op(struct xa_composite_blend *blend,
boolean supported = FALSE;
/*
- * Temporarily disable component alpha since it appears buggy.
- */
-if (mask_pic mask_pic-component_alpha)
- return FALSE;
-
-/*
* our default in case something goes wrong
*/
*blend = xa_blends[XA_BLEND_OP_OVER];
@@ -125,6 +119,7 @@ blend_for_op(struct xa_composite_blend *blend,
if (xa_blends[i].op == op) {
*blend = xa_blends[i];
supported = TRUE;
+ break;
}
}
@@ -227,14 +222,6 @@ xa_composite_check_accelerated(const struct xa_composite
*comp)
if (src_pic-src_pict) {
if (src_pic-src_pict-type != xa_src_pict_solid_fill)
return -XA_ERR_INVAL;
-
- /*
-* Currently we don't support solid fill with a mask.
-* We can easily do that, but that would require shader,
-* sampler view setup and vertex setup modification.
-*/
- if (comp-mask)
- return -XA_ERR_INVAL;
}
if (blend_for_op(blend, comp-op, comp-src, comp-mask, comp-dst)) {
@@ -336,8 +323,8 @@ bind_shaders(struct xa_context *ctx, const struct
xa_composite *comp)
fs_traits |= FS_SRC_REPEAT_NONE;
if (src_pic-src_pict) {
- if (src_pic-src_pict-type == xa_src_pict_solid_fill) {
- fs_traits |= FS_SOLID_FILL | FS_FILL;
+ if (is_solid_fill(src_pic)) {
+ fs_traits |= FS_SOLID_FILL;
vs_traits |= VS_SOLID_FILL;
xa_pixel_to_float4(src_pic-src_pict-solid_fill.color,
ctx-solid_color);
@@ -358,9 +345,17 @@ bind_shaders(struct xa_context *ctx, const struct
xa_composite *comp)
mask_pic-has_transform)
fs_traits |= FS_MASK_REPEAT_NONE;
+ if (is_solid_fill(mask_pic)) {
+ fs_traits |= FS_SOLID_MASK;
+ vs_traits |= VS_SOLID_MASK;
+ xa_pixel_to_float4(mask_pic-src_pict-solid_fill.color,
+ ctx-solid_mask);
+ ctx-has_solid_mask = TRUE;
+ }
+
if (mask_pic-component_alpha) {
struct xa_composite_blend blend;
- if (!blend_for_op(blend, comp-op, src_pic, mask_pic, NULL))
+ if (!blend_for_op(blend, comp-op, src_pic, mask_pic, comp-dst))
return -XA_ERR_INVAL;
if (blend.alpha_src) {
@@ -392,41 +387,38 @@ bind_samplers(struct xa_context *ctx,
struct pipe_context *pipe = ctx-pipe;
struct xa_picture *src_pic = comp-src;
struct xa_picture *mask_pic = comp-mask;
+unsigned n = 0;
-ctx-num_bound_samplers = 0;
+/* unref old sampler views: */
+xa_ctx_sampler_views_destroy(ctx);
memset(src_sampler, 0, sizeof(struct pipe_sampler_state));
memset(mask_sampler, 0, sizeof(struct pipe_sampler_state));
-if (src_pic) {
- if (ctx-has_solid_color) {
- samplers[0] = NULL;
- pipe_sampler_view_reference(ctx-bound_sampler_views[0], NULL);
- } else {
- unsigned src_wrap = xa_repeat_to_gallium(src_pic-wrap);
- int filter;
-
- (void) xa_filter_to_gallium(src_pic-filter, filter);
-
- src_sampler.wrap_s = src_wrap;
- src_sampler.wrap_t = src_wrap;
- src_sampler.min_img_filter = filter;
- src_sampler.mag_img_filter = filter;
- src_sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NEAREST;
- src_sampler.normalized_coords = 1;
- samplers[0] = src_sampler;
- ctx-num_bound_samplers = 1;
- u_sampler_view_default_template(view_templ,
- src_pic-srf-tex,
- src_pic-srf-tex-format);
- src_view = pipe-create_sampler_view(pipe, src_pic-srf-tex,
-view_templ);
- pipe_sampler_view_reference(ctx-bound_sampler_views[0], NULL);
- ctx-bound_sampler_views[0] = src_view;
- }
+if (src_pic !is_solid_fill(src_pic)) {
+ unsigned src_wrap = xa_repeat_to_gallium(src_pic-wrap);
+ int filter;
+
+ (void)
[Mesa-dev] [PATCH v2 3/5] st/xa: Cache render target surface
From: Thomas Hellstrom thellst...@vmware.com
Otherwise it will trick the gallium driver into thinking that the render
target has actually changed (due to different pipe_surface pointing to
same underlying pipe_resource). This is really badness for tiling GPUs
like adreno.
Signed-off-by: Thomas Hellstrom thellst...@vmware.com
---
src/gallium/state_trackers/xa/xa_context.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/src/gallium/state_trackers/xa/xa_context.c
b/src/gallium/state_trackers/xa/xa_context.c
index 867999a..37de45b 100644
--- a/src/gallium/state_trackers/xa/xa_context.c
+++ b/src/gallium/state_trackers/xa/xa_context.c
@@ -78,6 +78,8 @@ xa_context_destroy(struct xa_context *r)
}
xa_ctx_sampler_views_destroy(r);
+if (r-srf)
+pipe_surface_reference(r-srf, NULL);
if (r-cso) {
cso_release_all(r-cso);
@@ -185,8 +187,15 @@ xa_ctx_srf_create(struct xa_context *ctx, struct
xa_surface *dst)
struct pipe_screen *screen = ctx-pipe-screen;
struct pipe_surface srf_templ;
-if (ctx-srf)
- return -XA_ERR_INVAL;
+/*
+ * Cache surfaces unless we change render target
+ */
+if (ctx-srf) {
+if (ctx-srf-texture == dst-tex)
+return XA_ERR_NONE;
+
+pipe_surface_reference(ctx-srf, NULL);
+}
if (!screen-is_format_supported(screen, dst-tex-format,
PIPE_TEXTURE_2D, 0,
@@ -204,7 +213,10 @@ xa_ctx_srf_create(struct xa_context *ctx, struct
xa_surface *dst)
void
xa_ctx_srf_destroy(struct xa_context *ctx)
{
-pipe_surface_reference(ctx-srf, NULL);
+/*
+ * Cache surfaces unless we change render target.
+ * Final destruction on context destroy.
+ */
}
XA_EXPORT int
--
1.9.0
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[Mesa-dev] [PATCH v2 5/5] st/xa: handle xrgb-a better
From: Rob Clark robcl...@freedesktop.org
Detect the edge cases where texture fetch is unneeded (due to alpha
channel being wired to 1.0 and non-alpha components thrown out).
Signed-off-by: Rob Clark robcl...@freedesktop.org
---
src/gallium/state_trackers/xa/xa_composite.c | 13 +++--
src/gallium/state_trackers/xa/xa_priv.h | 10 +++
src/gallium/state_trackers/xa/xa_tgsi.c | 43 +++-
3 files changed, 51 insertions(+), 15 deletions(-)
diff --git a/src/gallium/state_trackers/xa/xa_composite.c
b/src/gallium/state_trackers/xa/xa_composite.c
index b70fd47..7f7e3e4 100644
--- a/src/gallium/state_trackers/xa/xa_composite.c
+++ b/src/gallium/state_trackers/xa/xa_composite.c
@@ -315,6 +315,7 @@ bind_shaders(struct xa_context *ctx, const struct
xa_composite *comp)
struct xa_shader shader;
struct xa_picture *src_pic = comp-src;
struct xa_picture *mask_pic = comp-mask;
+struct xa_picture *dst_pic = comp-dst;
ctx-has_solid_color = FALSE;
@@ -335,6 +336,9 @@ bind_shaders(struct xa_context *ctx, const struct
xa_composite *comp)
vs_traits |= VS_COMPOSITE;
}
+ if (is_xrgb_to_alpha(dst_pic, src_pic))
+ ctx-has_solid_color = TRUE;
+
fs_traits |= picture_format_fixups(src_pic, 0);
}
@@ -351,6 +355,8 @@ bind_shaders(struct xa_context *ctx, const struct
xa_composite *comp)
xa_pixel_to_float4(mask_pic-src_pict-solid_fill.color,
ctx-solid_mask);
ctx-has_solid_mask = TRUE;
+ } else if (is_xrgb_to_alpha(dst_pic, mask_pic)) {
+ ctx-has_solid_mask = TRUE;
}
if (mask_pic-component_alpha) {
@@ -387,6 +393,7 @@ bind_samplers(struct xa_context *ctx,
struct pipe_context *pipe = ctx-pipe;
struct xa_picture *src_pic = comp-src;
struct xa_picture *mask_pic = comp-mask;
+struct xa_picture *dst_pic = comp-dst;
unsigned n = 0;
/* unref old sampler views: */
@@ -395,7 +402,8 @@ bind_samplers(struct xa_context *ctx,
memset(src_sampler, 0, sizeof(struct pipe_sampler_state));
memset(mask_sampler, 0, sizeof(struct pipe_sampler_state));
-if (src_pic !is_solid_fill(src_pic)) {
+if (src_pic !is_solid_fill(src_pic)
+ !is_xrgb_to_alpha(dst_pic, src_pic)) {
unsigned src_wrap = xa_repeat_to_gallium(src_pic-wrap);
int filter;
@@ -418,7 +426,8 @@ bind_samplers(struct xa_context *ctx,
n++;
}
-if (mask_pic !is_solid_fill(mask_pic)) {
+if (mask_pic !is_solid_fill(mask_pic)
+ !is_xrgb_to_alpha(dst_pic, mask_pic)) {
unsigned mask_wrap = xa_repeat_to_gallium(mask_pic-wrap);
int filter;
diff --git a/src/gallium/state_trackers/xa/xa_priv.h
b/src/gallium/state_trackers/xa/xa_priv.h
index 1ef810e..723ea4a 100644
--- a/src/gallium/state_trackers/xa/xa_priv.h
+++ b/src/gallium/state_trackers/xa/xa_priv.h
@@ -233,6 +233,16 @@ is_solid_fill(struct xa_picture *pic)
return pic-src_pict (pic-src_pict-type == xa_src_pict_solid_fill);
}
+/* a8 dst and xRGB src (or mask) is a special case. The texture fetch
+ * is optimized out.
+ */
+static INLINE int
+is_xrgb_to_alpha(struct xa_picture *dst, struct xa_picture *src)
+{
+return (dst-pict_format == xa_format_a8)
+ (xa_format_a(src-pict_format) == 0);
+}
+
/*
* xa_tgsi.c
*/
diff --git a/src/gallium/state_trackers/xa/xa_tgsi.c
b/src/gallium/state_trackers/xa/xa_tgsi.c
index e96bc53..b7e0fe1 100644
--- a/src/gallium/state_trackers/xa/xa_tgsi.c
+++ b/src/gallium/state_trackers/xa/xa_tgsi.c
@@ -479,10 +479,12 @@ create_fs(struct pipe_context *pipe, unsigned fs_traits)
imm0 = ureg_imm4f(ureg, 0, 0, 0, 1);
}
if (is_composite) {
- src_sampler = ureg_DECL_sampler(ureg, n++);
- src_input = ureg_DECL_fs_input(ureg,
- TGSI_SEMANTIC_GENERIC, 0,
- TGSI_INTERPOLATE_PERSPECTIVE);
+ if (!(dst_luminance src_set_alpha)) {
+ src_sampler = ureg_DECL_sampler(ureg, n++);
+ src_input = ureg_DECL_fs_input(ureg,
+ TGSI_SEMANTIC_GENERIC, 0,
+ TGSI_INTERPOLATE_PERSPECTIVE);
+ }
} else if (is_fill) {
if (is_solid)
src_input = ureg_DECL_fs_input(ureg,
@@ -502,10 +504,12 @@ create_fs(struct pipe_context *pipe, unsigned fs_traits)
TGSI_SEMANTIC_COLOR, 1,
TGSI_INTERPOLATE_PERSPECTIVE);
} else if (has_mask) {
- mask_sampler = ureg_DECL_sampler(ureg, n++);
- mask_pos = ureg_DECL_fs_input(ureg,
- TGSI_SEMANTIC_GENERIC, 1,
- TGSI_INTERPOLATE_PERSPECTIVE);
+ if (!(dst_luminance mask_set_alpha)) {
+ mask_sampler = ureg_DECL_sampler(ureg, n++);
+ mask_pos =
[Mesa-dev] [PATCH] i965: Stop advertising GL_MESA_ycbcr_texture.
The new fragment shader backend has never supported the necessary color conversion code for this to work. We began using the new backend in Mesa 7.10 for GLSL (commit a81d423d93f22a948f3aa4bf73, October 2010), and for ARB_fragment_program in Mesa 9.1 (commit 97615b2d8c7c3cea6fd3a4, August 2012). I haven't heard any complaints, so I don't think anyone will miss this feature. I believe mplayer used it at one point, but these days defaults to other paths anyway. Signed-off-by: Kenneth Graunke kenn...@whitecape.org Cc: Topi Pohjolainen topi.pohjolai...@intel.com Cc: Ian Romanick i...@freedesktop.org Cc: Eric Anholt e...@anholt.net --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 15fcd30..760b605 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -231,7 +231,6 @@ intelInitExtensions(struct gl_context *ctx) ctx-Extensions.ATI_separate_stencil = true; ctx-Extensions.ATI_texture_env_combine3 = true; ctx-Extensions.MESA_pack_invert = true; - ctx-Extensions.MESA_ycbcr_texture = true; ctx-Extensions.NV_conditional_render = true; ctx-Extensions.NV_primitive_restart = true; ctx-Extensions.NV_texture_env_combine4 = true; -- 1.9.1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] Accelerated meta CopyTexSubImage
Here's a rework of the series for meta CopyTexSubImage (required for i965's gen8 support, since we're probably going to avoid doing blorp at all for it). Ken had almost-reviewed a previous version of the patch, but I went back and did some refactors before it that bring this feature improvement to a net lines of code reduction while hopefully improving performance on older drivers at the same time. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/9] meta: Infer bind_fbo_image parameters from an incoming image.
---
src/mesa/drivers/common/meta.c | 10 --
src/mesa/drivers/common/meta.h | 3 +--
src/mesa/drivers/common/meta_generate_mipmap.c | 6 --
3 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index ee8ad3f..862fa48 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -97,9 +97,12 @@ static void meta_drawpix_cleanup(struct drawpix_state
*drawpix);
* Bind a particular texture level/layer to mipmap-FBO's GL_COLOR_ATTACHMENT0.
*/
void
-_mesa_meta_bind_fbo_image(struct gl_texture_object *texObj, GLenum target,
- GLuint level, GLuint layer)
+_mesa_meta_bind_fbo_image(struct gl_texture_image *texImage, GLuint layer)
{
+ struct gl_texture_object *texObj = texImage-TexObject;
+ int level = texImage-Level;
+ GLenum target = texObj-Target;
+
switch (target) {
case GL_TEXTURE_1D:
_mesa_FramebufferTexture1D(GL_FRAMEBUFFER,
@@ -118,6 +121,9 @@ _mesa_meta_bind_fbo_image(struct gl_texture_object *texObj,
GLenum target,
layer);
break;
default: /* 2D / cube */
+ if (target == GL_TEXTURE_CUBE_MAP)
+ target = GL_TEXTURE_CUBE_MAP_POSITIVE_X + texImage-Face;
+
_mesa_FramebufferTexture2D(GL_FRAMEBUFFER,
GL_COLOR_ATTACHMENT0,
target,
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index ea05ea5..ad3da9c 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -505,7 +505,6 @@ void
_mesa_meta_glsl_generate_mipmap_cleanup(struct gen_mipmap_state *mipmap);
void
-_mesa_meta_bind_fbo_image(struct gl_texture_object *texObj, GLenum target,
- GLuint level, GLuint layer);
+_mesa_meta_bind_fbo_image(struct gl_texture_image *texImage, GLuint layer);
#endif /* META_H */
diff --git a/src/mesa/drivers/common/meta_generate_mipmap.c
b/src/mesa/drivers/common/meta_generate_mipmap.c
index 7c7f64d..deff690 100644
--- a/src/mesa/drivers/common/meta_generate_mipmap.c
+++ b/src/mesa/drivers/common/meta_generate_mipmap.c
@@ -103,7 +103,7 @@ fallback_required(struct gl_context *ctx, GLenum target,
_mesa_GenFramebuffers(1, mipmap-FBO);
_mesa_BindFramebuffer(GL_FRAMEBUFFER_EXT, mipmap-FBO);
- _mesa_meta_bind_fbo_image(texObj, target, srcLevel, 0);
+ _mesa_meta_bind_fbo_image(baseImage, 0);
status = _mesa_CheckFramebufferStatus(GL_FRAMEBUFFER_EXT);
@@ -249,6 +249,7 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum
target,
for (dstLevel = baseLevel + 1; dstLevel = maxLevel; dstLevel++) {
const struct gl_texture_image *srcImage;
+ struct gl_texture_image *dstImage;
const GLuint srcLevel = dstLevel - 1;
GLuint layer;
GLsizei srcWidth, srcHeight, srcDepth;
@@ -293,6 +294,7 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum
target,
*/
break;
}
+ dstImage = _mesa_select_tex_image(ctx, texObj, faceTarget, dstLevel);
/* limit minification to src level */
_mesa_TexParameteri(target, GL_TEXTURE_MAX_LEVEL, srcLevel);
@@ -315,7 +317,7 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum
target,
_mesa_BufferData(GL_ARRAY_BUFFER_ARB, sizeof(verts),
verts, GL_DYNAMIC_DRAW_ARB);
- _mesa_meta_bind_fbo_image(texObj, faceTarget, dstLevel, layer);
+ _mesa_meta_bind_fbo_image(dstImage, layer);
/* sanity check */
if (_mesa_CheckFramebufferStatus(GL_FRAMEBUFFER) !=
--
1.9.1
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[Mesa-dev] [PATCH 3/9] meta: Refactor the BlitFramebuffer depth CopyTexImage fallback.
This avoids a ReadPixels() if there's accelerated CopyTexImage present.
It now requires GLSL as opposed to just fragment programs, but we don't
have any drivers that do ARB_fp but not GLSL.
---
src/mesa/drivers/common/meta.h | 1 -
src/mesa/drivers/common/meta_blit.c | 139 +---
2 files changed, 2 insertions(+), 138 deletions(-)
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 4faae0b..1177ced 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -250,7 +250,6 @@ struct blit_state
{
GLuint VAO;
GLuint VBO;
- GLuint DepthFP;
struct blit_shader_table shaders;
GLuint msaa_shaders[BLIT_MSAA_SHADER_COUNT];
struct temp_texture depthTex;
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index a65fcb2..d7bb7c8 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -52,37 +52,6 @@
/** Return offset in bytes of the field within a vertex struct */
#define OFFSET(FIELD) ((void *) offsetof(struct vertex, FIELD))
-/**
- * One-time init for drawing depth pixels.
- */
-static void
-init_blit_depth_pixels(struct gl_context *ctx)
-{
- static const char *program =
- !!ARBfp1.0\n
- TEX result.depth, fragment.texcoord[0], texture[0], %s; \n
- END \n;
- char program2[200];
- struct blit_state *blit = ctx-Meta-Blit;
- struct temp_texture *tex = _mesa_meta_get_temp_texture(ctx);
- const char *texTarget;
-
- assert(blit-DepthFP == 0);
-
- /* replace %s with RECT or 2D */
- assert(strlen(program) + 4 sizeof(program2));
- if (tex-Target == GL_TEXTURE_RECTANGLE)
- texTarget = RECT;
- else
- texTarget = 2D;
- _mesa_snprintf(program2, sizeof(program2), program, texTarget);
-
- _mesa_GenProgramsARB(1, blit-DepthFP);
- _mesa_BindProgramARB(GL_FRAGMENT_PROGRAM_ARB, blit-DepthFP);
- _mesa_ProgramStringARB(GL_FRAGMENT_PROGRAM_ARB, GL_PROGRAM_FORMAT_ASCII_ARB,
- strlen(program2), (const GLubyte *) program2);
-}
-
static void
setup_glsl_msaa_blit_shader(struct gl_context *ctx,
struct blit_state *blit,
@@ -460,7 +429,8 @@ blitframebuffer_texture(struct gl_context *ctx,
return false;
if (do_depth) {
- return false;
+ meta_temp_texture = _mesa_meta_get_temp_depth_texture(ctx);
+ tex_base_format = GL_DEPTH_COMPONENT;
} else {
meta_temp_texture = _mesa_meta_get_temp_texture(ctx);
tex_base_format =
@@ -632,25 +602,10 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
GLbitfield mask, GLenum filter)
{
- struct blit_state *blit = ctx-Meta-Blit;
- struct temp_texture *depthTex = _mesa_meta_get_temp_depth_texture(ctx);
- const GLint srcX = MIN2(srcX0, srcX1);
- const GLint srcY = MIN2(srcY0, srcY1);
- const GLint srcW = abs(srcX1 - srcX0);
- const GLint srcH = abs(srcY1 - srcY0);
- const GLint dstX = MIN2(dstX0, dstX1);
- const GLint dstY = MIN2(dstY0, dstY1);
const GLint dstW = abs(dstX1 - dstX0);
const GLint dstH = abs(dstY1 - dstY0);
- const GLint srcFlipX = (srcX1 - srcX0) / srcW;
- const GLint srcFlipY = (srcY1 - srcY0) / srcH;
const GLint dstFlipX = (dstX1 - dstX0) / dstW;
const GLint dstFlipY = (dstY1 - dstY0) / dstH;
- const GLint flipX = srcFlipX * dstFlipX;
- const GLint flipY = srcFlipY * dstFlipY;
-
- struct vertex verts[4];
- GLboolean newTex;
const GLboolean use_glsl_version = ctx-Extensions.ARB_vertex_shader
ctx-Extensions.ARB_fragment_shader;
@@ -690,96 +645,10 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
}
}
- /* Choose between glsl version and fixed function version of
-* BlitFramebuffer function.
-*/
- if (use_glsl_version) {
- setup_glsl_blit_framebuffer(ctx, blit, NULL, depthTex-Target);
- }
- else {
- _mesa_meta_setup_ff_tnl_for_blit(blit-VAO, blit-VBO, 2);
- }
-
- /* Silence valgrind warnings about reading uninitialized stack. */
- memset(verts, 0, sizeof(verts));
-
- /* Continue with normal approach which involves copying the src rect
-* into a temporary texture and is blitted by drawing a textured quad.
-*/
- {
- /* setup vertex positions */
- verts[0].x = -1.0F * flipX;
- verts[0].y = -1.0F * flipY;
- verts[1].x = 1.0F * flipX;
- verts[1].y = -1.0F * flipY;
- verts[2].x = 1.0F * flipX;
- verts[2].y = 1.0F * flipY;
- verts[3].x = -1.0F * flipX;
- verts[3].y = 1.0F * flipY;
-
- }
-
- if (!use_glsl_version)
- _mesa_set_enable(ctx, depthTex-Target, GL_TRUE);
-
- if ((mask GL_DEPTH_BUFFER_BIT)
- _mesa_is_desktop_gl(ctx)
- ctx-Extensions.ARB_depth_texture
- ctx-Extensions.ARB_fragment_program) {
-
-
[Mesa-dev] [PATCH 9/9] meta: Support BlitFramebuffer from all the other texture targets.
There's already code for them due to the GenerateMipmap path, so we just
need to make sure we've got our coordinates present.
v2: Apply De Morgan's law (review by Ken)
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/common/meta_blit.c | 17 +++--
1 file changed, 3 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index 3f91082..6f52bee 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -397,16 +397,6 @@ blitframebuffer_texture(struct gl_context *ctx,
srcLevel = readAtt-TextureLevel;
texObj = readAtt-Texture;
target = texObj-Target;
-
- switch (target) {
- case GL_TEXTURE_2D:
- case GL_TEXTURE_RECTANGLE:
- case GL_TEXTURE_2D_MULTISAMPLE:
- case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
- break;
- default:
- return false;
- }
} else if (ctx-Driver.BindRenderbufferTexImage) {
/* Otherwise, we need the driver to be able to bind a renderbuffer as
* a texture image.
@@ -551,7 +541,9 @@ blitframebuffer_texture(struct gl_context *ctx,
struct vertex verts[4];
GLfloat s0, t0, s1, t1;
- if (target == GL_TEXTURE_2D) {
+ if (target != GL_TEXTURE_RECTANGLE_ARB
+ target != GL_TEXTURE_2D_MULTISAMPLE
+ target != GL_TEXTURE_2D_MULTISAMPLE_ARRAY) {
const struct gl_texture_image *texImage
= _mesa_select_tex_image(ctx, texObj, target, srcLevel);
s0 = srcX0 / (float) texImage-Width;
@@ -560,9 +552,6 @@ blitframebuffer_texture(struct gl_context *ctx,
t1 = srcY1 / (float) texImage-Height;
}
else {
- assert(target == GL_TEXTURE_RECTANGLE_ARB ||
-target == GL_TEXTURE_2D_MULTISAMPLE ||
-target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY);
s0 = (float) srcX0;
s1 = (float) srcX1;
t0 = (float) srcY0;
--
1.9.1
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[Mesa-dev] [PATCH 6/9] meta: Add support for CUBE_MAP_ARRAY to generatemipmap.
I added support to bind_fbo_image in the process of building meta
CopyTexSubImage, and found that it broke generatemipmap because previously
we would just throw a GL error there and then end up with an incomplete
FBO and fallback.
---
src/mesa/drivers/common/meta.c | 4
src/mesa/drivers/common/meta_generate_mipmap.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 862fa48..9e832f2 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -113,6 +113,7 @@ _mesa_meta_bind_fbo_image(struct gl_texture_image
*texImage, GLuint layer)
break;
case GL_TEXTURE_1D_ARRAY:
case GL_TEXTURE_2D_ARRAY:
+ case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_3D:
_mesa_FramebufferTextureLayer(GL_FRAMEBUFFER,
GL_COLOR_ATTACHMENT0,
@@ -2460,6 +2461,9 @@ _mesa_meta_setup_texture_coords(GLenum faceTarget,
GLuint i;
GLfloat r;
+ if (faceTarget == GL_TEXTURE_CUBE_MAP_ARRAY)
+ faceTarget = GL_TEXTURE_CUBE_MAP_POSITIVE_X + slice % 6;
+
/* Currently all texture targets want the W component to be 1.0.
*/
coords0[3] = 1.0F;
diff --git a/src/mesa/drivers/common/meta_generate_mipmap.c
b/src/mesa/drivers/common/meta_generate_mipmap.c
index deff690..db46974 100644
--- a/src/mesa/drivers/common/meta_generate_mipmap.c
+++ b/src/mesa/drivers/common/meta_generate_mipmap.c
@@ -189,7 +189,7 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum
target,
*/
if (use_glsl_version) {
_mesa_meta_setup_vertex_objects(mipmap-VAO, mipmap-VBO, true,
- 2, 3, 0);
+ 2, 4, 0);
_mesa_meta_setup_blit_shader(ctx, target, mipmap-shaders);
} else {
_mesa_meta_setup_ff_tnl_for_blit(mipmap-VAO, mipmap-VBO, 3);
--
1.9.1
___
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[Mesa-dev] [PATCH 7/9] meta: Add an accelerated glCopyTexSubImage using glBlitFramebuffer.
You'll note from the previous commits that there's something of a loop
here: You call CTSI, which calls BlitFB, then if things go wrong that
falls back to CTSI. As a result, meta CTSI reaches over into blitfb to
tell it no, don't try that fallback.
v2: Drop the _mesa_update_state(), which was only necessary due to use of
_mesa_clip_blit() in _mesa_meta_BlitFramebuffer() in another patch
series.
---
src/mesa/drivers/common/meta.c | 95 +++---
src/mesa/drivers/common/meta.h | 4 +-
src/mesa/drivers/common/meta_blit.c| 3 +
src/mesa/drivers/common/meta_generate_mipmap.c | 4 +-
4 files changed, 94 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 9e832f2..ab79e74 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -37,6 +37,7 @@
#include main/arbprogram.h
#include main/arrayobj.h
#include main/blend.h
+#include main/blit.h
#include main/bufferobj.h
#include main/buffers.h
#include main/colortab.h
@@ -97,7 +98,8 @@ static void meta_drawpix_cleanup(struct drawpix_state
*drawpix);
* Bind a particular texture level/layer to mipmap-FBO's GL_COLOR_ATTACHMENT0.
*/
void
-_mesa_meta_bind_fbo_image(struct gl_texture_image *texImage, GLuint layer)
+_mesa_meta_bind_fbo_image(GLenum attachment,
+ struct gl_texture_image *texImage, GLuint layer)
{
struct gl_texture_object *texObj = texImage-TexObject;
int level = texImage-Level;
@@ -106,17 +108,18 @@ _mesa_meta_bind_fbo_image(struct gl_texture_image
*texImage, GLuint layer)
switch (target) {
case GL_TEXTURE_1D:
_mesa_FramebufferTexture1D(GL_FRAMEBUFFER,
- GL_COLOR_ATTACHMENT0,
+ attachment,
target,
texObj-Name,
level);
break;
case GL_TEXTURE_1D_ARRAY:
case GL_TEXTURE_2D_ARRAY:
+ case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_3D:
_mesa_FramebufferTextureLayer(GL_FRAMEBUFFER,
-GL_COLOR_ATTACHMENT0,
+attachment,
texObj-Name,
level,
layer);
@@ -126,7 +129,7 @@ _mesa_meta_bind_fbo_image(struct gl_texture_image
*texImage, GLuint layer)
target = GL_TEXTURE_CUBE_MAP_POSITIVE_X + texImage-Face;
_mesa_FramebufferTexture2D(GL_FRAMEBUFFER,
- GL_COLOR_ATTACHMENT0,
+ attachment,
target,
texObj-Name,
level);
@@ -2732,6 +2735,77 @@ get_temp_image_type(struct gl_context *ctx, mesa_format
format)
}
/**
+ * Attempts to wrap the destination texture in an FBO and use
+ * glBlitFramebuffer() to implement glCopyTexSubImage().
+ */
+static bool
+copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
+ struct gl_texture_image *texImage,
+ GLint xoffset,
+ GLint yoffset,
+ GLint zoffset,
+ struct gl_renderbuffer *rb,
+ GLint x, GLint y,
+ GLsizei width, GLsizei height)
+{
+ struct gl_texture_object *texObj = texImage-TexObject;
+ GLuint fbo;
+ bool success = false;
+ GLbitfield mask;
+ GLenum status;
+
+ if (!ctx-Extensions.ARB_framebuffer_object)
+ return false;
+
+ _mesa_unlock_texture(ctx, texObj);
+
+ _mesa_meta_begin(ctx, MESA_META_ALL);
+
+ _mesa_GenFramebuffers(1, fbo);
+ _mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbo);
+
+ if (rb-_BaseFormat == GL_DEPTH_STENCIL ||
+ rb-_BaseFormat == GL_DEPTH_COMPONENT) {
+ _mesa_meta_bind_fbo_image(GL_DEPTH_ATTACHMENT, texImage, zoffset);
+ mask = GL_DEPTH_BUFFER_BIT;
+
+ if (rb-_BaseFormat == GL_DEPTH_STENCIL
+ texImage-_BaseFormat == GL_DEPTH_STENCIL) {
+ _mesa_meta_bind_fbo_image(GL_STENCIL_ATTACHMENT, texImage, zoffset);
+ mask |= GL_STENCIL_BUFFER_BIT;
+ }
+ _mesa_DrawBuffer(GL_NONE);
+ } else {
+ _mesa_meta_bind_fbo_image(GL_COLOR_ATTACHMENT0, texImage, zoffset);
+ mask = GL_COLOR_BUFFER_BIT;
+ _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0_EXT);
+ }
+
+ status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
+ if (status != GL_FRAMEBUFFER_COMPLETE)
+ goto out;
+
+ ctx-Meta-Blit.no_ctsi_fallback = true;
+ /* We skip the core BlitFramebuffer checks for format consistency, which
+* are too strict for CopyTexImage. We know
[Mesa-dev] [PATCH 2/9] meta: Refactor the BlitFramebuffer color CopyTexImage fallback.
There shouldn't be anything special about copying out a subset of the src
rb to a temp before texturing from it, so just do it when we're figuring
out our src texture binding.
This drops Anuj's change to copy an extra border of 1 pixel around the src
area. I can't see how that change could be valid, and presumably if
there's some filtering problem at edges we just need to set the right
wrap mode.
---
src/mesa/drivers/common/meta_blit.c | 77 +
1 file changed, 36 insertions(+), 41 deletions(-)
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index c201521..a65fcb2 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -389,6 +389,7 @@ blitframebuffer_texture(struct gl_context *ctx,
ctx-Texture.Unit[ctx-Texture.CurrentUnit].Sampler-Name : 0;
GLuint tempTex = 0;
struct gl_renderbuffer *rb = readAtt-Renderbuffer;
+ struct temp_texture *meta_temp_texture;
if (rb-NumSamples !ctx-Extensions.ARB_texture_multisample)
return false;
@@ -449,7 +450,38 @@ blitframebuffer_texture(struct gl_context *ctx,
}
}
} else {
- return false;
+ GLenum tex_base_format;
+ int srcW = abs(srcY1 - srcY0);
+ int srcH = abs(srcY1 - srcY0);
+ /* Fall back to doing a CopyTexSubImage to get the destination
+ * renderbuffer into a texture.
+ */
+ if (rb-NumSamples 1)
+ return false;
+
+ if (do_depth) {
+ return false;
+ } else {
+ meta_temp_texture = _mesa_meta_get_temp_texture(ctx);
+ tex_base_format =
+_mesa_base_tex_format(ctx, rb-InternalFormat);
+ }
+
+ srcLevel = 0;
+ target = meta_temp_texture-Target;
+ texObj = _mesa_lookup_texture(ctx, meta_temp_texture-TexObj);
+
+ _mesa_meta_setup_copypix_texture(ctx, meta_temp_texture,
+ srcX0, srcY0,
+ srcW, srcH,
+ tex_base_format,
+ filter);
+
+
+ srcX0 = 0;
+ srcY0 = 0;
+ srcX1 = srcW;
+ srcY1 = srcH;
}
baseLevelSave = texObj-BaseLevel;
@@ -601,7 +633,6 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
GLbitfield mask, GLenum filter)
{
struct blit_state *blit = ctx-Meta-Blit;
- struct temp_texture *tex = _mesa_meta_get_temp_texture(ctx);
struct temp_texture *depthTex = _mesa_meta_get_temp_depth_texture(ctx);
const GLint srcX = MIN2(srcX0, srcX1);
const GLint srcY = MIN2(srcY0, srcY1);
@@ -663,7 +694,7 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
* BlitFramebuffer function.
*/
if (use_glsl_version) {
- setup_glsl_blit_framebuffer(ctx, blit, NULL, tex-Target);
+ setup_glsl_blit_framebuffer(ctx, blit, NULL, depthTex-Target);
}
else {
_mesa_meta_setup_ff_tnl_for_blit(blit-VAO, blit-VBO, 2);
@@ -689,43 +720,7 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
}
if (!use_glsl_version)
- _mesa_set_enable(ctx, tex-Target, GL_TRUE);
-
- if (mask GL_COLOR_BUFFER_BIT) {
- const struct gl_framebuffer *readFb = ctx-ReadBuffer;
- const struct gl_renderbuffer *colorReadRb = readFb-_ColorReadBuffer;
- const GLenum rb_base_format =
- _mesa_base_tex_format(ctx, colorReadRb-InternalFormat);
-
- /* Using the exact source rectangle to create the texture does incorrect
- * linear filtering along the edges. So, allocate the texture extended
along
- * edges by one pixel in x, y directions.
- */
- _mesa_meta_setup_copypix_texture(ctx, tex,
- srcX - 1, srcY - 1, srcW + 2, srcH + 2,
- rb_base_format, filter);
- /* texcoords (after texture allocation!) */
- {
- verts[0].tex[0] = 1.0F;
- verts[0].tex[1] = 1.0F;
- verts[1].tex[0] = tex-Sright - 1.0F;
- verts[1].tex[1] = 1.0F;
- verts[2].tex[0] = tex-Sright - 1.0F;
- verts[2].tex[1] = tex-Ttop - 1.0F;
- verts[3].tex[0] = 1.0F;
- verts[3].tex[1] = tex-Ttop - 1.0F;
-
- /* upload new vertex data */
- _mesa_BufferSubData(GL_ARRAY_BUFFER_ARB, 0, sizeof(verts), verts);
- }
-
- _mesa_set_viewport(ctx, 0, dstX, dstY, dstW, dstH);
- _mesa_ColorMask(GL_TRUE, GL_TRUE, GL_TRUE, GL_TRUE);
- _mesa_set_enable(ctx, GL_DEPTH_TEST, GL_FALSE);
- _mesa_DepthMask(GL_FALSE);
- _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4);
- mask = ~GL_COLOR_BUFFER_BIT;
- }
+ _mesa_set_enable(ctx, depthTex-Target, GL_TRUE);
if ((mask GL_DEPTH_BUFFER_BIT)
_mesa_is_desktop_gl(ctx)
@@ -783,7 +778,7 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
}
if (!use_glsl_version)
- _mesa_set_enable(ctx, tex-Target, GL_FALSE);
+
[Mesa-dev] [PATCH 4/9] meta: Move bind_fbo_image() code back to meta.c, to reuse it elsewhere.
I need to do the same code again for CopyTexSubImage().
---
src/mesa/drivers/common/meta.c | 33 +++
src/mesa/drivers/common/meta.h | 4 +++
src/mesa/drivers/common/meta_generate_mipmap.c | 36 ++
3 files changed, 39 insertions(+), 34 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index acf927b..ee8ad3f 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -93,6 +93,39 @@ static void meta_glsl_clear_cleanup(struct clear_state
*clear);
static void meta_decompress_cleanup(struct decompress_state *decompress);
static void meta_drawpix_cleanup(struct drawpix_state *drawpix);
+/**
+ * Bind a particular texture level/layer to mipmap-FBO's GL_COLOR_ATTACHMENT0.
+ */
+void
+_mesa_meta_bind_fbo_image(struct gl_texture_object *texObj, GLenum target,
+ GLuint level, GLuint layer)
+{
+ switch (target) {
+ case GL_TEXTURE_1D:
+ _mesa_FramebufferTexture1D(GL_FRAMEBUFFER,
+ GL_COLOR_ATTACHMENT0,
+ target,
+ texObj-Name,
+ level);
+ break;
+ case GL_TEXTURE_1D_ARRAY:
+ case GL_TEXTURE_2D_ARRAY:
+ case GL_TEXTURE_3D:
+ _mesa_FramebufferTextureLayer(GL_FRAMEBUFFER,
+GL_COLOR_ATTACHMENT0,
+texObj-Name,
+level,
+layer);
+ break;
+ default: /* 2D / cube */
+ _mesa_FramebufferTexture2D(GL_FRAMEBUFFER,
+ GL_COLOR_ATTACHMENT0,
+ target,
+ texObj-Name,
+ level);
+ }
+}
+
GLuint
_mesa_meta_compile_shader_with_debug(struct gl_context *ctx, GLenum target,
const GLcharARB *source)
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 1177ced..ea05ea5 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -504,4 +504,8 @@ _mesa_meta_blit_shader_table_cleanup(struct
blit_shader_table *table);
void
_mesa_meta_glsl_generate_mipmap_cleanup(struct gen_mipmap_state *mipmap);
+void
+_mesa_meta_bind_fbo_image(struct gl_texture_object *texObj, GLenum target,
+ GLuint level, GLuint layer);
+
#endif /* META_H */
diff --git a/src/mesa/drivers/common/meta_generate_mipmap.c
b/src/mesa/drivers/common/meta_generate_mipmap.c
index d62819c..7c7f64d 100644
--- a/src/mesa/drivers/common/meta_generate_mipmap.c
+++ b/src/mesa/drivers/common/meta_generate_mipmap.c
@@ -44,38 +44,6 @@
#include main/viewport.h
#include drivers/common/meta.h
-/**
- * Bind a particular texture level/layer to mipmap-FBO's GL_COLOR_ATTACHMENT0.
- */
-static void
-bind_fbo_image(struct gl_texture_object *texObj, GLenum target,
- GLuint level, GLuint layer)
-{
- switch (target) {
- case GL_TEXTURE_1D:
- _mesa_FramebufferTexture1D(GL_FRAMEBUFFER,
- GL_COLOR_ATTACHMENT0,
- target,
- texObj-Name,
- level);
- break;
- case GL_TEXTURE_1D_ARRAY:
- case GL_TEXTURE_2D_ARRAY:
- case GL_TEXTURE_3D:
- _mesa_FramebufferTextureLayer(GL_FRAMEBUFFER,
-GL_COLOR_ATTACHMENT0,
-texObj-Name,
-level,
-layer);
- break;
- default: /* 2D / cube */
- _mesa_FramebufferTexture2D(GL_FRAMEBUFFER,
- GL_COLOR_ATTACHMENT0,
- target,
- texObj-Name,
- level);
- }
-}
/**
* Check if the call to _mesa_meta_GenerateMipmap() will require a
@@ -135,7 +103,7 @@ fallback_required(struct gl_context *ctx, GLenum target,
_mesa_GenFramebuffers(1, mipmap-FBO);
_mesa_BindFramebuffer(GL_FRAMEBUFFER_EXT, mipmap-FBO);
- bind_fbo_image(texObj, target, srcLevel, 0);
+ _mesa_meta_bind_fbo_image(texObj, target, srcLevel, 0);
status = _mesa_CheckFramebufferStatus(GL_FRAMEBUFFER_EXT);
@@ -347,7 +315,7 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum
target,
_mesa_BufferData(GL_ARRAY_BUFFER_ARB, sizeof(verts),
verts, GL_DYNAMIC_DRAW_ARB);
- bind_fbo_image(texObj, faceTarget, dstLevel, layer);
+ _mesa_meta_bind_fbo_image(texObj, faceTarget, dstLevel, layer);
/* sanity check */
if (_mesa_CheckFramebufferStatus(GL_FRAMEBUFFER) !=
--
1.9.1
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[Mesa-dev] [PATCH 1/9] meta: Drop blit src size fallback.
I think we can assert that renderbuffer size is = maximum 2D texture
size. Our source coordinates should have already been clipped to the src
renderbuffer size, but haven't actually (so we could potentially have
trouble if there's scaling, and we're in the CopyTexImage path that tries
to use src size). However, this texture size dependency was blocking the
next refactors, so I'm not sure if we want to go ahead with this series
before we get the clipping sorted out or not.
---
src/mesa/drivers/common/meta_blit.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index 31e494f..c201521 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -603,7 +603,6 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
struct blit_state *blit = ctx-Meta-Blit;
struct temp_texture *tex = _mesa_meta_get_temp_texture(ctx);
struct temp_texture *depthTex = _mesa_meta_get_temp_depth_texture(ctx);
- const GLsizei maxTexSize = tex-MaxSize;
const GLint srcX = MIN2(srcX0, srcX1);
const GLint srcY = MIN2(srcY0, srcY1);
const GLint srcW = abs(srcX1 - srcX0);
@@ -624,15 +623,6 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
const GLboolean use_glsl_version = ctx-Extensions.ARB_vertex_shader
ctx-Extensions.ARB_fragment_shader;
- /* In addition to falling back if the blit size is larger than the maximum
-* texture size, fallback if the source is multisampled. This fallback can
-* be removed once Mesa gets support ARB_texture_multisample.
-*/
- if (srcW maxTexSize || srcH maxTexSize) {
- /* XXX avoid this fallback */
- goto fallback;
- }
-
/* Multisample texture blit support requires texture multisample. */
if (ctx-ReadBuffer-Visual.samples 0
!ctx-Extensions.ARB_texture_multisample) {
--
1.9.1
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[Mesa-dev] [PATCH 8/9] meta: Add support for MSAA resolves from 2D_MS_ARRAY textures.
We don't have any piglit tests for this currently.
v2: Use vec3s for the texcoords so it has some hope of working.
---
src/mesa/drivers/common/meta.h | 8 ++
src/mesa/drivers/common/meta_blit.c | 56 ++---
2 files changed, 48 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index fd8a385..fde4f9a 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -240,6 +240,14 @@ enum blit_msaa_shader {
BLIT_MSAA_SHADER_2D_MULTISAMPLE_COPY_UINT,
BLIT_MSAA_SHADER_2D_MULTISAMPLE_DEPTH_RESOLVE,
BLIT_MSAA_SHADER_2D_MULTISAMPLE_DEPTH_COPY,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_RESOLVE,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_RESOLVE_INT,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_RESOLVE_UINT,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_COPY,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_COPY_INT,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_COPY_UINT,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_DEPTH_RESOLVE,
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_DEPTH_COPY,
BLIT_MSAA_SHADER_COUNT,
};
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index 0bd76a1..3f91082 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -66,7 +66,9 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
bool dst_is_msaa = false;
GLenum src_datatype;
const char *vec4_prefix;
+ const char *sampler_array_suffix = ;
char *name;
+ const char *texcoord_type = vec2;
if (src_rb) {
src_datatype = _mesa_get_format_datatype(src_rb-Format);
@@ -94,6 +96,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
switch (target) {
case GL_TEXTURE_2D_MULTISAMPLE:
+ case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
if (src_rb-_BaseFormat == GL_DEPTH_COMPONENT ||
src_rb-_BaseFormat == GL_DEPTH_STENCIL) {
if (dst_is_msaa)
@@ -106,6 +109,13 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
else
shader_index = BLIT_MSAA_SHADER_2D_MULTISAMPLE_RESOLVE;
}
+
+ if (target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY) {
+ shader_index += (BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_RESOLVE -
+ BLIT_MSAA_SHADER_2D_MULTISAMPLE_RESOLVE);
+ sampler_array_suffix = Array;
+ texcoord_type = vec3;
+ }
break;
default:
_mesa_problem(ctx, Unkown texture target %s\n,
@@ -136,6 +146,8 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
mem_ctx = ralloc_context(NULL);
if (shader_index == BLIT_MSAA_SHADER_2D_MULTISAMPLE_DEPTH_RESOLVE ||
+ shader_index == BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_DEPTH_RESOLVE ||
+ shader_index == BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_DEPTH_COPY ||
shader_index == BLIT_MSAA_SHADER_2D_MULTISAMPLE_DEPTH_COPY) {
char *sample_index;
const char *arb_sample_shading_extension_string;
@@ -166,26 +178,31 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
vs_source = ralloc_asprintf(mem_ctx,
#version 130\n
in vec2 position;\n
- in vec2 textureCoords;\n
- out vec2 texCoords;\n
+ in %s textureCoords;\n
+ out %s texCoords;\n
void main()\n
{\n
texCoords = textureCoords;\n
gl_Position = vec4(position, 0.0,
1.0);\n
- }\n);
+ }\n,
+ texcoord_type,
+ texcoord_type);
fs_source = ralloc_asprintf(mem_ctx,
#version 130\n
#extension GL_ARB_texture_multisample :
enable\n
%s\n
- uniform sampler2DMS texSampler;\n
- in vec2 texCoords;\n
+ uniform sampler2DMS%s texSampler;\n
+ in %s texCoords;\n
out vec4 out_color;\n
\n
void main()\n
{\n
- gl_FragDepth = texelFetch(texSampler,
ivec2(texCoords), %s).r;\n
+ gl_FragDepth = texelFetch(texSampler,
i%s(texCoords), %s).r;\n
}\n,
arb_sample_shading_extension_string,
+ sampler_array_suffix,
+ texcoord_type,
+ texcoord_type,
Re: [Mesa-dev] [PATCH V3 00/30] ARB_texture_view for i965
Chris Forbes chr...@ijw.co.nz writes: Ian, Would we put that format in a view class by itself? For glamor, I would really want it to be the same view class as, say, RGBA2101010. pgp1gXkqy5PTm.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] Thoughts about threading the GLSL compiler
The topic of improving application load time by running the GLSL compiler in a separate thread for each call to glCompileShader (or glLinkProgram). Eric had done some experiments with this before (is there a branch somewhere?), and he found that it wasn't a win because programs regularly do glCompileShader(sh, ...); glGetShaderiv(sh, GL_COMPILE_STATUS); Calling glGetShaderiv effectively blocked waiting for the compiler thread to finish. I think there's a slight modification of the obvious technique that allows a simple implemenation and improved performance for applications like the above sample. The compiler thread generates three things that the application can use, and each of these is generated at a different time by a different part of the stack. 1. The compile status: the common front-end. 2. The info log: the common front-end and possibly the driver (e.g., performance warnings when debug is enabled). 3. The executable program: the driver. Each of these are also used at different times. The compile status is often used immediately, and the executable program isn't used until sometime later. Producing the executable program is the thing that we want to accelerate, and a lot of the time spent to produce that happens deep in the driver (e.g., register allocation). We ought to be handle this by having a condition variable per program and a ready flag for each of compile status, info log, and executable. The consumers can just wait on the condition variable, and the producer can just wait on the condition varible and the ready-flag become true. This will allow us to get GL_COMPILE_STATUS without having to wait for register allocation. Thoughts? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().
On 04/08/2014 04:01 AM, Iago Toral Quiroga wrote: This should help prevent situations where we render without proper index bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455 --- src/mesa/drivers/dri/i965/brw_draw.c | 24 ++-- src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c | 6 ++--- src/mesa/tnl/t_context.c | 2 +- src/mesa/tnl/t_draw.c| 34 +--- src/mesa/tnl/tnl.h | 9 5 files changed, 27 insertions(+), 48 deletions(-) Nice! Reviewed-by: Kenneth Graunke kenn...@whitecape.org signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V3 00/30] ARB_texture_view for i965
On 04/08/2014 01:25 PM, Chris Forbes wrote: Ian, Would we put that format in a view class by itself? I think the BGRA8 could go in VIEW_CLASS_32_BITS. If you create an RGBA8 view of a BGRA8 texture you'll get swizzled reads. Given that you can create a RGB9_E5 view of a RGB10_A2UI texture, I think this is fine. -- Chris On Wed, Apr 9, 2014 at 7:49 AM, Ian Romanick i...@freedesktop.org wrote: On 04/08/2014 02:13 AM, Kenneth Graunke wrote: On 04/02/2014 01:04 AM, Chris Forbes wrote: This series adds ARB_texture_view support for i965 Gen7/7.5. Significant changes from V2: - All the assorted post-V2 format fixups are moved to the start of the series. This gives us consistent memory layout for all the formats between which we have to support casting. - Texture validation changes are simplified (Eric) - CopyTexSubImage respects view parameters. Series is: Reviewed-by: Kenneth Graunke kenn...@whitecape.org I do think it would be worth trying various benchmarks and games against the series, to see if the RGBA vs. BGRA swizzling issue makes much of a difference. It will probably change some things, but I don't have a good sense of how. I believe the losing BGRA is going to hurt web browsers... Eric also indicated that it would hurt Glamor. I think we should add an extension that enables BGRA for TexStorage. On ES, EXT_texture_storage + APPLE_texture_format_BGRA does this by adding GL_BGRA8_EXT as an internal format for *only* TexStorage. I'll also need to port this to Gen8... Nice work, Chris! Thanks for doing this. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/3] i965/gen7: Skip repeated NULL depth/stencil state emits.
Improves cairo performance on glamor by 2.87752% +/- 0.966977 (n=57).
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 +
src/mesa/drivers/dri/i965/brw_context.h | 3 +++
src/mesa/drivers/dri/i965/gen7_misc_state.c | 8
src/mesa/drivers/dri/i965/gen8_depth_state.c | 8
4 files changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 252219e..57ff30a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -278,6 +278,7 @@ retry:
*/
brw-state.dirty.brw = ~0;
brw-state.dirty.cache = ~0;
+ brw-no_depth_or_stencil = false;
brw-ib.type = -1;
/* Flush the sampler cache so any texturing from the destination is
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 487142c..f8ca58f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1119,6 +1119,9 @@ struct brw_context
/* Whether a meta-operation is in progress. */
bool meta_in_progress;
+ /* Whether the last depth/stencil packets were both NULL. */
+ bool no_depth_or_stencil;
+
struct {
struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 8fb0eec..328b01e 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -52,6 +52,12 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
const struct intel_renderbuffer *irb = NULL;
const struct gl_renderbuffer *rb = NULL;
+ /* Skip repeated NULL depth/stencil emits (think 2D rendering). */
+ if (!mt brw-no_depth_or_stencil) {
+ assert(brw-hw_ctx);
+ return;
+ }
+
intel_emit_depth_stall_flushes(brw);
irb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
@@ -190,6 +196,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
OUT_BATCH(depth_mt ? depth_mt-depth_clear_value : 0);
OUT_BATCH(1);
ADVANCE_BATCH();
+
+ brw-no_depth_or_stencil = !mt;
}
/**
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c
b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 621951e..8f5718a 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -49,6 +49,12 @@ emit_depth_packets(struct brw_context *brw,
uint32_t lod,
uint32_t min_array_element)
{
+ /* Skip repeated NULL depth/stencil emits (think 2D rendering). */
+ if (!depth_mt !stencil_mt brw-no_depth_or_stencil) {
+ assert(brw-hw_ctx);
+ return;
+ }
+
intel_emit_depth_stall_flushes(brw);
/* _NEW_BUFFERS, _NEW_DEPTH, _NEW_STENCIL */
@@ -130,6 +136,8 @@ emit_depth_packets(struct brw_context *brw,
OUT_BATCH(depth_mt ? depth_mt-depth_clear_value : 0);
OUT_BATCH(1);
ADVANCE_BATCH();
+
+ brw-no_depth_or_stencil = !depth_mt !stencil_mt;
}
/* Awful vtable-compatible function; should be cleaned up in the future. */
--
1.9.1
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[Mesa-dev] [PATCH 3/3] i965: Stop setting up a 1:1 attrib member in our vertex inputs.
It's just the array index, so we can just go look at the array and see
which element we are.
No significant performance difference (n=140)
---
src/mesa/drivers/dri/i965/brw_context.h | 2 --
src/mesa/drivers/dri/i965/brw_draw.c | 1 -
src/mesa/drivers/dri/i965/brw_draw_upload.c | 2 +-
src/mesa/drivers/dri/i965/gen8_draw_upload.c | 2 +-
4 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index f8ca58f..82b38fc 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -833,8 +833,6 @@ struct brw_vertex_element {
int buffer;
- /** The corresponding Mesa vertex attribute */
- gl_vert_attrib attrib;
/** Offset of the first element within the buffer object */
unsigned int offset;
};
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index ef0f273..984d230 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -291,7 +291,6 @@ static void brw_merge_inputs( struct brw_context *brw,
for (i = 0; i VERT_ATTRIB_MAX; i++) {
brw-vb.inputs[i].buffer = -1;
brw-vb.inputs[i].glarray = arrays[i];
- brw-vb.inputs[i].attrib = (gl_vert_attrib) i;
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c
b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 2b56cde..45e9d3f 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -713,7 +713,7 @@ static void brw_emit_vertices(struct brw_context *brw)
uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
- if (input-attrib == VERT_ATTRIB_EDGEFLAG) {
+ if (input == brw-vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
/* Gen6+ passes edgeflag as sideband along with the vertex, instead
* of in the VUE. We have to upload it sideband as the last vertex
* element according to the B-Spec.
diff --git a/src/mesa/drivers/dri/i965/gen8_draw_upload.c
b/src/mesa/drivers/dri/i965/gen8_draw_upload.c
index 83bc240..0272892 100644
--- a/src/mesa/drivers/dri/i965/gen8_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/gen8_draw_upload.c
@@ -139,7 +139,7 @@ gen8_emit_vertices(struct brw_context *brw)
* glEdgeFlagPointer, on the other hand, gives us an unnormalized
* integer ubyte. Just rewrite that to convert to a float.
*/
- if (input-attrib == VERT_ATTRIB_EDGEFLAG) {
+ if (input == brw-vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
/* Gen6+ passes edgeflag as sideband along with the vertex, instead
* of in the VUE. We have to upload it sideband as the last vertex
* element according to the B-Spec.
--
1.9.1
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[Mesa-dev] [PATCH 2/3] i965: Skip a bunch of IB BO refcount twiddling.
Improves cairo performance on glamor by 1.64828% +/- 1.04742% (n=65).
---
src/mesa/drivers/dri/i965/brw_draw_upload.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c
b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index a579025..2b56cde 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -813,7 +813,7 @@ static void brw_upload_indices(struct brw_context *brw)
struct gl_context *ctx = brw-ctx;
const struct _mesa_index_buffer *index_buffer = brw-ib.ib;
GLuint ib_size;
- drm_intel_bo *bo = NULL;
+ drm_intel_bo *old_bo = brw-ib.bo;
struct gl_buffer_object *bufferobj;
GLuint offset;
GLuint ib_type_size;
@@ -831,7 +831,7 @@ static void brw_upload_indices(struct brw_context *brw)
/* Get new bufferobj, offset:
*/
intel_upload_data(brw, index_buffer-ptr, ib_size, ib_type_size,
- bo, offset);
+ brw-ib.bo, offset);
} else {
offset = (GLuint) (unsigned long) index_buffer-ptr;
@@ -849,13 +849,19 @@ static void brw_upload_indices(struct brw_context *brw)
bufferobj,
MAP_INTERNAL);
- intel_upload_data(brw, map, ib_size, ib_type_size, bo, offset);
+ intel_upload_data(brw, map, ib_size, ib_type_size,
+ brw-ib.bo, offset);
ctx-Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
} else {
- bo = intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
- offset, ib_size);
- drm_intel_bo_reference(bo);
+ drm_intel_bo *bo =
+intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
+ offset, ib_size);
+ if (bo != brw-ib.bo) {
+drm_intel_bo_unreference(brw-ib.bo);
+brw-ib.bo = bo;
+drm_intel_bo_reference(bo);
+ }
}
}
@@ -865,14 +871,8 @@ static void brw_upload_indices(struct brw_context *brw)
*/
brw-ib.start_vertex_offset = offset / ib_type_size;
- if (brw-ib.bo != bo) {
- drm_intel_bo_unreference(brw-ib.bo);
- brw-ib.bo = bo;
-
+ if (brw-ib.bo != old_bo)
brw-state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
- } else {
- drm_intel_bo_unreference(bo);
- }
if (index_buffer-type != brw-ib.type) {
brw-ib.type = index_buffer-type;
--
1.9.1
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Re: [Mesa-dev] [PATCH 2/9] meta: Refactor the BlitFramebuffer color CopyTexImage fallback.
On 04/08/2014 02:03 PM, Eric Anholt wrote:
There shouldn't be anything special about copying out a subset of the src
rb to a temp before texturing from it, so just do it when we're figuring
out our src texture binding.
This drops Anuj's change to copy an extra border of 1 pixel around the src
area. I can't see how that change could be valid, and presumably if
there's some filtering problem at edges we just need to set the right
wrap mode.
A lot of Anuj's recent changes have been to fix failures in the the
desktop GL conformance tests. It would be worth having Anuj verify that
this series doesn't regress anything there...
---
src/mesa/drivers/common/meta_blit.c | 77
+
1 file changed, 36 insertions(+), 41 deletions(-)
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index c201521..a65fcb2 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -389,6 +389,7 @@ blitframebuffer_texture(struct gl_context *ctx,
ctx-Texture.Unit[ctx-Texture.CurrentUnit].Sampler-Name : 0;
GLuint tempTex = 0;
struct gl_renderbuffer *rb = readAtt-Renderbuffer;
+ struct temp_texture *meta_temp_texture;
if (rb-NumSamples !ctx-Extensions.ARB_texture_multisample)
return false;
@@ -449,7 +450,38 @@ blitframebuffer_texture(struct gl_context *ctx,
}
}
} else {
- return false;
+ GLenum tex_base_format;
+ int srcW = abs(srcY1 - srcY0);
+ int srcH = abs(srcY1 - srcY0);
+ /* Fall back to doing a CopyTexSubImage to get the destination
+ * renderbuffer into a texture.
+ */
+ if (rb-NumSamples 1)
+ return false;
+
+ if (do_depth) {
+ return false;
+ } else {
+ meta_temp_texture = _mesa_meta_get_temp_texture(ctx);
+ tex_base_format =
+_mesa_base_tex_format(ctx, rb-InternalFormat);
+ }
+
+ srcLevel = 0;
+ target = meta_temp_texture-Target;
+ texObj = _mesa_lookup_texture(ctx, meta_temp_texture-TexObj);
+
+ _mesa_meta_setup_copypix_texture(ctx, meta_temp_texture,
+ srcX0, srcY0,
+ srcW, srcH,
+ tex_base_format,
+ filter);
+
+
+ srcX0 = 0;
+ srcY0 = 0;
+ srcX1 = srcW;
+ srcY1 = srcH;
}
baseLevelSave = texObj-BaseLevel;
@@ -601,7 +633,6 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
GLbitfield mask, GLenum filter)
{
struct blit_state *blit = ctx-Meta-Blit;
- struct temp_texture *tex = _mesa_meta_get_temp_texture(ctx);
struct temp_texture *depthTex = _mesa_meta_get_temp_depth_texture(ctx);
const GLint srcX = MIN2(srcX0, srcX1);
const GLint srcY = MIN2(srcY0, srcY1);
@@ -663,7 +694,7 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
* BlitFramebuffer function.
*/
if (use_glsl_version) {
- setup_glsl_blit_framebuffer(ctx, blit, NULL, tex-Target);
+ setup_glsl_blit_framebuffer(ctx, blit, NULL, depthTex-Target);
}
else {
_mesa_meta_setup_ff_tnl_for_blit(blit-VAO, blit-VBO, 2);
@@ -689,43 +720,7 @@ _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
}
if (!use_glsl_version)
- _mesa_set_enable(ctx, tex-Target, GL_TRUE);
-
- if (mask GL_COLOR_BUFFER_BIT) {
- const struct gl_framebuffer *readFb = ctx-ReadBuffer;
- const struct gl_renderbuffer *colorReadRb = readFb-_ColorReadBuffer;
- const GLenum rb_base_format =
- _mesa_base_tex_format(ctx, colorReadRb-InternalFormat);
-
- /* Using the exact source rectangle to create the texture does
incorrect
- * linear filtering along the edges. So, allocate the texture extended
along
- * edges by one pixel in x, y directions.
- */
- _mesa_meta_setup_copypix_texture(ctx, tex,
- srcX - 1, srcY - 1, srcW + 2, srcH +
2,
- rb_base_format, filter);
- /* texcoords (after texture allocation!) */
- {
- verts[0].tex[0] = 1.0F;
- verts[0].tex[1] = 1.0F;
- verts[1].tex[0] = tex-Sright - 1.0F;
- verts[1].tex[1] = 1.0F;
- verts[2].tex[0] = tex-Sright - 1.0F;
- verts[2].tex[1] = tex-Ttop - 1.0F;
- verts[3].tex[0] = 1.0F;
- verts[3].tex[1] = tex-Ttop - 1.0F;
-
- /* upload new vertex data */
- _mesa_BufferSubData(GL_ARRAY_BUFFER_ARB, 0, sizeof(verts), verts);
- }
-
- _mesa_set_viewport(ctx, 0, dstX, dstY, dstW, dstH);
- _mesa_ColorMask(GL_TRUE, GL_TRUE, GL_TRUE, GL_TRUE);
- _mesa_set_enable(ctx, GL_DEPTH_TEST, GL_FALSE);
- _mesa_DepthMask(GL_FALSE);
- _mesa_DrawArrays(GL_TRIANGLE_FAN, 0,
Re: [Mesa-dev] [PATCH] i965: Stop advertising GL_MESA_ycbcr_texture.
Kenneth Graunke kenn...@whitecape.org writes: The new fragment shader backend has never supported the necessary color conversion code for this to work. We began using the new backend in Mesa 7.10 for GLSL (commit a81d423d93f22a948f3aa4bf73, October 2010), and for ARB_fragment_program in Mesa 9.1 (commit 97615b2d8c7c3cea6fd3a4, August 2012). I haven't heard any complaints, so I don't think anyone will miss this feature. I believe mplayer used it at one point, but these days defaults to other paths anyway. This kept slipping off my TODO list. Reviewed-by: Eric Anholt e...@anholt.net pgpMGi1ELNIh0.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/4] xa: handle solid-fill src/mask
Am 08.04.2014 13:49, schrieb Rob Clark: btw, I think I've tracked down at least one of the rendercheck issues I was having. Which seems to be a pre-existing condition. The problem is a composite operation with xrgb src and a8 dst. Ends up generating a shader along the lines of: 0: TEX TEMP[0], IN[0], SAMP[0], 2D 1: MOV TEMP[0].w, IMM[..] 2: MOV OUT[0], TEMP[0]. 3: END in this case, my compiler optimizes out the texture fetch. But that causes a bit of confusion in freedreno because half the driver thinks there is a texture and sets things up accordingly. I'm not entirely sure if XA should detect this.. or if that should be fixed in the driver.. I think the driver should handle that correctly in any case - I could easily see such shaders being generated in other places too. Obviously, a driver can optimize away the tex instruction but is not required to do so (though it would be better if it did...), the shader is perfectly valid (but needs the sampler to be set up correctly). If the state tracker should avoid it in the first place, I'm not certain. If it doesn't add too much complexity, sounds like a good idea. But just relying on dead code elimination in the drivers doesn't sound too unreasonable to me neither. Roland ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] Accelerated meta CopyTexSubImage
On 04/08/2014 02:03 PM, Eric Anholt wrote: Here's a rework of the series for meta CopyTexSubImage (required for i965's gen8 support, since we're probably going to avoid doing blorp at all for it). Ken had almost-reviewed a previous version of the patch, but I went back and did some refactors before it that bring this feature improvement to a net lines of code reduction while hopefully improving performance on older drivers at the same time. Assuming Anuj finds no conformance regressions, the series is Reviewed-by: Ian Romanick ian.d.roman...@intel.com I especially like the clean-ups in patches 4 and 5. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/3] i965/gen7: Skip repeated NULL depth/stencil state emits.
Even though patch 3 doesn't help performance, I think it makes the code
better. Series is
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
One question below...
On 04/08/2014 02:31 PM, Eric Anholt wrote:
Improves cairo performance on glamor by 2.87752% +/- 0.966977 (n=57).
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 +
src/mesa/drivers/dri/i965/brw_context.h | 3 +++
src/mesa/drivers/dri/i965/gen7_misc_state.c | 8
src/mesa/drivers/dri/i965/gen8_depth_state.c | 8
4 files changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 252219e..57ff30a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -278,6 +278,7 @@ retry:
*/
brw-state.dirty.brw = ~0;
brw-state.dirty.cache = ~0;
+ brw-no_depth_or_stencil = false;
brw-ib.type = -1;
/* Flush the sampler cache so any texturing from the destination is
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 487142c..f8ca58f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1119,6 +1119,9 @@ struct brw_context
/* Whether a meta-operation is in progress. */
bool meta_in_progress;
+ /* Whether the last depth/stencil packets were both NULL. */
+ bool no_depth_or_stencil;
+
struct {
struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 8fb0eec..328b01e 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -52,6 +52,12 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
const struct intel_renderbuffer *irb = NULL;
const struct gl_renderbuffer *rb = NULL;
+ /* Skip repeated NULL depth/stencil emits (think 2D rendering). */
+ if (!mt brw-no_depth_or_stencil) {
+ assert(brw-hw_ctx);
What does this assertion catch?
+ return;
+ }
+
intel_emit_depth_stall_flushes(brw);
irb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
@@ -190,6 +196,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
OUT_BATCH(depth_mt ? depth_mt-depth_clear_value : 0);
OUT_BATCH(1);
ADVANCE_BATCH();
+
+ brw-no_depth_or_stencil = !mt;
}
/**
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c
b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 621951e..8f5718a 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -49,6 +49,12 @@ emit_depth_packets(struct brw_context *brw,
uint32_t lod,
uint32_t min_array_element)
{
+ /* Skip repeated NULL depth/stencil emits (think 2D rendering). */
+ if (!depth_mt !stencil_mt brw-no_depth_or_stencil) {
+ assert(brw-hw_ctx);
+ return;
+ }
+
intel_emit_depth_stall_flushes(brw);
/* _NEW_BUFFERS, _NEW_DEPTH, _NEW_STENCIL */
@@ -130,6 +136,8 @@ emit_depth_packets(struct brw_context *brw,
OUT_BATCH(depth_mt ? depth_mt-depth_clear_value : 0);
OUT_BATCH(1);
ADVANCE_BATCH();
+
+ brw-no_depth_or_stencil = !depth_mt !stencil_mt;
}
/* Awful vtable-compatible function; should be cleaned up in the future. */
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Re: [Mesa-dev] Thoughts about threading the GLSL compiler
Ian Romanick i...@freedesktop.org writes: The topic of improving application load time by running the GLSL compiler in a separate thread for each call to glCompileShader (or glLinkProgram). Eric had done some experiments with this before (is there a branch somewhere?), and he found that it wasn't a win because programs regularly do That's the compiler-threads branch of my tree. glCompileShader(sh, ...); glGetShaderiv(sh, GL_COMPILE_STATUS); Calling glGetShaderiv effectively blocked waiting for the compiler thread to finish. Before thinking about optimizing these paths, it's important to break out the profiler. I took a slow-to-compile (but not exceptionally slow) program: unigine heaven #465. run_test (33.6%) - glCompileShader (9.4%) - preprocess (1.4%) - parse (.9%) - ast_to_hir (1.3%) - do_common_optimization (5.7%) - glLinkProgram (24.3%) - link_shaders (4.5%) - brw_link_shader (19.8%) - do_common_optimization (7.1%) - other brw transforms (1.2%) - brw_fs_precompile (11.2%) So the screwup I made is obvious now: I tried to optimize CompileShader, because it was easy, but even if they didn't check compile status after the compile, they're going to link right after the compile and block anyway. Even if I just moved optimization to a thread instead of all of parsing, and they they happened to do all compiles (and status checks) and then all links, it would still be relatively little of the overhead I pushed out -- only the 5.7%/33.6% in do_common_optimization. What I should have tackled instead was shoving brw_link_shader's optimization and precompile out to a thread, and then join with the threaded precompile (reaping its output, since we don't want reentrance in the context's program cache) when you go to search for a compiled shader for the program at draw time. pgp7GOq0uX9AF.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/4] xa: handle solid-fill src/mask
On Tue, Apr 8, 2014 at 5:41 PM, Roland Scheidegger srol...@vmware.com wrote: Am 08.04.2014 13:49, schrieb Rob Clark: btw, I think I've tracked down at least one of the rendercheck issues I was having. Which seems to be a pre-existing condition. The problem is a composite operation with xrgb src and a8 dst. Ends up generating a shader along the lines of: 0: TEX TEMP[0], IN[0], SAMP[0], 2D 1: MOV TEMP[0].w, IMM[..] 2: MOV OUT[0], TEMP[0]. 3: END in this case, my compiler optimizes out the texture fetch. But that causes a bit of confusion in freedreno because half the driver thinks there is a texture and sets things up accordingly. I'm not entirely sure if XA should detect this.. or if that should be fixed in the driver.. I think the driver should handle that correctly in any case - I could easily see such shaders being generated in other places too. Obviously, a driver can optimize away the tex instruction but is not required to do so (though it would be better if it did...), the shader is perfectly valid (but needs the sampler to be set up correctly). If the state tracker should avoid it in the first place, I'm not certain. If it doesn't add too much complexity, sounds like a good idea. But just relying on dead code elimination in the drivers doesn't sound too unreasonable to me neither. fwiw, the patch to avoid this in XA turned out to not be too bad (I included it in the series I sent earlier today). I also fixed it in freedreno, because the same issue could happen with binning pass shaders (basically a simplified version of vertex shader used for binning pass). But for more conventional gpus I think avoiding binding textures is probably a nice thing. BR, -R Roland ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965/fs: Track output regs on a split virtual GRF basis.
v2: Fix fragment program fragment.color output, fix smaller-than-vec4 dual
src output codegen, use offset() a bit more.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.h | 5 +--
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 18
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 64 +++-
4 files changed, 46 insertions(+), 43 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 85a5463..972d4a8 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1732,7 +1732,7 @@ fs_visitor::compact_virtual_grfs()
{ pixel_y, 1 },
{ pixel_w, 1 },
{ wpos_w, 1 },
- { dual_src_output, 1 },
+ { dual_src_output, ARRAY_SIZE(dual_src_output) },
{ outputs, ARRAY_SIZE(outputs) },
{ delta_x, ARRAY_SIZE(delta_x) },
{ delta_y, ARRAY_SIZE(delta_y) },
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 3d21ee5..d6dfde4 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -526,9 +526,8 @@ public:
struct hash_table *variable_ht;
fs_reg frag_depth;
fs_reg sample_mask;
- fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
- unsigned output_components[BRW_MAX_DRAW_BUFFERS];
- fs_reg dual_src_output;
+ fs_reg outputs[BRW_MAX_DRAW_BUFFERS * 4];
+ fs_reg dual_src_output[4];
bool do_dual_src;
int first_non_payload_grf;
/** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 49eaf05..c6f063e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -646,25 +646,25 @@ fs_visitor::get_fp_dst_reg(const prog_dst_register *dst)
return frag_depth;
} else if (dst-Index == FRAG_RESULT_COLOR) {
if (outputs[0].file == BAD_FILE) {
-outputs[0] = fs_reg(this, glsl_type::vec4_type);
-output_components[0] = 4;
+fs_reg reg = fs_reg(this, glsl_type::vec4_type);
/* Tell emit_fb_writes() to smear fragment.color across all the
* color attachments.
*/
-for (int i = 1; i c-key.nr_color_regions; i++) {
- outputs[i] = outputs[0];
- output_components[i] = output_components[0];
+for (int i = 0; i c-key.nr_color_regions; i++) {
+ for (int j = 0; j 4; j++)
+ outputs[i * 4 + j] = offset(reg, j);
}
}
return outputs[0];
} else {
int output_index = dst-Index - FRAG_RESULT_DATA0;
- if (outputs[output_index].file == BAD_FILE) {
-outputs[output_index] = fs_reg(this, glsl_type::vec4_type);
+ if (outputs[output_index * 4].file == BAD_FILE) {
+fs_reg reg = fs_reg(this, glsl_type::vec4_type);
+for (int i = 0; i 4; i++)
+ outputs[output_index * 4 + i] = offset(reg, i);
}
- output_components[output_index] = 4;
- return outputs[output_index];
+ return outputs[output_index * 4];
}
case PROGRAM_UNDEFINED:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 63a0ae5..a017d55 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -70,17 +70,25 @@ fs_visitor::visit(ir_variable *ir)
} else if (ir-data.mode == ir_var_shader_out) {
reg = new(this-mem_ctx) fs_reg(this, ir-type);
+ int vector_elements =
+ ir-type-is_array() ? ir-type-fields.array-vector_elements
+ : ir-type-vector_elements;
+
if (ir-data.index 0) {
-assert(ir-data.location == FRAG_RESULT_DATA0);
-assert(ir-data.index == 1);
-this-dual_src_output = *reg;
+ assert(ir-data.location == FRAG_RESULT_DATA0);
+ assert(ir-data.index == 1);
+ for (unsigned i = 0; i vector_elements; i++)
+this-dual_src_output[i + ir-data.location_frac] = offset(*reg,
i);
this-do_dual_src = true;
} else if (ir-data.location == FRAG_RESULT_COLOR) {
+ fs_reg chan = *reg;
/* Writing gl_FragColor outputs to all color regions. */
-for (unsigned int i = 0; i MAX2(c-key.nr_color_regions, 1); i++) {
- this-outputs[i] = *reg;
- this-output_components[i] = 4;
-}
+ for (int j = 0; j vector_elements; j++) {
+for (unsigned i = 0; i MAX2(c-key.nr_color_regions, 1); i++) {
+ this-outputs[i * 4 + j + ir-data.location_frac] = chan;
+}
+chan.reg_offset++;
+ }
} else if (ir-data.location == FRAG_RESULT_DEPTH) {
this-frag_depth = *reg;
} else if (ir-data.location ==
Re: [Mesa-dev] [PATCH 1/3] i965/gen7: Skip repeated NULL depth/stencil state emits.
On 04/08/2014 02:57 PM, Ian Romanick wrote:
Even though patch 3 doesn't help performance, I think it makes the code
better. Series is
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
One question below...
On 04/08/2014 02:31 PM, Eric Anholt wrote:
Improves cairo performance on glamor by 2.87752% +/- 0.966977 (n=57).
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 +
src/mesa/drivers/dri/i965/brw_context.h | 3 +++
src/mesa/drivers/dri/i965/gen7_misc_state.c | 8
src/mesa/drivers/dri/i965/gen8_depth_state.c | 8
4 files changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 252219e..57ff30a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -278,6 +278,7 @@ retry:
*/
brw-state.dirty.brw = ~0;
brw-state.dirty.cache = ~0;
+ brw-no_depth_or_stencil = false;
brw-ib.type = -1;
/* Flush the sampler cache so any texturing from the destination is
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 487142c..f8ca58f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1119,6 +1119,9 @@ struct brw_context
/* Whether a meta-operation is in progress. */
bool meta_in_progress;
+ /* Whether the last depth/stencil packets were both NULL. */
+ bool no_depth_or_stencil;
+
struct {
struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 8fb0eec..328b01e 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -52,6 +52,12 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
const struct intel_renderbuffer *irb = NULL;
const struct gl_renderbuffer *rb = NULL;
+ /* Skip repeated NULL depth/stencil emits (think 2D rendering). */
+ if (!mt brw-no_depth_or_stencil) {
+ assert(brw-hw_ctx);
What does this assertion catch?
Without hardware contexts, your state is potentially lost after
submitting the batch (because any other program can come in and clobber
it). So, just because we programmed null-depth-state last time, it may
not be present anymore. Hardware contexts ensure your old state is
still present.
Gen6+ always enables hardware contexts (although ChromeOS patches them out).
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[Mesa-dev] [Bug 77208] New: VdpPresentationQueueGetTime does not return a monotonic time
https://bugs.freedesktop.org/show_bug.cgi?id=77208 Priority: medium Bug ID: 77208 Assignee: mesa-dev@lists.freedesktop.org Summary: VdpPresentationQueueGetTime does not return a monotonic time Severity: normal Classification: Unclassified OS: All Reporter: nfx...@gmail.com Hardware: Other Status: NEW Version: 9.0 Component: Other Product: Mesa It appears VdpPresentationQueueGetTime does not always return a monotonic, steady (i.e. no jumps) time. This can be a bit of a problem since the API basically assumes a reliable timer. The unreliable timer causes two basic problems: 1. VdpPresentationQueueDisplay is unreliable. Since between retrieving the current vdpau time, calculating the presentation time, and calling VdpPresentationQueueDisplay the timer could jump, the function becomes essentially useless, unless you pass 0 to it. 2. The presentation time returned by VdpPresentationQueueQuerySurfaceStatus is useless. Since the timer could jump at any time, the application can't really use the first_presentation_time value for anything. At least the video players mplayer2 and mpv have trouble with this. They try to queue frames at vsync intervals, and the framedropping code is involved with it too. Jumps have been reported in the following situations: 1. Moving the window with the vdpau context to another display 2. Pausing/unpausing mpv. I'm unsure why this would happen, since pausing/unpausing is obviously not part of the vdpau API - but I don't know what triggers it. Maybe it happens when the presentation queue becomes empty? For what it's worth, I can't personally test with vdpau/Mesa. Unless there's some kind of software emulation of vdpau? -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Stop advertising GL_MESA_ycbcr_texture.
On 04/08/2014 01:56 PM, Kenneth Graunke wrote: The new fragment shader backend has never supported the necessary color conversion code for this to work. We began using the new backend in Mesa 7.10 for GLSL (commit a81d423d93f22a948f3aa4bf73, October 2010), and for ARB_fragment_program in Mesa 9.1 (commit 97615b2d8c7c3cea6fd3a4, August 2012). I haven't heard any complaints, so I don't think anyone will miss this feature. I believe mplayer used it at one point, but these days defaults to other paths anyway. Signed-off-by: Kenneth Graunke kenn...@whitecape.org Cc: Topi Pohjolainen topi.pohjolai...@intel.com Cc: Ian Romanick i...@freedesktop.org Cc: Eric Anholt e...@anholt.net Add a Cc: mesa-stable, and you've got Reviewed-by: Ian Romanick ian.d.roman...@intel.com --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 15fcd30..760b605 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -231,7 +231,6 @@ intelInitExtensions(struct gl_context *ctx) ctx-Extensions.ATI_separate_stencil = true; ctx-Extensions.ATI_texture_env_combine3 = true; ctx-Extensions.MESA_pack_invert = true; - ctx-Extensions.MESA_ycbcr_texture = true; ctx-Extensions.NV_conditional_render = true; ctx-Extensions.NV_primitive_restart = true; ctx-Extensions.NV_texture_env_combine4 = true; ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 77208] VdpPresentationQueueGetTime does not return a monotonic time
https://bugs.freedesktop.org/show_bug.cgi?id=77208 nfx...@gmail.com changed: What|Removed |Added CC||nfx...@gmail.com --- Comment #1 from nfx...@gmail.com --- Oh, it seems the pausing issue could be caused by interaction with power management. This is what a user posted: When polling '/sys/kernel/debug/dri/0/radeon_pm_info' you can see that this only happens when the power level switches from an UVD power level to a non-UVD power level. Pause - 1-2 seconds - non-UVD power level - Play - Stutter -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] swrast: Add glBlitFramebuffer to commands affected by conditional rendering
Reviewed-by: Brian Paul bri...@vmware.com
On Mon, Apr 7, 2014 at 1:08 PM, Anuj Phogat anuj.pho...@gmail.com wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/swrast/s_blit.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/swrast/s_blit.c b/src/mesa/swrast/s_blit.c
index 1ba188c..e3b45f1 100644
--- a/src/mesa/swrast/s_blit.c
+++ b/src/mesa/swrast/s_blit.c
@@ -29,6 +29,7 @@
#include main/macros.h
#include main/format_unpack.h
#include main/format_pack.h
+#include main/condrender.h
#include s_context.h
@@ -748,6 +749,13 @@ _swrast_BlitFramebuffer(struct gl_context *ctx,
};
GLint i;
+ /* Page 679 of OpenGL 4.4 spec says:
+*Added BlitFramebuffer to commands affected by conditional
rendering in
+* section 10.10 (Bug 9562).
+*/
+ if (!_mesa_check_conditional_render(ctx))
+ return; /* Do not blit */
+
if (!_mesa_clip_blit(ctx, srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1)) {
return;
--
1.8.3.1
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[Mesa-dev] [PATCH 5/7] winsys/radeon: fix a race condition between 2 calls to radeon_winsys_create
From: Marek Olšák marek.ol...@amd.com
This fixes random crashes of: piglit/glx-multithread-shader-compile.
---
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index a248054..ebf7697 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -46,6 +46,7 @@
#include unistd.h
static struct util_hash_table *fd_tab = NULL;
+pipe_static_mutex(fd_tab_mutex);
/* Enable/disable feature access for one command stream.
* If enable == TRUE, return TRUE on success.
@@ -391,6 +392,12 @@ static void radeon_winsys_destroy(struct radeon_winsys
*rws)
{
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
+pipe_mutex_lock(fd_tab_mutex);
+if (fd_tab) {
+util_hash_table_remove(fd_tab, intptr_to_pointer(ws-fd));
+}
+pipe_mutex_unlock(fd_tab_mutex);
+
if (ws-thread) {
ws-kill_thread = 1;
pipe_semaphore_signal(ws-cs_queued);
@@ -407,9 +414,6 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
if (ws-gen = DRV_R600) {
radeon_surface_manager_free(ws-surf_man);
}
-if (fd_tab) {
-util_hash_table_remove(fd_tab, intptr_to_pointer(ws-fd));
-}
FREE(rws);
}
@@ -573,20 +577,24 @@ PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int
fd)
{
struct radeon_drm_winsys *ws;
+pipe_mutex_lock(fd_tab_mutex);
if (!fd_tab) {
fd_tab = util_hash_table_create(hash_fd, compare_fd);
}
ws = util_hash_table_get(fd_tab, intptr_to_pointer(fd));
if (ws) {
+pipe_mutex_unlock(fd_tab_mutex);
pipe_reference(NULL, ws-base.reference);
return ws-base;
}
ws = CALLOC_STRUCT(radeon_drm_winsys);
if (!ws) {
+pipe_mutex_unlock(fd_tab_mutex);
return NULL;
}
+
ws-fd = fd;
util_hash_table_set(fd_tab, intptr_to_pointer(fd), ws);
@@ -630,9 +638,15 @@ PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int
fd)
if (ws-num_cpus 1 debug_get_option_thread())
ws-thread = pipe_thread_create(radeon_drm_cs_emit_ioctl, ws);
+/* We must unlock the mutex once the winsys is fully initialized, so that
+ * other threads attempting to create the winsys from the same fd will
+ * get a fully initialized winsys and not just half-way initialized. */
+pipe_mutex_unlock(fd_tab_mutex);
+
return ws-base;
fail:
+pipe_mutex_unlock(fd_tab_mutex);
if (ws-cman)
ws-cman-destroy(ws-cman);
if (ws-kman)
--
1.8.3.2
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[Mesa-dev] [PATCH 2/7] winsys/radeon: remove definitions already present in radeon_drm.h
From: Marek Olšák marek.ol...@amd.com
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 75 ++-
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 35 ---
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 70 -
src/gallium/winsys/radeon/tools/radeon_ctx.h | 30 -
4 files changed, 5 insertions(+), 205 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 95c2053..e593af2 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -43,73 +43,8 @@
#include fcntl.h
#include stdio.h
-/*
- * this are copy from radeon_drm, once an updated libdrm is released
- * we should bump configure.ac requirement for it and remove the following
- * field
- */
-#define RADEON_BO_FLAGS_MACRO_TILE 1
-#define RADEON_BO_FLAGS_MICRO_TILE 2
-#define RADEON_BO_FLAGS_MICRO_TILE_SQUARE 0x20
-
-#ifndef DRM_RADEON_GEM_WAIT
-#define DRM_RADEON_GEM_WAIT 0x2b
-
-#define RADEON_GEM_NO_WAIT 0x1
-#define RADEON_GEM_USAGE_READ 0x2
-#define RADEON_GEM_USAGE_WRITE 0x4
-
-struct drm_radeon_gem_wait {
-uint32_thandle;
-uint32_tflags; /* one of RADEON_GEM_* */
-};
-
-#endif
-
-#ifndef RADEON_VA_MAP
-
-#define RADEON_VA_MAP 1
-#define RADEON_VA_UNMAP 2
-
-#define RADEON_VA_RESULT_OK 0
-#define RADEON_VA_RESULT_ERROR 1
-#define RADEON_VA_RESULT_VA_EXIST 2
-
-#define RADEON_VM_PAGE_VALID(1 0)
-#define RADEON_VM_PAGE_READABLE (1 1)
-#define RADEON_VM_PAGE_WRITEABLE(1 2)
-#define RADEON_VM_PAGE_SYSTEM (1 3)
-#define RADEON_VM_PAGE_SNOOPED (1 4)
-
-struct drm_radeon_gem_va {
-uint32_thandle;
-uint32_toperation;
-uint32_tvm_id;
-uint32_tflags;
-uint64_toffset;
-};
-
-#define DRM_RADEON_GEM_VA 0x2b
-#endif
-
-#ifndef DRM_RADEON_GEM_OP
-#define DRM_RADEON_GEM_OP 0x2c
-
-/* Sets or returns a value associated with a buffer. */
-struct drm_radeon_gem_op {
-uint32_t handle; /* buffer */
-uint32_t op; /* RADEON_GEM_OP_* */
-uint64_t value; /* input or return value */
-};
-
-#define RADEON_GEM_OP_GET_INITIAL_DOMAIN 0
-#define RADEON_GEM_OP_SET_INITIAL_DOMAIN 1
-#endif
-
-
extern const struct pb_vtbl radeon_bo_vtbl;
-
static INLINE struct radeon_bo *radeon_bo(struct pb_buffer *bo)
{
assert(bo-vtbl == radeon_bo_vtbl);
@@ -777,12 +712,12 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
*microtiled = RADEON_LAYOUT_LINEAR;
*macrotiled = RADEON_LAYOUT_LINEAR;
-if (args.tiling_flags RADEON_BO_FLAGS_MICRO_TILE)
+if (args.tiling_flags RADEON_TILING_MICRO)
*microtiled = RADEON_LAYOUT_TILED;
else if (args.tiling_flags RADEON_TILING_MICRO_SQUARE)
*microtiled = RADEON_LAYOUT_SQUARETILED;
-if (args.tiling_flags RADEON_BO_FLAGS_MACRO_TILE)
+if (args.tiling_flags RADEON_TILING_MACRO)
*macrotiled = RADEON_LAYOUT_TILED;
if (bankw tile_split stencil_tile_split mtilea tile_split) {
*bankw = (args.tiling_flags RADEON_TILING_EG_BANKW_SHIFT)
RADEON_TILING_EG_BANKW_MASK;
@@ -824,12 +759,12 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf,
}
if (microtiled == RADEON_LAYOUT_TILED)
-args.tiling_flags |= RADEON_BO_FLAGS_MICRO_TILE;
+args.tiling_flags |= RADEON_TILING_MICRO;
else if (microtiled == RADEON_LAYOUT_SQUARETILED)
-args.tiling_flags |= RADEON_BO_FLAGS_MICRO_TILE_SQUARE;
+args.tiling_flags |= RADEON_TILING_MICRO_SQUARE;
if (macrotiled == RADEON_LAYOUT_TILED)
-args.tiling_flags |= RADEON_BO_FLAGS_MACRO_TILE;
+args.tiling_flags |= RADEON_TILING_MACRO;
args.tiling_flags |= (bankw RADEON_TILING_EG_BANKW_MASK)
RADEON_TILING_EG_BANKW_SHIFT;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index abc8b99..db9fbfa 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -72,41 +72,6 @@
#include stdint.h
#include xf86drm.h
-/*
- * this are copy from radeon_drm, once an updated libdrm is released
- * we should bump configure.ac requirement for it and remove the following
- * field
- */
-#ifndef RADEON_CHUNK_ID_FLAGS
-#define RADEON_CHUNK_ID_FLAGS 0x03
-
-/* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */
-#define RADEON_CS_KEEP_TILING_FLAGS 0x01
-#endif
-
-#ifndef RADEON_CS_USE_VM
-#define RADEON_CS_USE_VM0x02
-/* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring
type */
-#define RADEON_CS_RING_GFX 0
-#define RADEON_CS_RING_COMPUTE 1
-#endif
-
-#ifndef RADEON_CS_RING_DMA
-#define RADEON_CS_RING_DMA 2
-#endif
-
-#ifndef RADEON_CS_RING_UVD
-#define RADEON_CS_RING_UVD 3
-#endif
-
-#ifndef
[Mesa-dev] [PATCH 4/7] winsys/radeon: remove unused radeon_info variables, move backend_map
From: Marek Olšák marek.ol...@amd.com
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 6 --
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 1 +
src/gallium/winsys/radeon/drm/radeon_winsys.h | 7 +++
4 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 34f26bb..e666893 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -654,7 +654,7 @@ struct pb_manager *radeon_bomgr_create(struct
radeon_drm_winsys *rws)
pipe_mutex_init(mgr-bo_va_mutex);
mgr-va = rws-info.r600_virtual_address;
-mgr-va_offset = rws-info.r600_va_start;
+mgr-va_offset = rws-va_start;
list_inithead(mgr-va_holes);
return mgr-base;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 0f64af5..a248054 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -354,12 +354,14 @@ static boolean do_winsys_init(struct radeon_drm_winsys
*ws)
ws-info.r600_virtual_address = FALSE;
if (ws-info.drm_minor = 13) {
+uint32_t ib_vm_max_size;
+
ws-info.r600_virtual_address = TRUE;
if (!radeon_get_drm_value(ws-fd, RADEON_INFO_VA_START, NULL,
- ws-info.r600_va_start))
+ ws-va_start))
ws-info.r600_virtual_address = FALSE;
if (!radeon_get_drm_value(ws-fd, RADEON_INFO_IB_VM_MAX_SIZE, NULL,
- ws-info.r600_ib_vm_max_size))
+ ib_vm_max_size))
ws-info.r600_virtual_address = FALSE;
}
if (ws-gen == DRV_R600 !debug_get_bool_option(RADEON_VA, FALSE))
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
index a10b890..1aa9cf4 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
@@ -53,6 +53,7 @@ struct radeon_drm_winsys {
enum radeon_generation gen;
struct radeon_info info;
+uint32_t va_start;
struct pb_manager *kman;
struct pb_manager *cman;
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h
b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index c5fec68..eeae724 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -211,14 +211,13 @@ struct radeon_info {
uint32_tr600_clock_crystal_freq;
uint32_tr600_tiling_config;
uint32_tr600_num_tile_pipes;
-uint32_tr600_backend_map;
-uint32_tr600_va_start;
-uint32_tr600_ib_vm_max_size;
uint32_tr600_max_pipes;
-boolean r600_backend_map_valid;
boolean r600_virtual_address;
boolean r600_has_dma;
+uint32_tr600_backend_map;
+boolean r600_backend_map_valid;
+
boolean si_tile_mode_array_valid;
uint32_tsi_tile_mode_array[32];
--
1.8.3.2
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[Mesa-dev] [PATCH 3/7] winsys/radeon: unify radeon_bo::flink and radeon_bo::name
From: Marek Olšák marek.ol...@amd.com
Both contained the GEM flink name.
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 19 +--
src/gallium/winsys/radeon/drm/radeon_drm_bo.h | 5 +
2 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index e593af2..34f26bb 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -317,9 +317,9 @@ static void radeon_bo_destroy(struct pb_buffer *_buf)
pipe_mutex_lock(bo-mgr-bo_handles_mutex);
util_hash_table_remove(bo-mgr-bo_handles, (void*)(uintptr_t)bo-handle);
-if (bo-name) {
+if (bo-flink_name) {
util_hash_table_remove(bo-mgr-bo_names,
- (void*)(uintptr_t)bo-name);
+ (void*)(uintptr_t)bo-flink_name);
}
pipe_mutex_unlock(bo-mgr-bo_handles_mutex);
@@ -893,7 +893,7 @@ static struct pb_buffer
*radeon_winsys_bo_from_handle(struct radeon_winsys *rws,
}
handle = open_arg.handle;
size = open_arg.size;
-bo-name = whandle-handle;
+bo-flink_name = whandle-handle;
} else if (whandle-type == DRM_API_HANDLE_TYPE_FD) {
size = lseek(whandle-handle, 0, SEEK_END);
/*
@@ -920,8 +920,8 @@ static struct pb_buffer
*radeon_winsys_bo_from_handle(struct radeon_winsys *rws,
bo-va = 0;
pipe_mutex_init(bo-map_mutex);
-if (bo-name)
-util_hash_table_set(mgr-bo_names, (void*)(uintptr_t)bo-name, bo);
+if (bo-flink_name)
+util_hash_table_set(mgr-bo_names, (void*)(uintptr_t)bo-flink_name,
bo);
util_hash_table_set(mgr-bo_handles, (void*)(uintptr_t)bo-handle, bo);
@@ -989,21 +989,20 @@ static boolean radeon_winsys_bo_get_handle(struct
pb_buffer *buffer,
memset(flink, 0, sizeof(flink));
if (whandle-type == DRM_API_HANDLE_TYPE_SHARED) {
-if (!bo-flinked) {
+if (!bo-flink_name) {
flink.handle = bo-handle;
if (ioctl(bo-rws-fd, DRM_IOCTL_GEM_FLINK, flink)) {
return FALSE;
}
-bo-flinked = TRUE;
-bo-flink = flink.name;
+bo-flink_name = flink.name;
pipe_mutex_lock(bo-mgr-bo_handles_mutex);
-util_hash_table_set(bo-mgr-bo_names,
(void*)(uintptr_t)bo-flink, bo);
+util_hash_table_set(bo-mgr-bo_names,
(void*)(uintptr_t)bo-flink_name, bo);
pipe_mutex_unlock(bo-mgr-bo_handles_mutex);
}
-whandle-handle = bo-flink;
+whandle-handle = bo-flink_name;
} else if (whandle-type == DRM_API_HANDLE_TYPE_KMS) {
whandle-handle = bo-handle;
} else if (whandle-type == DRM_API_HANDLE_TYPE_FD) {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
index 5536bc1..f5b122f 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
@@ -54,7 +54,7 @@ struct radeon_bo {
pipe_mutex map_mutex;
uint32_t handle;
-uint32_t name;
+uint32_t flink_name;
uint64_t va;
enum radeon_bo_domain initial_domain;
@@ -64,9 +64,6 @@ struct radeon_bo {
/* how many command streams, which are being emitted in a separate
* thread, is this bo referenced in? */
int num_active_ioctls;
-
-boolean flinked;
-uint32_t flink;
};
struct pb_manager *radeon_bomgr_create(struct radeon_drm_winsys *rws);
--
1.8.3.2
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[Mesa-dev] [PATCH 6/7] winsys/radeon: fix a race condition between winsys_create and winsys_destroy
From: Marek Olšák marek.ol...@amd.com
This also hides the reference count from drivers.
---
src/gallium/drivers/r300/r300_screen.c| 2 +-
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.c| 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 30 +--
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 1 +
src/gallium/winsys/radeon/drm/radeon_winsys.h | 20 ++-
6 files changed, 33 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/r300/r300_screen.c
b/src/gallium/drivers/r300/r300_screen.c
index 70c9cdf..8e601e3 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -552,7 +552,7 @@ static void r300_destroy_screen(struct pipe_screen* pscreen)
struct r300_screen* r300screen = r300_screen(pscreen);
struct radeon_winsys *rws = radeon_winsys(pscreen);
-if (rws !radeon_winsys_unref(rws))
+if (rws !rws-unref(rws))
return;
pipe_mutex_destroy(r300screen-cmask_mutex);
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 8d69358..18fde74 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -514,7 +514,7 @@ static void r600_destroy_screen(struct pipe_screen* pscreen)
if (rscreen == NULL)
return;
- if (!radeon_winsys_unref(rscreen-b.ws))
+ if (!rscreen-b.ws-unref(rscreen-b.ws))
return;
if (rscreen-global_pool) {
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 09ec603..7dac287 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -424,7 +424,7 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
if (sscreen == NULL)
return;
- if (!radeon_winsys_unref(sscreen-b.ws))
+ if (!sscreen-b.ws-unref(sscreen-b.ws))
return;
r600_destroy_common_screen(sscreen-b);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index ebf7697..b968bd6 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -392,12 +392,6 @@ static void radeon_winsys_destroy(struct radeon_winsys
*rws)
{
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
-pipe_mutex_lock(fd_tab_mutex);
-if (fd_tab) {
-util_hash_table_remove(fd_tab, intptr_to_pointer(ws-fd));
-}
-pipe_mutex_unlock(fd_tab_mutex);
-
if (ws-thread) {
ws-kill_thread = 1;
pipe_semaphore_signal(ws-cs_queued);
@@ -573,6 +567,25 @@ static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param)
DEBUG_GET_ONCE_BOOL_OPTION(thread, RADEON_THREAD, TRUE)
static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param);
+static bool radeon_winsys_unref(struct radeon_winsys *ws)
+{
+struct radeon_drm_winsys *rws = (struct radeon_drm_winsys*)ws;
+bool destroy;
+
+/* When the reference counter drops to zero, remove the fd from the table.
+ * This must happen while the mutex is locked, so that
+ * radeon_drm_winsys_create in another thread doesn't get the winsys
+ * from the table when the counter drops to 0. */
+pipe_mutex_lock(fd_tab_mutex);
+
+destroy = pipe_reference(rws-reference, NULL);
+if (destroy fd_tab)
+util_hash_table_remove(fd_tab, intptr_to_pointer(rws-fd));
+
+pipe_mutex_unlock(fd_tab_mutex);
+return destroy;
+}
+
PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int fd)
{
struct radeon_drm_winsys *ws;
@@ -585,7 +598,7 @@ PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int
fd)
ws = util_hash_table_get(fd_tab, intptr_to_pointer(fd));
if (ws) {
pipe_mutex_unlock(fd_tab_mutex);
-pipe_reference(NULL, ws-base.reference);
+pipe_reference(NULL, ws-reference);
return ws-base;
}
@@ -616,9 +629,10 @@ PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int
fd)
}
/* init reference */
-pipe_reference_init(ws-base.reference, 1);
+pipe_reference_init(ws-reference, 1);
/* Set functions. */
+ws-base.unref = radeon_winsys_unref;
ws-base.destroy = radeon_winsys_destroy;
ws-base.query_info = radeon_query_info;
ws-base.cs_request_feature = radeon_cs_request_feature;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
index 1aa9cf4..18fe0ae 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
@@ -43,6 +43,7 @@ enum radeon_generation {
struct radeon_drm_winsys {
struct radeon_winsys base;
+struct pipe_reference reference;
int fd; /* DRM file descriptor */
int num_cs; /* The number of command
[Mesa-dev] [PATCH 1/7] winsys/radeon: handle squared micro tiling from GEM_GET_TILING
From: Marek Olšák marek.ol...@amd.com --- src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 3dfa525..95c2053 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -779,6 +779,8 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf, *macrotiled = RADEON_LAYOUT_LINEAR; if (args.tiling_flags RADEON_BO_FLAGS_MICRO_TILE) *microtiled = RADEON_LAYOUT_TILED; +else if (args.tiling_flags RADEON_TILING_MICRO_SQUARE) +*microtiled = RADEON_LAYOUT_SQUARETILED; if (args.tiling_flags RADEON_BO_FLAGS_MACRO_TILE) *macrotiled = RADEON_LAYOUT_TILED; -- 1.8.3.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 7/7] winsys/radeon: fix a race condition in initialization of radeon_winsys::screen
From: Marek Olšák marek.ol...@amd.com
Create the screen in the winsys while the mutex is locked.
This also results in a nice code cleanup!
---
src/gallium/targets/egl-static/egl_pipe.c | 42 ---
src/gallium/targets/pipe-loader/pipe_r300.c | 14 ++--
src/gallium/targets/pipe-loader/pipe_r600.c | 14 ++--
src/gallium/targets/pipe-loader/pipe_radeonsi.c | 14 ++--
src/gallium/targets/r300/common/drm_target.c | 15 ++--
src/gallium/targets/r600/common/drm_target.c | 15 ++--
src/gallium/targets/radeonsi/common/drm_target.c | 15 ++--
src/gallium/winsys/radeon/drm/radeon_drm_public.h | 6 +++-
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 18 --
9 files changed, 39 insertions(+), 114 deletions(-)
diff --git a/src/gallium/targets/egl-static/egl_pipe.c
b/src/gallium/targets/egl-static/egl_pipe.c
index eb1cff9..ce734fb 100644
--- a/src/gallium/targets/egl-static/egl_pipe.c
+++ b/src/gallium/targets/egl-static/egl_pipe.c
@@ -119,19 +119,9 @@ pipe_r300_create_screen(int fd)
{
#if _EGL_PIPE_R300
struct radeon_winsys *sws;
- struct pipe_screen *screen;
-
- sws = radeon_drm_winsys_create(fd);
- if (!sws)
- return NULL;
-
- screen = r300_screen_create(sws);
- if (!screen)
- return NULL;
- screen = debug_screen_wrap(screen);
-
- return screen;
+ sws = radeon_drm_winsys_create(fd, r300_screen_create);
+ return sws ? debug_screen_wrap(sws-screen) : NULL;
#else
return NULL;
#endif
@@ -142,19 +132,9 @@ pipe_r600_create_screen(int fd)
{
#if _EGL_PIPE_R600
struct radeon_winsys *rw;
- struct pipe_screen *screen;
-
- rw = radeon_drm_winsys_create(fd);
- if (!rw)
- return NULL;
-
- screen = r600_screen_create(rw);
- if (!screen)
- return NULL;
-
- screen = debug_screen_wrap(screen);
- return screen;
+ rw = radeon_drm_winsys_create(fd, r600_screen_create);
+ return rw ? debug_screen_wrap(rw-screen) : NULL;
#else
return NULL;
#endif
@@ -165,19 +145,9 @@ pipe_radeonsi_create_screen(int fd)
{
#if _EGL_PIPE_RADEONSI
struct radeon_winsys *rw;
- struct pipe_screen *screen;
-
- rw = radeon_drm_winsys_create(fd);
- if (!rw)
- return NULL;
-
- screen = radeonsi_screen_create(rw);
- if (!screen)
- return NULL;
- screen = debug_screen_wrap(screen);
-
- return screen;
+ rw = radeon_drm_winsys_create(fd, radeonsi_screen_create);
+ return rw ? debug_screen_wrap(rw-screen) : NULL;
#else
return NULL;
#endif
diff --git a/src/gallium/targets/pipe-loader/pipe_r300.c
b/src/gallium/targets/pipe-loader/pipe_r300.c
index 0556859..388b091 100644
--- a/src/gallium/targets/pipe-loader/pipe_r300.c
+++ b/src/gallium/targets/pipe-loader/pipe_r300.c
@@ -8,19 +8,9 @@ static struct pipe_screen *
create_screen(int fd)
{
struct radeon_winsys *sws;
- struct pipe_screen *screen;
- sws = radeon_drm_winsys_create(fd);
- if (!sws)
- return NULL;
-
- screen = r300_screen_create(sws);
- if (!screen)
- return NULL;
-
- screen = debug_screen_wrap(screen);
-
- return screen;
+ sws = radeon_drm_winsys_create(fd, r300_screen_create);
+ return sws ? debug_screen_wrap(sws-screen) : NULL;
}
PUBLIC
diff --git a/src/gallium/targets/pipe-loader/pipe_r600.c
b/src/gallium/targets/pipe-loader/pipe_r600.c
index 5d89aca..0c59087 100644
--- a/src/gallium/targets/pipe-loader/pipe_r600.c
+++ b/src/gallium/targets/pipe-loader/pipe_r600.c
@@ -7,19 +7,9 @@ static struct pipe_screen *
create_screen(int fd)
{
struct radeon_winsys *rw;
- struct pipe_screen *screen;
- rw = radeon_drm_winsys_create(fd);
- if (!rw)
- return NULL;
-
- screen = r600_screen_create(rw);
- if (!screen)
- return NULL;
-
- screen = debug_screen_wrap(screen);
-
- return screen;
+ rw = radeon_drm_winsys_create(fd, r600_screen_create);
+ return rw ? debug_screen_wrap(rw-screen) : NULL;
}
PUBLIC
diff --git a/src/gallium/targets/pipe-loader/pipe_radeonsi.c
b/src/gallium/targets/pipe-loader/pipe_radeonsi.c
index 48b2b5d..406ba1e 100644
--- a/src/gallium/targets/pipe-loader/pipe_radeonsi.c
+++ b/src/gallium/targets/pipe-loader/pipe_radeonsi.c
@@ -7,19 +7,9 @@ static struct pipe_screen *
create_screen(int fd)
{
struct radeon_winsys *rw;
- struct pipe_screen *screen;
- rw = radeon_drm_winsys_create(fd);
- if (!rw)
- return NULL;
-
- screen = radeonsi_screen_create(rw);
- if (!screen)
- return NULL;
-
- screen = debug_screen_wrap(screen);
-
- return screen;
+ rw = radeon_drm_winsys_create(fd, radeonsi_screen_create);
+ return rw ? debug_screen_wrap(rw-screen) : NULL;
}
PUBLIC
diff --git a/src/gallium/targets/r300/common/drm_target.c
b/src/gallium/targets/r300/common/drm_target.c
index 9b48446..dff83da 100644
--- a/src/gallium/targets/r300/common/drm_target.c
+++ b/src/gallium/targets/r300/common/drm_target.c
@@ -36,19 +36,8 @@ create_screen(int fd)
{
struct radeon_winsys *sws;
- sws
[Mesa-dev] [PATCH 6/7] winsys/radeon: fix a race condition between winsys_create and winsys_destroy
From: Marek Olšák marek.ol...@amd.com
This also hides the reference count from drivers.
v2: update the reference count while the mutex is locked in winsys_create
---
src/gallium/drivers/r300/r300_screen.c| 2 +-
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.c| 2 +-
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 30 +--
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 1 +
src/gallium/winsys/radeon/drm/radeon_winsys.h | 20 ++-
6 files changed, 33 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/r300/r300_screen.c
b/src/gallium/drivers/r300/r300_screen.c
index 70c9cdf..8e601e3 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -552,7 +552,7 @@ static void r300_destroy_screen(struct pipe_screen* pscreen)
struct r300_screen* r300screen = r300_screen(pscreen);
struct radeon_winsys *rws = radeon_winsys(pscreen);
-if (rws !radeon_winsys_unref(rws))
+if (rws !rws-unref(rws))
return;
pipe_mutex_destroy(r300screen-cmask_mutex);
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 8d69358..18fde74 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -514,7 +514,7 @@ static void r600_destroy_screen(struct pipe_screen* pscreen)
if (rscreen == NULL)
return;
- if (!radeon_winsys_unref(rscreen-b.ws))
+ if (!rscreen-b.ws-unref(rscreen-b.ws))
return;
if (rscreen-global_pool) {
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 09ec603..7dac287 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -424,7 +424,7 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
if (sscreen == NULL)
return;
- if (!radeon_winsys_unref(sscreen-b.ws))
+ if (!sscreen-b.ws-unref(sscreen-b.ws))
return;
r600_destroy_common_screen(sscreen-b);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index ebf7697..07b3c05 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -392,12 +392,6 @@ static void radeon_winsys_destroy(struct radeon_winsys
*rws)
{
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
-pipe_mutex_lock(fd_tab_mutex);
-if (fd_tab) {
-util_hash_table_remove(fd_tab, intptr_to_pointer(ws-fd));
-}
-pipe_mutex_unlock(fd_tab_mutex);
-
if (ws-thread) {
ws-kill_thread = 1;
pipe_semaphore_signal(ws-cs_queued);
@@ -573,6 +567,25 @@ static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param)
DEBUG_GET_ONCE_BOOL_OPTION(thread, RADEON_THREAD, TRUE)
static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param);
+static bool radeon_winsys_unref(struct radeon_winsys *ws)
+{
+struct radeon_drm_winsys *rws = (struct radeon_drm_winsys*)ws;
+bool destroy;
+
+/* When the reference counter drops to zero, remove the fd from the table.
+ * This must happen while the mutex is locked, so that
+ * radeon_drm_winsys_create in another thread doesn't get the winsys
+ * from the table when the counter drops to 0. */
+pipe_mutex_lock(fd_tab_mutex);
+
+destroy = pipe_reference(rws-reference, NULL);
+if (destroy fd_tab)
+util_hash_table_remove(fd_tab, intptr_to_pointer(rws-fd));
+
+pipe_mutex_unlock(fd_tab_mutex);
+return destroy;
+}
+
PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int fd)
{
struct radeon_drm_winsys *ws;
@@ -584,8 +597,8 @@ PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int
fd)
ws = util_hash_table_get(fd_tab, intptr_to_pointer(fd));
if (ws) {
+pipe_reference(NULL, ws-reference);
pipe_mutex_unlock(fd_tab_mutex);
-pipe_reference(NULL, ws-base.reference);
return ws-base;
}
@@ -616,9 +629,10 @@ PUBLIC struct radeon_winsys *radeon_drm_winsys_create(int
fd)
}
/* init reference */
-pipe_reference_init(ws-base.reference, 1);
+pipe_reference_init(ws-reference, 1);
/* Set functions. */
+ws-base.unref = radeon_winsys_unref;
ws-base.destroy = radeon_winsys_destroy;
ws-base.query_info = radeon_query_info;
ws-base.cs_request_feature = radeon_cs_request_feature;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
index 1aa9cf4..18fe0ae 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
@@ -43,6 +43,7 @@ enum radeon_generation {
struct radeon_drm_winsys {
struct radeon_winsys base;
+struct pipe_reference reference;
[Mesa-dev] [PATCH] glsl: Try vectorizing when seeing a repeated assignment to a channel.
When considering assignment expressions like:
v.x += u.x;
v.x += u.x;
the vectorizer would incorrectly keep going, attempting to find more
instructions to vectorize. It would overwrite the saved assignment
to point at the second one, and increment channels a second time,
resulting in try_vectorize thinking the expression was a vec2 instead of
a float.
Instead, if we see a repeated assignment to a channel, just try to
vectorize everything we've found so far. This clears the saved state
so it will start over.
Fixes Piglit's repeated-channel-assignments.vert.
Cc: Matt Turner matts...@gmail.com
Cc: 10.1 mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/opt_vectorize.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/opt_vectorize.cpp b/src/glsl/opt_vectorize.cpp
index 3306397..f9a3b61 100644
--- a/src/glsl/opt_vectorize.cpp
+++ b/src/glsl/opt_vectorize.cpp
@@ -260,6 +260,7 @@ ir_vectorize_visitor::visit_enter(ir_assignment *ir)
if (ir-condition ||
this-channels = 4 ||
!single_channel_write_mask(ir-write_mask) ||
+ this-assignment[write_mask_to_swizzle(ir-write_mask)] != NULL ||
(lhs !ir-lhs-equals(lhs)) ||
(rhs !ir-rhs-equals(rhs, ir_type_swizzle))) {
try_vectorize();
--
1.9.1
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Re: [Mesa-dev] [PATCH] glsl: Try vectorizing when seeing a repeated assignment to a channel.
On Tue, Apr 8, 2014 at 5:40 PM, Kenneth Graunke kenn...@whitecape.org wrote: When considering assignment expressions like: v.x += u.x; v.x += u.x; the vectorizer would incorrectly keep going, attempting to find more instructions to vectorize. It would overwrite the saved assignment to point at the second one, and increment channels a second time, resulting in try_vectorize thinking the expression was a vec2 instead of a float. Instead, if we see a repeated assignment to a channel, just try to vectorize everything we've found so far. This clears the saved state so it will start over. Fixes Piglit's repeated-channel-assignments.vert. Cc: Matt Turner matts...@gmail.com Reviewed-by: Matt Turner matts...@gmail.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 7/7] winsys/radeon: fix a race condition in initialization of radeon_winsys::screen
On Mit, 2014-04-09 at 02:15 +0200, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
Create the screen in the winsys while the mutex is locked.
This also results in a nice code cleanup!
[...]
diff --git a/src/gallium/targets/egl-static/egl_pipe.c
b/src/gallium/targets/egl-static/egl_pipe.c
index eb1cff9..ce734fb 100644
--- a/src/gallium/targets/egl-static/egl_pipe.c
+++ b/src/gallium/targets/egl-static/egl_pipe.c
@@ -119,19 +119,9 @@ pipe_r300_create_screen(int fd)
{
#if _EGL_PIPE_R300
struct radeon_winsys *sws;
- struct pipe_screen *screen;
-
- sws = radeon_drm_winsys_create(fd);
- if (!sws)
- return NULL;
-
- screen = r300_screen_create(sws);
- if (!screen)
- return NULL;
- screen = debug_screen_wrap(screen);
-
- return screen;
+ sws = radeon_drm_winsys_create(fd, r300_screen_create);
+ return sws ? debug_screen_wrap(sws-screen) : NULL;
I think it would be clearer to keep this as:
sws = radeon_drm_winsys_create(fd, r300_screen_create);
if (!sws)
return NULL;
return debug_screen_wrap(sws-screen);
Either way though, the series is
Reviewed-by: Michel Dänzer michel.daen...@amd.com
--
Earthling Michel Dänzer| http://www.amd.com
Libre software enthusiast |Mesa and X developer
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[Mesa-dev] [PATCH 4/6] glsl: Pass gl_shader_compiler_optimizations to unroll_loops().
Loop unrolling will need to know a few more options in the future.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/glsl_parser_extras.cpp | 2 +-
src/glsl/loop_analysis.h| 3 ++-
src/glsl/loop_unroll.cpp| 20 +---
3 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index 1fcd5f8..03c2a97 100644
--- a/src/glsl/glsl_parser_extras.cpp
+++ b/src/glsl/glsl_parser_extras.cpp
@@ -1542,7 +1542,7 @@ do_common_optimization(exec_list *ir, bool linked,
loop_state *ls = analyze_loop_variables(ir);
if (ls-loop_found) {
progress = set_loop_controls(ir, ls) || progress;
- progress = unroll_loops(ir, ls, options-MaxUnrollIterations) ||
progress;
+ progress = unroll_loops(ir, ls, options) || progress;
}
delete ls;
diff --git a/src/glsl/loop_analysis.h b/src/glsl/loop_analysis.h
index f841042..295dc79 100644
--- a/src/glsl/loop_analysis.h
+++ b/src/glsl/loop_analysis.h
@@ -53,7 +53,8 @@ set_loop_controls(exec_list *instructions, loop_state *ls);
extern bool
-unroll_loops(exec_list *instructions, loop_state *ls, unsigned max_iterations);
+unroll_loops(exec_list *instructions, loop_state *ls,
+ const struct gl_shader_compiler_options *options);
ir_rvalue *
find_initial_value(ir_loop *loop, ir_variable *var);
diff --git a/src/glsl/loop_unroll.cpp b/src/glsl/loop_unroll.cpp
index 789655e..11680b3 100644
--- a/src/glsl/loop_unroll.cpp
+++ b/src/glsl/loop_unroll.cpp
@@ -25,15 +25,18 @@
#include loop_analysis.h
#include ir_hierarchical_visitor.h
+#include main/mtypes.h
+
namespace {
class loop_unroll_visitor : public ir_hierarchical_visitor {
public:
- loop_unroll_visitor(loop_state *state, unsigned max_iterations)
+ loop_unroll_visitor(loop_state *state,
+ const struct gl_shader_compiler_options *options)
{
this-state = state;
this-progress = false;
- this-max_iterations = max_iterations;
+ this-options = options;
}
virtual ir_visitor_status visit_leave(ir_loop *ir);
@@ -45,7 +48,7 @@ public:
loop_state *state;
bool progress;
- unsigned max_iterations;
+ const struct gl_shader_compiler_options *options;
};
} /* anonymous namespace */
@@ -244,16 +247,18 @@ loop_unroll_visitor::visit_leave(ir_loop *ir)
iterations = ls-limiting_terminator-iterations;
+ const int max_iterations = options-MaxUnrollIterations;
+
/* Don't try to unroll loops that have zillions of iterations either.
*/
- if (iterations (int) max_iterations)
+ if (iterations max_iterations)
return visit_continue;
/* Don't try to unroll nested loops and loops with a huge body.
*/
loop_unroll_count count(ir-body_instructions);
- if (count.fail || count.nodes * iterations (int)max_iterations * 5)
+ if (count.fail || count.nodes * iterations max_iterations * 5)
return visit_continue;
/* Note: the limiting terminator contributes 1 to ls-num_loop_jumps.
@@ -338,9 +343,10 @@ loop_unroll_visitor::visit_leave(ir_loop *ir)
bool
-unroll_loops(exec_list *instructions, loop_state *ls, unsigned max_iterations)
+unroll_loops(exec_list *instructions, loop_state *ls,
+ const struct gl_shader_compiler_options *options)
{
- loop_unroll_visitor v(ls, max_iterations);
+ loop_unroll_visitor v(ls, options);
v.run(instructions);
--
1.9.1
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