On Tue, Mar 17, 2015 at 2:22 AM, Kenneth Graunke kenn...@whitecape.org wrote:
On Monday, March 16, 2015 10:21:31 PM Kristian Høgsberg wrote:
On Wed, Mar 11, 2015 at 11:53 AM, Jordan Justen
jordan.l.jus...@intel.com wrote:
When uploading state for a pipeline, we will save changed state for
https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #6 from Dan Sebald daniel.seb...@ieee.org ---
Correct. -1 xfactor 1, excluding 0.
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https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #7 from Dan Sebald daniel.seb...@ieee.org ---
Oh, and attempting to load suitable driver first is fair.
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https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #8 from Ilia Mirkin imir...@alum.mit.edu ---
(In reply to Dan Sebald from comment #0)
So, what is the problem here? Is it that not all systems are ensured to
have non-paged memory, and my system just happens to have it? Can this
I did this for SNB+ only because we did have some shader-db
regressions. However, with the patch 8.5 I just sent out, we're down
to about +0.2% on ILK-. Arguably, that's probably close enough for
the old platforms especially if it lets us move forward.
The majority of hurt shaders there are
FS instructions with NIR on i965:
total instructions in shared programs: 2663561 - 2619051 (-1.67%)
instructions in affected programs: 1612965 - 1568455 (-2.76%)
helped:5455
HURT: 12
FS instructions with NIR on g4x:
total
On Sat, Mar 14, 2015 at 9:54 PM, Jordan Justen
jordan.l.jus...@intel.com wrote:
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 6 ++
src/mesa/drivers/dri/i965/brw_cs.cpp | 26 ++
For both patches:
Reviewed-by: Fredrik Höglund fred...@kde.org
On Tuesday 17 March 2015, Laura Ekstrand wrote:
v3: Review from Fredrik Hoglund
-Split cosmetic refactor of GetBufferPointerv out into a separate commit
---
src/mesa/main/bufferobj.c | 9 +
1 file changed, 5
https://bugs.freedesktop.org/show_bug.cgi?id=88806
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Status|NEEDINFO|NEW
--- Comment #7
On 03/17/2015 12:30 AM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:37 AM, Tapani Pälli tapani.pa...@intel.com wrote:
Use program_resource_location to fetch location.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/shader_query.cpp | 33
https://bugs.freedesktop.org/show_bug.cgi?id=89586
--- Comment #10 from Dan Sebald daniel.seb...@ieee.org ---
OK, src/mesa/state_tracker/st_cb_drawpixels.c is it, thanks. Saved me a lot of
time.
And here's a comment about image size in the code:
/* Limit the size of the glDrawPixels to the
Signed-off-by: Vinson Lee v...@freedesktop.org
---
SConstruct | 66 --
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/SConstruct b/SConstruct
index ef71ab6..f9d3d4c 100644
--- a/SConstruct
+++ b/SConstruct
@@ -1,7 +1,7
On 03/16/2015 07:16 PM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:37 AM, Tapani Pälli tapani.pa...@intel.com wrote:
Patch adds required helper functions to shaderapi.h and
the actual implementation.
Name generation copied from '_mesa_get_uniform_name' which can
be removed later by
https://bugs.freedesktop.org/show_bug.cgi?id=89586
--- Comment #9 from Ilia Mirkin imir...@alum.mit.edu ---
(In reply to Dan Sebald from comment #8)
I cloned the piglit repository and will see if I can write a program. It
shouldn't be difficult once I figure out the source tree organization,
On Sat, Mar 14, 2015 at 9:54 PM, Jordan Justen
jordan.l.jus...@intel.com wrote:
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_cs.cpp | 216
+++
https://bugs.freedesktop.org/show_bug.cgi?id=89586
--- Comment #8 from Dan Sebald daniel.seb...@ieee.org ---
I cloned the piglit repository and will see if I can write a program. It
shouldn't be difficult once I figure out the source tree organization, but it
might take me a couple days.
I see
On Mon, Mar 16, 2015 at 11:20 PM, Kristian Høgsberg k...@bitplanet.net wrote:
On Sat, Mar 14, 2015 at 9:54 PM, Jordan Justen
jordan.l.jus...@intel.com wrote:
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 6 ++
On Tue, Mar 17, 2015 at 11:38 AM, Matt Turner matts...@gmail.com wrote:
On Mon, Mar 16, 2015 at 9:21 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
Because of the way that NIR does conditionals, we get them in any old SSA
value. The actual boolean value used in the select or if is x != 0.
On Tue, Mar 17, 2015 at 10:46 AM, Kenneth Graunke kenn...@whitecape.org wrote:
On Tuesday, March 17, 2015 08:20:23 AM Kristian Høgsberg wrote:
On Tue, Mar 17, 2015 at 2:22 AM, Kenneth Graunke kenn...@whitecape.org
wrote:
On Monday, March 16, 2015 10:21:31 PM Kristian Høgsberg wrote:
On
Hi,
Last year, I participated in GSoC, (yeah, I still read the mailing list
every day :) ) so I will give my 2 cents to the topic.
My background isn't at all related to graphics or computer science, I am
a physicist, although my main interest is in simulation. So that took me
to OpenCL, which in
On Tue, Mar 17, 2015 at 2:15 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Tue, Mar 17, 2015 at 2:09 PM, Matt Turner matts...@gmail.com wrote:
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 8edb4d0..63dedae 100644
---
With the fix Jason mentioned:
Reviewed-by: Chris Forbes chr...@ijw.co.nz
On Wed, Mar 18, 2015 at 10:19 AM, Matt Turner matts...@gmail.com wrote:
On Tue, Mar 17, 2015 at 2:15 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Tue, Mar 17, 2015 at 2:09 PM, Matt Turner matts...@gmail.com wrote:
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization
of the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.h | 4
.../drivers/dri/i965/brw_fs_combine_constants.cpp| 1 +
On Tue, Mar 17, 2015 at 2:09 PM, Matt Turner matts...@gmail.com wrote:
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.h | 4
On 03/16/2015 08:08 PM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:37 AM, Tapani Pälli tapani.pa...@intel.com wrote:
Patch adds required helper functions to shaderapi.h and
the actual implementation.
The added functionality can be tested by tests for following
functions that are refactored
On 03/17/2015 12:38 AM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:38 AM, Tapani Pälli tapani.pa...@intel.com wrote:
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/uniform_query.cpp | 107 ++--
1 file changed, 38 insertions(+), 69
On 03/16/2015 07:08 PM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:37 AM, Tapani Pälli tapani.pa...@intel.com wrote:
Patch adds required helper functions to shaderapi.h and
the actual implementation.
corresponding Piglit test:
arb_program_interface_query-resource-location
The added
On Monday, March 16, 2015 10:21:31 PM Kristian Høgsberg wrote:
On Wed, Mar 11, 2015 at 11:53 AM, Jordan Justen
jordan.l.jus...@intel.com wrote:
When uploading state for a pipeline, we will save changed state for
the other pipelines.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
This is a problem when we have IR like this:
(array_ref (var_ref temps) (swiz x (expression ivec4 bitcast_f2i
(swiz (array_ref (var_ref temps) (constant int (2)) ) )) )) ) )
where we are indexing an array with the result of an expression that
accesses the same array.
In this scenario,
-Original Message-
From: ibmir...@gmail.com [mailto:ibmir...@gmail.com] On Behalf Of Ilia Mirkin
Sent: Tuesday, March 17, 2015 6:48 PM
To: Predut, Marius
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH ] i965/aa: fixing anti-aliasing bug for
thinnest width lines.
On 03/17/2015 11:33 AM, Marek Olšák wrote:
Hi,
The GL 4.5 Core spec is inconsistent. The 11.1.2.1 Output Variables
section says that transform feedback is allowed after a tessellation
control shader if a tessellation evaluation shader isn't present:
Each program object can specify a set
On Tuesday, March 17, 2015 08:20:23 AM Kristian Høgsberg wrote:
On Tue, Mar 17, 2015 at 2:22 AM, Kenneth Graunke kenn...@whitecape.org
wrote:
On Monday, March 16, 2015 10:21:31 PM Kristian Høgsberg wrote:
On Wed, Mar 11, 2015 at 11:53 AM, Jordan Justen
jordan.l.jus...@intel.com wrote:
On 16/03/15 23:44, Ian Romanick wrote:
On 03/13/2015 02:32 PM, Emil Velikov wrote:
* Allow people to static link against libgcc/libstdc++.
Imho this should be option, disabled by default provided at configure
time. This way builders/distributions can op-in if they choose to do so.
I'm
On Tue, Mar 17, 2015 at 10:30 AM, Ian Romanick i...@freedesktop.org wrote:
From: Ian Romanick ian.d.roman...@intel.com
This change should get squashed with the afore mentioned change. Tests
suggested by Matt.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Cc: Matt Turner
On SNB and IVB hw, for 1 pixel line thickness or less, the general
anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of the “thinnest”
(one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized
-- Forwarded message --
From: Laura Ekstrand la...@jlekstrand.net
Date: Thu, Feb 26, 2015 at 3:43 PM
Subject: Re: [Mesa-dev] [PATCH 12/16] main: Added entry point for
glCreateProgramPipelines
To: Martin Peres martin.pe...@linux.intel.com
On Mon, Feb 16, 2015 at 6:14 AM, Martin
AFAIK you can't have TCS without TES. But you can have TES without TCS.
On Tue, Mar 17, 2015 at 2:33 PM, Marek Olšák mar...@gmail.com wrote:
Hi,
The GL 4.5 Core spec is inconsistent. The 11.1.2.1 Output Variables
section says that transform feedback is allowed after a tessellation
control
On 03/17/2015 11:29 AM, Marius Predut wrote:
On SNB and IVB hw, for 1 pixel line thickness or less, the general
anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of the “thinnest”
(one-pixel-wide), non-antialiased lines.
Hi,
The GL 4.5 Core spec is inconsistent. The 11.1.2.1 Output Variables
section says that transform feedback is allowed after a tessellation
control shader if a tessellation evaluation shader isn't present:
Each program object can specify a set of output variables from one
shader to be recorded
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 91a3f65..1ef4602 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
This series contains a variety of fixes for NIR. One of them (by Matt) is
a substantial shader-db fix. Thanks, Matt, for figuring out a much easier
way to do that. A bunch of the rest are to get NIR working on older gens.
With this series, NIR looks good on Jenkins.
Patches 2 and 9 are to the
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 41f9ae2..91a3f65 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
From: Matt Turner matts...@gmail.com
Shader-db results for FS instructions with NIR on HSW:
total instructions in shared programs: 4186747 - 4129871 (-1.36%)
instructions in affected programs: 2438094 - 2381218 (-2.33%)
helped:13525
HURT:
---
src/mesa/drivers/dri/i965/Makefile.sources | 2 +
src/mesa/drivers/dri/i965/brw_nir.h| 45
.../dri/i965/brw_nir_analize_boolean_resolves.c| 228 +
3 files changed, 275 insertions(+)
create mode 100644 src/mesa/drivers/dri/i965/brw_nir.h
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index a9e75ab..5da8423 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
Before, we enabled NIR if you set INTEL_USE_NIR to anything which mean that
INTEL_USE_NIR=false would actually turn on NIR. In preparation for turning
NIR on by default, this commit makes it smarter by allowing the
INTEL_USE_NIR variable to work as either a force-enable or a force-disable.
---
---
src/mesa/drivers/dri/i965/brw_fs.h | 4 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 7716529..a520fd4 100644
---
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 5da8423..41f9ae2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
GLSL IR vs. NIR FS instructions on snb:
total instructions in shared programs: 4976784 - 4973072 (-0.07%)
instructions in affected programs: 3309521 - 3305809 (-0.11%)
helped:7161
HURT: 9839
GAINED:
On Tue, Mar 17, 2015 at 7:21 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Mar 17, 2015 at 7:17 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
From: Matt Turner matts...@gmail.com
Shader-db results for FS instructions with NIR on HSW:
total instructions in shared programs: 4186747 -
On Tue, Mar 17, 2015 at 7:17 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
From: Matt Turner matts...@gmail.com
Shader-db results for FS instructions with NIR on HSW:
total instructions in shared programs: 4186747 - 4129871 (-1.36%)
instructions in affected programs: 2438094 - 2381218
On Tue, Mar 17, 2015 at 7:22 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Tue, Mar 17, 2015 at 7:21 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Mar 17, 2015 at 7:17 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
From: Matt Turner matts...@gmail.com
Shader-db results for FS
https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #3 from Dan Sebald daniel.seb...@ieee.org ---
Created attachment 114410
-- https://bugs.freedesktop.org/attachment.cgi?id=114410action=edit
Fixed image in x-dimension
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https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #4 from Dan Sebald daniel.seb...@ieee.org ---
Created attachment 114411
-- https://bugs.freedesktop.org/attachment.cgi?id=114411action=edit
Fixed image in y-dimension
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Reviewed-by: Matt Turner matts...@gmail.com
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Acked-by: Matt Turner matts...@gmail.com
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https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #2 from Dan Sebald daniel.seb...@ieee.org ---
Created attachment 114409
-- https://bugs.freedesktop.org/attachment.cgi?id=114409action=edit
Clipping in the y-dimension
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https://bugs.freedesktop.org/show_bug.cgi?id=89622
Bug ID: 89622
Summary: Drivers/Gallium/swrast: Pixel image limited to
GL_MAX_TEXTURE_SIZE
Product: Mesa
Version: git
Hardware: Other
OS: All
https://bugs.freedesktop.org/show_bug.cgi?id=89622
Dan Sebald daniel.seb...@ieee.org changed:
What|Removed |Added
CC|
Instead of doing this, I think it would be better to add something to
nir_shader_compiler_options and do it in nir_opt_algebraic, similar to
what Eric has already done for other things. I've seen some shaders
where we transform a mul + a series of adds into a series of mad's,
which is good on
Ping - on this series.
-Brian
On 03/13/2015 01:22 PM, Brian Paul wrote:
_glapi_new_nop_table() creates a new dispatch table populated with
pointers to no-op functions.
_glapi_set_nop_handler() is used to register a callback function which
will be called from each of the no-op functions.
Now
https://bugs.freedesktop.org/show_bug.cgi?id=89622
--- Comment #5 from Ilia Mirkin imir...@alum.mit.edu ---
(In reply to Dan Sebald from comment #0)
First, I want to point out that building Mesa from scratch *without* the
options
--with-dri-drivers=nouveau --with-gallium-drivers=nouveau
https://bugs.freedesktop.org/show_bug.cgi?id=89624
Bug ID: 89624
Summary: Drivers, Gallium/legacy swrast glDrawPixels
differences
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=89624
Dan Sebald daniel.seb...@ieee.org changed:
What|Removed |Added
CC|
This add primitive restart support to the prim conversion.
This involves changing the API for the translate functions
as we need to pass the prim restart index and the original
number of indices into the translate functions.
primitive restart is support for quads, quad strips
and polygons.
This
On Tue, Mar 17, 2015 at 7:28 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Mar 17, 2015 at 7:22 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Tue, Mar 17, 2015 at 7:21 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Mar 17, 2015 at 7:17 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On 18.03.2015 01:53, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.)
Discovered by Coverity. Reported by Ilia Mirkin.
Cc: mesa-sta...@lists.freedesktop.org
---
https://bugs.freedesktop.org/show_bug.cgi?id=89624
--- Comment #2 from Dan Sebald daniel.seb...@ieee.org ---
Created attachment 114413
-- https://bugs.freedesktop.org/attachment.cgi?id=114413action=edit
Illustration of Gallium driver behavior for glDrawPixels
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Silences an MSVC warning where it's called from call_once().
---
src/mesa/main/formats.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index 422c9dc..2bc8bca 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
Removing this block of pragmas doesn't seem to increase the number of
warning generated by MSVC. Other than signed/unsigned comparison warnings
there's very few other warnings nowadays.
---
src/mesa/main/compiler.h | 20
1 file changed, 20 deletions(-)
diff --git
On 17/03/15 01:25, Jonathan Gray wrote:
On Mon, Mar 16, 2015 at 08:37:28PM +, Emil Velikov wrote:
On 26/02/15 13:49, Jose Fonseca wrote:
On 26/02/15 13:42, Jose Fonseca wrote:
On 26/02/15 03:55, Jonathan Gray wrote:
On Wed, Feb 25, 2015 at 07:09:26PM -0800, Matt Turner wrote:
On Wed, Feb
Without NIR:
total instructions in shared programs: 6190374 - 6190153 (-0.00%)
instructions in affected programs: 61126 - 60905 (-0.36%)
helped:156
With NIR:
total instructions in shared programs: 6271584 - 6271471 (-0.00%)
instructions in affected programs:
Without NIR:
total instructions in shared programs: 6190153 - 6185918 (-0.07%)
instructions in affected programs: 185156 - 180921 (-2.29%)
helped:918
With NIR:
total instructions in shared programs: 6273347 - 6268409 (-0.08%)
instructions in affected
https://bugs.freedesktop.org/show_bug.cgi?id=89238
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Status|NEEDINFO|NEW
--- Comment #4
https://bugs.freedesktop.org/show_bug.cgi?id=89616
--- Comment #1 from Laura Ekstrand la...@jlekstrand.net ---
Just pushed a commit to Mesa master that fixes this. I looked for a while and
didn't find any other instances of the same error in the rest of my code.
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https://bugs.freedesktop.org/show_bug.cgi?id=89433
--- Comment #4 from José Fonseca jfons...@vmware.com ---
(In reply to Jonathan Gray from comment #3)
Created attachment 114359 [details] [review]
check if compiler supports -Werror=vla
new patch that does a compile check for the flag
From: Ian Romanick ian.d.roman...@intel.com
This change should get squashed with the afore mentioned change. Tests
suggested by Matt.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Cc: Matt Turner matts...@gmail.com
---
.../drivers/dri/i965/test_fs_cmod_propagation.cpp | 105
On Tue, Mar 17, 2015 at 2:11 PM, Predut, Marius marius.pre...@intel.com wrote:
-Original Message-
From: ibmir...@gmail.com [mailto:ibmir...@gmail.com] On Behalf Of Ilia Mirkin
Sent: Tuesday, March 17, 2015 6:48 PM
To: Predut, Marius
Cc: mesa-dev@lists.freedesktop.org
Subject: Re:
On Mon, Mar 16, 2015 at 9:21 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
Because of the way that NIR does conditionals, we get them in any old SSA
value. The actual boolean value used in the select or if is x != 0.
Previously, we handled this by emitting a mov.nz to move the value to the
On 03/17/2015 11:35 AM, Ilia Mirkin wrote:
AFAIK you can't have TCS without TES. But you can have TES without TCS.
That much is for sure. The ARB_tessellation_shader spec says the
following in the overview:
In this extension, patches may not be passed beyond
the tessellation evaluation
https://bugs.freedesktop.org/show_bug.cgi?id=89433
--- Comment #5 from José Fonseca jfons...@vmware.com ---
... check must be done _before_ MSVC2013_COMPAT_* ...
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On 03/13/2015 05:59 PM, Matt Turner wrote:
Patch is
Reviewed-by: Chad Versace chad.vers...@intel.com
---
Chad, you suggested it would be nice to remove the locking from
eglQueryString, but I don't see a way to do it. eglQueryString has
to generate EGL_NOT_INITIALIZED if the display is valid
Did you mean Khronos Public Bugzilla?
Marek
On Tue, Mar 17, 2015 at 7:58 PM, Ian Romanick i...@freedesktop.org wrote:
On 03/17/2015 11:33 AM, Marek Olšák wrote:
Hi,
The GL 4.5 Core spec is inconsistent. The 11.1.2.1 Output Variables
section says that transform feedback is allowed after a
https://bugs.freedesktop.org/show_bug.cgi?id=89616
Bug ID: 89616
Summary: bufferobj.c:1639:7: error: format not a string literal
and no format arguments [-Werror=format-security]
Product: Mesa
Version: git
Hardware: All
-Original Message-
From: Ian Romanick [mailto:i...@freedesktop.org]
Sent: Tuesday, March 17, 2015 8:27 PM
To: Predut, Marius; mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH] i965/aa: fixing anti-aliasing bug for thinnest
width lines - GEN6
On 03/17/2015 11:29 AM,
For the series:
Reviewed-by: Marek Olšák marek.ol...@amd.com
Marek
On Mon, Mar 16, 2015 at 3:47 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
Massive list of constant data. Annotate it as such.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
Previously linker did not take in to account case where one would
have only gs and fs (with SSO), patch adds the case by refactoring
code around assign_varying_locations. This makes sure locations for
gs get populated correctly.
This was found with some of the SSO subtests of Martin's upcoming
https://bugs.freedesktop.org/show_bug.cgi?id=88806
Jason Ekstrand ja...@jlekstrand.net changed:
What|Removed |Added
Status|NEW |RESOLVED
-Original Message-
From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of
Matt Turner
Sent: Thursday, March 12, 2015 12:02 AM
To: Ilia Mirkin
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH ] i965/aa: fixing anti-aliasing bug for thinnest
width
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Bug 79706 depends on bug 88806, which changed state.
Bug 88806 Summary: nir/nir_constant_expressions.c:2754:15: error: controlling
expression type 'unsigned int' not compatible with any generic association type
On Tue, Mar 17, 2015 at 5:13 AM, Tapani Pälli tapani.pa...@intel.com wrote:
On 03/16/2015 08:08 PM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:37 AM, Tapani Pälli tapani.pa...@intel.com
wrote:
+/**
+ * Returns output index for dual source blending.
+ */
GLint GLAPIENTRY
From: Marius Predut marius.pre...@intel.com
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization
of the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines
Hi,
On 17 March 2015 at 16:37, marius.pre...@intel.com wrote:
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -198,9 +198,15 @@ upload_sf_state(struct brw_context *brw)
float line_width =
roundf(CLAMP(ctx-Line.Width, 0.0,
Can you provide the output of
git var -l
And the headers of the patch file you're sending (or git show
--format=raw for the commit in question if you're not using patch
files as intermediates)
I suspect that GIT_AUTHOR_IDENT will differ from whatever's in the
From: header of the patch being
-Original Message-
From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of
Ilia Mirkin
Sent: Wednesday, March 11, 2015 11:09 PM
To: Predut, Marius
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH ] i965/aa: fixing anti-aliasing bug for thinnest
width
From: Marek Olšák marek.ol...@amd.com
radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.)
Discovered by Coverity. Reported by Ilia Mirkin.
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 2 +-
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com
On Thu, Mar 12, 2015 at 12:33 PM, Laura Ekstrand la...@jlekstrand.net wrote:
This reverts commit 1ee000a0b6737d6c140d4f07b6044908b8ebfdc7.
Failures with the GLES3 conformance suite and Synmark2 OGLHdrBloom revealed
that this commit might be
On 03/17/2015 04:20 PM, Ilia Mirkin wrote:
On Tue, Mar 17, 2015 at 5:13 AM, Tapani Pälli tapani.pa...@intel.com wrote:
On 03/16/2015 08:08 PM, Ilia Mirkin wrote:
On Fri, Mar 13, 2015 at 4:37 AM, Tapani Pälli tapani.pa...@intel.com
wrote:
+/**
+ * Returns output index for dual source
Thanks. Looked through stats and at some of the regressions.
Some of the areas I noticed we were doing worse:
We generate two CMPs for discard_if; only one without NIR. I think you
had an idea about solving this.
SEL peephole interference -- we knew about this in general, but I
found an
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