[Mesa-dev] [PATCH 2/4] glsl: Silence unused parameter warnings

From: Ian Romanick builtin_functions.cpp:5289:52: warning: unused parameter 'num_arguments' [-Wunused-parameter] unsigned num_arguments, ^ builtin_functions.cpp:5290:52:

[Mesa-dev] [PATCH] radeon: ensure that timing/profiling queries are suspended on flush

The queries_suspended_for_flush flag is redundant because suspended queries are not removed from their respective linked list. --- src/gallium/drivers/radeon/r600_pipe_common.c | 13 ++--- src/gallium/drivers/radeon/r600_pipe_common.h | 2 -- 2 files changed, 6 insertions(+), 9

[Mesa-dev] [PATCH 1/4] glsl: Silence ignored qualifier warning

From: Ian Romanick I think the intention was to mark the "this" parameter as const, but const goes on the other end to do that. In file included from glsl_symbol_table.cpp:26:0: ast.h:339:35: warning: type qualifiers ignored on function return type

[Mesa-dev] [PATCH 4/4] glsl: Fix off-by-one error in array size check assertion

From: Ian Romanick Apparently, this has been a bug since 2010 (c30f6e5d). Also use ARRAY_SIZE instead of open coding it. Signed-off-by: Ian Romanick Cc: Kenneth Graunke Cc: mesa-sta...@lists.freedesktop.org ---

[Mesa-dev] [PATCH 3/4] mesa: Don't expose GL_EXT_shader_integer_mix in GLES 1.x

From: Ian Romanick There are no shaders, so it doesn't even make sense to expose the extension. Signed-off-by: Ian Romanick Cc: Nanley Chery --- src/mesa/main/extensions_table.h | 2 +- 1 file changed, 1

Re: [Mesa-dev] [Mesa-stable] [PATCH 2/2] radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register values

Hi Tom, Please flip the order of the patches and drop the now patch 1/2 from the stable queue. On 16 November 2015 at 20:03, Tom Stellard wrote: > The compiler has more information and is able to optimize the bits > it sets in these registers. > > CC:

Re: [Mesa-dev] llvm TGSI backend (WIP) questions

On Wed, Nov 18, 2015 at 03:53:37PM +0100, Hans de Goede wrote: > Hi, > > On 13-11-15 19:51, Tom Stellard wrote: > > On Fri, Nov 13, 2015 at 02:46:52PM +0100, Hans de Goede wrote: > >> Hi All, > >> > >> So as discussed I've started working on a TGSI backend for > >> llvm to use as a way to get

Re: [Mesa-dev] [PATCH] i965/fs: Replace nested ternary with if ladder.

Matt Turner writes: > Since the types of the expression were > >bool ? src_reg : (bool ? brw_reg : brw_reg) > > the result of the second (nested) ternary would be implicitly > converted to a src_reg by the src_reg(struct brw_reg) constructor. I.e., > >bool ? src_reg :

[Mesa-dev] [Bug 92985] Mac OS X build error "ar: no archive members specified"

https://bugs.freedesktop.org/show_bug.cgi?id=92985 --- Comment #3 from Emil Velikov --- (In reply to Martin Peres from comment #2) > (In reply to Emil Velikov from comment #1) > > I'm assuming that this fails as said ar expects to create a non empty > > archive. > >

Re: [Mesa-dev] [PATCH 5/5] i965/nir: use vectorization for non-scalar stages

On Tue, Nov 17, 2015 at 11:41 PM, Connor Abbott wrote: > On Mon, Nov 16, 2015 at 11:00 AM, Jason Ekstrand wrote: >> On Sat, Nov 14, 2015 at 6:59 PM, Connor Abbott wrote: >>> Shader-db results on bdw with INTEL_DEBUG=vec4: >>> >>>

Re: [Mesa-dev] [PATCH 2/4] glsl: Silence unused parameter warnings

Reviewed-by: Ilia Mirkin On Wed, Nov 18, 2015 at 12:44 PM, Ian Romanick wrote: > From: Ian Romanick > > builtin_functions.cpp:5289:52: warning: unused parameter 'num_arguments' > [-Wunused-parameter] >

Re: [Mesa-dev] [PATCH 4/4] glsl: Fix off-by-one error in array size check assertion

On Wednesday, November 18, 2015 09:44:34 AM Ian Romanick wrote: > From: Ian Romanick > > Apparently, this has been a bug since 2010 (c30f6e5d). > > Also use ARRAY_SIZE instead of open coding it. > > Signed-off-by: Ian Romanick > Cc: Kenneth

Re: [Mesa-dev] [PATCH 1/5] util/set: don't compare against deleted entries

On Sat, Nov 14, 2015 at 6:59 PM, Connor Abbott wrote: > Not sure how this wasn't already caught by valgrind, but it fixes an > issue with the vectorizer. Ugh... I'm getting tired of fixing these bugs. > Signed-off-by: Connor Abbott Both are Cc:

Re: [Mesa-dev] [Mesa-stable] [PATCH] nir: fix typo in idiv lowering, causing large-udiv-udiv failures

Hi Ilia, On 11 November 2015 at 00:28, Ilia Mirkin wrote: > On Tue, Nov 10, 2015 at 7:24 PM, Connor Abbott wrote: >> On Tue, Nov 10, 2015 at 7:02 PM, Ilia Mirkin wrote: >>> On Tue, Nov 10, 2015 at 6:44 PM, Eric Anholt

Re: [Mesa-dev] Introducing OpenSWR: High performance software rasterizer

Hi Tim, I have no objections against getting this merged, although here are a couple of things that should be sorted. Some of these are just reiteration from others: - First and foremost - please base your work against master. Mesa, alike most other open-source projects, tries to keep features

Re: [Mesa-dev] [PATCH v3] llvmpipe: disable VSX in ppc due to LLVM PPC bug

On 18/11/15 18:52, Oded Gabbay wrote: On Tue, Nov 17, 2015 at 10:35 PM, Oded Gabbay wrote: This patch disables the use of VSX instructions, as they cause some piglit tests to fail For more details, see: https://llvm.org/bugs/show_bug.cgi?id=25503#c7 With this patch,

Re: [Mesa-dev] [Mesa-stable] [PATCH] mesa: fix error type for GetFramebufferAttachmentParameteriv

Hi Tapani, On 28 October 2015 at 13:27, Tapani Pälli wrote: > On 10/27/2015 06:42 PM, Ian Romanick wrote: >> >> On 10/27/2015 12:11 AM, Tapani Pälli wrote: >>> >>> Fixes following failing dEQP test: >>> dEQP-GLES3.functional.fbo.api.attachment_query_empty_fbo >>> >>>

Re: [Mesa-dev] [PATCH v3] llvmpipe: disable VSX in ppc due to LLVM PPC bug

Am 17.11.2015 um 21:35 schrieb Oded Gabbay: > This patch disables the use of VSX instructions, as they cause some > piglit tests to fail > > For more details, see: https://llvm.org/bugs/show_bug.cgi?id=25503#c7 > > With this patch, ppc64le reaches parity with x86-64 as far as piglit test > suite

Re: [Mesa-dev] [PATCH] [v2] i965: Add lossless compression to surface format table

On Tue 17 Nov 2015, Ben Widawsky wrote: > Background: Prior to Skylake and since Ivybridge Intel hardware has had the > ability to use a MCS (Multisample Control Surface) as auxiliary data in > "compression" operations on the surface. This reduces memory bandwidth. This > hardware was either used

Re: [Mesa-dev] [PATCH v3] llvmpipe: disable VSX in ppc due to LLVM PPC bug

On Tue, Nov 17, 2015 at 10:35 PM, Oded Gabbay wrote: > This patch disables the use of VSX instructions, as they cause some > piglit tests to fail > > For more details, see: https://llvm.org/bugs/show_bug.cgi?id=25503#c7 > > With this patch, ppc64le reaches parity with

Re: [Mesa-dev] [Mesa-stable] [PATCH] nir: fix typo in idiv lowering, causing large-udiv-udiv failures

On Wed, Nov 18, 2015 at 2:03 PM, Emil Velikov wrote: > Hi Ilia, > > On 11 November 2015 at 00:28, Ilia Mirkin wrote: >> On Tue, Nov 10, 2015 at 7:24 PM, Connor Abbott wrote: >>> On Tue, Nov 10, 2015 at 7:02 PM, Ilia Mirkin

Re: [Mesa-dev] [PATCH 3/4] mesa: Don't expose GL_EXT_shader_integer_mix in GLES 1.x

Reviwed-by: Jason Ekstrand On Wed, Nov 18, 2015 at 9:44 AM, Ian Romanick wrote: > From: Ian Romanick > > There are no shaders, so it doesn't even make sense to expose the > extension. > > Signed-off-by: Ian Romanick

Re: [Mesa-dev] [Mesa-stable] [PATCH] nir: fix typo in idiv lowering, causing large-udiv-udiv failures

On Wed, Nov 18, 2015 at 2:06 PM, Ilia Mirkin wrote: > On Wed, Nov 18, 2015 at 2:03 PM, Emil Velikov > wrote: >> Hi Ilia, >> >> On 11 November 2015 at 00:28, Ilia Mirkin wrote: >>> On Tue, Nov 10, 2015 at 7:24 PM, Connor

Re: [Mesa-dev] [PATCH 4/4] glsl: Fix off-by-one error in array size check assertion

On 11/18/2015 10:05 AM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 09:44:34 AM Ian Romanick wrote: >> From: Ian Romanick >> >> Apparently, this has been a bug since 2010 (c30f6e5d). >> >> Also use ARRAY_SIZE instead of open coding it. >> >> Signed-off-by:

Re: [Mesa-dev] [PATCH 3/4] mesa: Don't expose GL_EXT_shader_integer_mix in GLES 1.x

On Wed, Nov 18, 2015 at 11:50 AM, Jason Ekstrand wrote: > Reviwed-by: Jason Ekstrand idr: Please fix Jason's typo when you amend the patch. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 4/5] nir: add a vectorization pass

On Sat, Nov 14, 2015 at 6:59 PM, Connor Abbott wrote: > This effectively does the opposite of nir_lower_alus_to_scalar, trying > to combine per-component ALU operations with the same sources but > different swizzles into one larger ALU operation. It uses a similar > model as

[Mesa-dev] [PATCH] mesa/extensions: Document the extensions table

From: Nanley Chery Help developers understand the table's organization. Suggested-by: Jason Ekstrand Signed-off-by: Nanley Chery --- src/mesa/main/extensions_table.h | 17 + 1 file changed, 17

Re: [Mesa-dev] [PATCH] mesa/extensions: Document the extensions table

Hi Nanley, On 18 November 2015 at 20:29, Nanley Chery wrote: > From: Nanley Chery > > Help developers understand the table's organization. > > Suggested-by: Jason Ekstrand > Signed-off-by: Nanley Chery

[Mesa-dev] [PATCH 1/2] nir: remove mem_ctx arg from nir_shader_create()

From: Rob Clark Reference counting (which is introduced in a subsequent patch) basically should only be done on root nodes in the ralloc tree. In particular, having multiple threads calling in to ralloc for the same graph will not work. Whereas reference-counting of

[Mesa-dev] [PATCH 2/2] nir: add shader reference counting

From: Rob Clark For gallium, at least, we'll need this to manage shader's lifetimes, since in some cases both the driver and the state tracker will need to hold on to a reference for variant managing. Use nir_shader_mutable() before doing any IR opt/lowering/etc, to

Re: [Mesa-dev] [PATCH v2 19/42] glsl ubo/ssbo: Move common code into lower_buffer_access::setup_buffer_access

On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote: > This code will also be usable by the pass to lower shared variables. > > Note, that *const_offset is adjusted by setup_buffer_access so it must > be initialized before calling setup_buffer_access. > > v2: > * Add comment for

Re: [Mesa-dev] [PATCH 1/2] dri_interface: Introduce __DRI_IMAGE_USE_SCANOUT_ROTATION_* flags (v2)

On 07.11.2015 12:05, Vivek Kasireddy wrote: > These flags can be used by the DRI driver to set additional requirements > such as tiling while creating buffers. > > v2: Added a brief comment to explain the rotation orientation. > > Cc: Michel Danzer > Signed-off-by: Vivek

Re: [Mesa-dev] [PATCH 2/2] gbm: Add flags to enable creation of rotated scanout buffers (v4)

On 07.11.2015 12:05, Vivek Kasireddy wrote: > For certain platforms that support rotated scanout buffers, currently, > there is no way to create them with the GBM DRI interface. These flags > will instruct the DRI driver to create the buffer by setting > additional requirements such as tiling

[Mesa-dev] [PATCH v3 0/9] gallium: batch query objects and related cleanups

Hi everybody, this is the next iteration of the series, rebased on current master and with the adjustment to nv50 queries. Please take a look! Samuel, let me know when you've tested this! Cheers, Nicolai --- gallium/auxiliary/hud/hud_context.c | 24 +-

[Mesa-dev] [PATCH v3 5/9] st/mesa: use BITSET_FOREACH_SET to loop through active perfmon counters

Reviewed-by: Samuel Pitoiset --- src/mesa/state_tracker/st_cb_perfmon.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/mesa/state_tracker/st_cb_perfmon.c b/src/mesa/state_tracker/st_cb_perfmon.c index 80ff170..ec12eb2 100644 ---

[Mesa-dev] [PATCH v3 7/9] gallium: add the concept of batch queries

Some drivers (in particular radeon[si], but also freedreno judging from a quick grep) may want to expose performance counters that cannot be individually enabled or disabled. Allow such drivers to mark driver-specific queries as requiring a new type of batch query object that is used to start and

[Mesa-dev] [PATCH v3 8/9] gallium/hud: add support for batch queries

v2 + v3: be more defensive about allocations --- src/gallium/auxiliary/hud/hud_context.c | 24 ++- src/gallium/auxiliary/hud/hud_driver_query.c | 270 +++ src/gallium/auxiliary/hud/hud_private.h | 13 +- 3 files changed, 261 insertions(+), 46 deletions(-) diff

[Mesa-dev] [PATCH v3 9/9] st/mesa: add support for batch driver queries to perfmon

v2 + v3: forgot null-pointer checks (spotted by Samuel Pitoiset) --- src/mesa/state_tracker/st_cb_perfmon.c | 83 +++--- src/mesa/state_tracker/st_cb_perfmon.h | 6 +++ 2 files changed, 82 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH v3 2/9] gallium/hud: remove unused field in query_info

Reviewed-by: Samuel Pitoiset --- src/gallium/auxiliary/hud/hud_driver_query.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/gallium/auxiliary/hud/hud_driver_query.c b/src/gallium/auxiliary/hud/hud_driver_query.c index f14305e..3198ab3 100644 ---

[Mesa-dev] [PATCH v3 4/9] st/mesa: store mapping from perfmon counter to query type

Previously, when a performance monitor was initialized, an inner loop through all driver queries with string comparisons for each enabled performance monitor counter was used. This hurts when a driver exposes lots of queries. Reviewed-by: Samuel Pitoiset ---

[Mesa-dev] [PATCH v3 1/9] gallium: remove pipe_driver_query_group_info field type

This was only used to implement an unnecessarily restrictive interpretation of the spec of AMD_performance_monitor. The spec says A performance monitor consists of a number of hardware and software counters that can be sampled by the GPU and reported back to the application. I guess one

[Mesa-dev] [PATCH v3 3/9] st/mesa: map semantic driver query types to underlying type

Reviewed-by: Samuel Pitoiset --- src/gallium/include/pipe/p_defines.h | 2 ++ src/mesa/state_tracker/st_cb_perfmon.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index

[Mesa-dev] [Bug 70264] EGL pkg-config does not provide correct cflags

https://bugs.freedesktop.org/show_bug.cgi?id=70264 Pekka Paalanen changed: What|Removed |Added Status|NEW |RESOLVED

[Mesa-dev] [Bug 92987] fails to determine screen refresh rate when rendering is offloaded

https://bugs.freedesktop.org/show_bug.cgi?id=92987 --- Comment #2 from Oliver Neukum --- (In reply to Stefan Dirsch from comment #1) > What's wrong with limiting fps to the refresh rate of 60Hz? vblank_mode in > /etc/drirc (~/.drirc) controls this. It's enabled (=1) by

[Mesa-dev] [Bug 92987] fails to determine screen refresh rate when rendering is offloaded

https://bugs.freedesktop.org/show_bug.cgi?id=92987 Oliver Neukum changed: What|Removed |Added Status|NEEDINFO|NEW -- You are

Re: [Mesa-dev] [PATCH 05/36] i965: Import tables enumerating the set of validated L3 configurations.

Ben Widawsky writes: > On Sat, Nov 14, 2015 at 01:43:41PM -0800, Jordan Justen wrote: >> From: Francisco Jerez >> >> It should be possible to use additional L3 configurations other than >> the ones listed in the tables of validated allocations ("BSpec

[Mesa-dev] [PATCH v3 6/9] st/mesa: maintain active perfmon counters in an array

It is easy enough to pre-determine the required size, and arrays are generally better behaved especially when they get large. v2: make sure init_perf_monitor returns true when no counters are active (spotted by Samuel Pitoiset) Reviewed-by: Samuel Pitoiset ---

[Mesa-dev] [Bug 92987] fails to determine screen refresh rate when rendering is offloaded

https://bugs.freedesktop.org/show_bug.cgi?id=92987 Stefan Dirsch changed: What|Removed |Added Status|NEW |NEEDINFO --- Comment

Re: [Mesa-dev] [PATCH v2 03/42] i965: Adjust gen check in can_do_pipelined_register_writes

Jordan Justen writes: > From: Francisco Jerez > > Allow for pipelined register writes for gen < 7. > > v2: > * Split from another patch and adjust comment (jljusten) > > Reviewed-by: Jordan Justen > --- >

[Mesa-dev] [Bug 92987] fails to determine screen refresh rate when rendering is offloaded

https://bugs.freedesktop.org/show_bug.cgi?id=92987 Bug ID: 92987 Summary: fails to determine screen refresh rate when rendering is offloaded Product: Mesa Version: unspecified Hardware: x86-64 (AMD64) OS:

Re: [Mesa-dev] [PATCH] [v2] i965: Add lossless compression to surface format table

On Tue, Nov 17, 2015 at 05:30:06PM -0800, Ben Widawsky wrote: > Background: Prior to Skylake and since Ivybridge Intel hardware has had the > ability to use a MCS (Multisample Control Surface) as auxiliary data in > "compression" operations on the surface. This reduces memory bandwidth. This >

Re: [Mesa-dev] [PATCH v2 33/42] glsl: Check for SSBO variable in SSBO atomic lowering

On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote: > When an atomic function is called, we need to check to see if it is > for an SSBO variable before lowering it to the SSBO specific intrinsic > function. > > v2: > * is_in_buffer_block => is_in_shader_storage_block (Iago) > >

Re: [Mesa-dev] [PATCH] [v3] i965/skl: skip fast clears for certain surface formats

On Tue, Nov 17, 2015 at 05:31:12PM -0800, Ben Widawsky wrote: > Some of the information originally in this commit message is now in the patch > before this. > > SKL adds compressible render targets and as a result mutates some of the > programming for fast clears and resolves. There is a new

Re: [Mesa-dev] [PATCH v2 34/42] glsl: Check for SSBO variable in check_for_ssbo_store

Reviewed-by: Iago Toral Quiroga On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote: > The compiler probably already blocks this earlier on, but we should be > checking for an SSBO here. > > Signed-off-by: Jordan Justen > Cc: Samuel Iglesias

Re: [Mesa-dev] [PATCH v2 20/42] glsl: Remove mem_ctx as member variable in lower_ubo_reference_visitor

Reviewed-by:; Iago Toral Quiroga On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote: > Signed-off-by: Jordan Justen > Cc: Iago Toral Quiroga > --- > src/glsl/lower_ubo_reference.cpp | 64 >

Re: [Mesa-dev] [PATCH] [v2] i965: Add lossless compression to surface format table

On Wed, Nov 18, 2015 at 11:10:12AM +0200, Pohjolainen, Topi wrote: > On Tue, Nov 17, 2015 at 05:30:06PM -0800, Ben Widawsky wrote: > > Background: Prior to Skylake and since Ivybridge Intel hardware has had the > > ability to use a MCS (Multisample Control Surface) as auxiliary data in > >

Re: [Mesa-dev] llvm TGSI backend (WIP) questions

Hi, On 13-11-15 19:51, Tom Stellard wrote: On Fri, Nov 13, 2015 at 02:46:52PM +0100, Hans de Goede wrote: Hi All, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm

[Mesa-dev] [Bug 92985] Mac OS X build error "ar: no archive members specified"

https://bugs.freedesktop.org/show_bug.cgi?id=92985 --- Comment #1 from Emil Velikov --- I'm assuming that this fails as said ar expects to create a non empty archive. Thus moving the noinst_LTLIBRARIES += libloader_dri3_helper.la into the if HAVE_DRI3 section should

Re: [Mesa-dev] The i965 vec4 backend, exec_masks, and 64-bit types

Connor Abbott writes: > On Tue, Nov 3, 2015 at 8:04 PM, Francisco Jerez wrote: >> Francisco Jerez writes: >> >>> Connor Abbott writes: >>> Hi all, While working on FP64 for i965, there's an

[Mesa-dev] [Bug 92985] Mac OS X build error "ar: no archive members specified"

https://bugs.freedesktop.org/show_bug.cgi?id=92985 --- Comment #2 from Martin Peres --- (In reply to Emil Velikov from comment #1) > I'm assuming that this fails as said ar expects to create a non empty > archive. > Thus moving the noinst_LTLIBRARIES +=

Re: [Mesa-dev] [PATCH 4/4] i965: Allow indirect GS input indexing in the scalar backend.

On Sat, Nov 7, 2015 at 9:04 PM, Kenneth Graunke wrote: > This allows arbitrary non-constant indices on GS input arrays, > both for the vertex index, and any array offsets beyond that. > > All indirects are handled via the pull model. We could potentially > handle indirect

[Mesa-dev] [PATCH 2/2] nir: extract out helper macros for running passes

From: Rob Clark Note these are a bit uglier, due to avoidance of GNU C extensions. But drivers which do not need to be built with compilers that don't support the extension can wrap these macros with their own. Signed-off-by: Rob Clark ---

Re: [Mesa-dev] [PATCH 2/2] i965/fs: Add support for gl_HelperInvocation system value.

On Wed, Nov 18, 2015 at 3:09 PM, Ilia Mirkin wrote: > On Wed, Nov 18, 2015 at 6:06 PM, Matt Turner wrote: >> In most cases (when the negate is copy propagated and the MOV removed), >> this is two instructions on Gen >= 8 and only two instructions on >>

Re: [Mesa-dev] [PATCH 0/8] Implement EXT_shader_samples_identical

On Wed, Nov 18, 2015 at 4:23 PM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 03:46:46 PM Ian Romanick wrote: >> This patch series implements a new GL extension, >> EXT_shader_samples_identical. This extension allows shaders to >> determine when all of the

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

On Wed, Nov 18, 2015 at 5:31 PM, Ian Romanick wrote: > On 11/18/2015 05:02 PM, Jason Ekstrand wrote: >> On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke >> wrote: >>> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote: From: Ian

Re: [Mesa-dev] [PATCH 2/2] mesa: Add test for sorted extension table

On 11/18/2015 03:01 PM, Nanley Chery wrote: > From: Nanley Chery > > Enable developers to know if the table's alphabetical sorting > is maintained or lost. I like this in principle, but let's be honest. Almost all of the time, the people who don't sort (by whatever

[Mesa-dev] [PATCH 6/8 v2] nir: Add nir_texop_samples_identical opcode

From: Ian Romanick This is the NIR analog to GLSL IR ir_samples_identical. However, the NIR has an extra source. This is a fake sample index with a type nir_tex_src_ms_index. This enables backends to (likely) share more code with the existing nir_texop_txf_ms

[Mesa-dev] [PATCH 7/8 v2] i965/vec4: Handle nir_tex_src_ms_index more like the scalar

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp

[Mesa-dev] [PATCH 8/8 v2] i965: Enable EXT_shader_samples_identical

From: Ian Romanick v2: Handle immediate value for MCS smarter. Rebase on changes to nir_texop_sampels_identical (missing second parameter). Suggested by Jason. This still doesn't handle the 16x MSAA case. Signed-off-by: Ian Romanick ---

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On Wed, Nov 18, 2015 at 6:47 PM, Matt Turner wrote: > On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery wrote: >> From: Nanley Chery >> >> Make it easier to determine where to add new extensions. >> Performed with the vim sort

Re: [Mesa-dev] [PATCH 7/8] i965/fs: Handle nir_tex_src_ms_index more like the vec4

On 11/18/2015 04:57 PM, Jason Ekstrand wrote: > On Wed, Nov 18, 2015 at 4:07 PM, Kenneth Graunke > wrote: >> On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote: >>> From: Ian Romanick >>> >>> Signed-off-by: Ian Romanick

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

On 11/18/2015 04:06 PM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote: >> From: Ian Romanick >> >> Signed-off-by: Ian Romanick >> --- >> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 + >>

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

On 11/18/2015 05:02 PM, Jason Ekstrand wrote: > On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke > wrote: >> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote: >>> From: Ian Romanick >>> >>> Signed-off-by: Ian Romanick

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On Wed, Nov 18, 2015 at 3:47 PM, Matt Turner wrote: > > On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery wrote: > > From: Nanley Chery > > > > Make it easier to determine where to add new extensions. > > Performed with the vim

Re: [Mesa-dev] [PATCH 7/8] i965/fs: Handle nir_tex_src_ms_index more like the vec4

On Wednesday, November 18, 2015 05:20:29 PM Ian Romanick wrote: > On 11/18/2015 04:07 PM, Kenneth Graunke wrote: > > On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote: > >> From: Ian Romanick > >> > >> Signed-off-by: Ian Romanick >

[Mesa-dev] [PATCH] radeon/llvm: Use llvm.AMDIL.exp intrinsic again for now

From: Michel Dänzer llvm.exp2.f32 doesn't work in some cases yet. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709 Signed-off-by: Michel Dänzer --- Once the problem is fixed in the LLVM AMDGPU backend, we can re-enable llvm.exp2.f32

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On Wednesday, November 18, 2015 06:25:45 PM Ian Romanick wrote: > On 11/18/2015 06:15 PM, Matt Turner wrote: > > On Wed, Nov 18, 2015 at 6:07 PM, Ian Romanick wrote: > >> On 11/18/2015 03:01 PM, Nanley Chery wrote: > >>> From: Nanley Chery > >>> >

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote: >> From: Ian Romanick >> >> Signed-off-by: Ian Romanick >> --- >>

Re: [Mesa-dev] [PATCH] [v2] i965: Add lossless compression to surface format table

On Wed, Nov 18, 2015 at 03:50:32PM -0800, Ben Widawsky wrote: > On Wed, Nov 18, 2015 at 11:10:12AM +0200, Pohjolainen, Topi wrote: > > On Tue, Nov 17, 2015 at 05:30:06PM -0800, Ben Widawsky wrote: > > > Background: Prior to Skylake and since Ivybridge Intel hardware has had > > > the > > >

Re: [Mesa-dev] [PATCH 7/8] i965/fs: Handle nir_tex_src_ms_index more like the vec4

On 11/18/2015 04:07 PM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote: >> From: Ian Romanick >> >> Signed-off-by: Ian Romanick >> --- >> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++-

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On 11/18/2015 06:15 PM, Matt Turner wrote: > On Wed, Nov 18, 2015 at 6:07 PM, Ian Romanick wrote: >> On 11/18/2015 03:01 PM, Nanley Chery wrote: >>> From: Nanley Chery >>> >>> Make it easier to determine where to add new extensions. >>> Performed

Re: [Mesa-dev] [PATCH 6/8] nir: Add nir_texop_samples_identical opcode

On Wed, Nov 18, 2015 at 4:23 PM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 03:46:52 PM Ian Romanick wrote: >> From: Ian Romanick >> >> This is the NIR analog to GLSL IR ir_samples_identical. However, the >> NIR has an extra source.

Re: [Mesa-dev] [PATCH 7/8] i965/fs: Handle nir_tex_src_ms_index more like the vec4

On Wed, Nov 18, 2015 at 4:07 PM, Kenneth Graunke wrote: > On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote: >> From: Ian Romanick >> >> Signed-off-by: Ian Romanick >> --- >>

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On 11/18/2015 03:01 PM, Nanley Chery wrote: > From: Nanley Chery > > Make it easier to determine where to add new extensions. > Performed with the vim sort command. Uh... no, please. Extensions should be sorted in each group, but what is wrong with the old group

Re: [Mesa-dev] [PATCH] radeon/llvm: Use llvm.AMDIL.exp intrinsic again for now

On Thu, Nov 19, 2015 at 11:31:55AM +0900, Michel Dänzer wrote: > From: Michel Dänzer > > llvm.exp2.f32 doesn't work in some cases yet. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709 > Signed-off-by: Michel Dänzer > --- > > Once

Re: [Mesa-dev] [PATCH] [v3] i965/skl: skip fast clears for certain surface formats

On Wed, Nov 18, 2015 at 12:15:40PM +0200, Pohjolainen, Topi wrote: > On Tue, Nov 17, 2015 at 05:31:12PM -0800, Ben Widawsky wrote: > > Some of the information originally in this commit message is now in the > > patch > > before this. > > > > SKL adds compressible render targets and as a result

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

On Wed, Nov 18, 2015 at 5:23 PM, Ian Romanick wrote: > On 11/18/2015 04:06 PM, Kenneth Graunke wrote: >> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote: >>> From: Ian Romanick >>> >>> Signed-off-by: Ian Romanick

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On Wed, Nov 18, 2015 at 6:07 PM, Ian Romanick wrote: > On 11/18/2015 03:01 PM, Nanley Chery wrote: >> From: Nanley Chery >> >> Make it easier to determine where to add new extensions. >> Performed with the vim sort command. > > Uh... no, please.

Re: [Mesa-dev] [PATCH] mesa/extensions: Document the extensions table

On Wed, Nov 18, 2015 at 12:33 PM, Emil Velikov wrote: > Hi Nanley, > > On 18 November 2015 at 20:29, Nanley Chery wrote: > > From: Nanley Chery > > > > Help developers understand the table's organization. > > > >

Re: [Mesa-dev] [PATCH 2/2] mesa: Add test for sorted extension table

On 19 November 2015 at 00:16, Nanley Chery wrote: > On Wed, Nov 18, 2015 at 4:08 PM, Emil Velikov > wrote: >> >> On 18 November 2015 at 23:40, Nanley Chery wrote: >> > On Wed, Nov 18, 2015 at 3:07 PM, Ilia Mirkin

Re: [Mesa-dev] [PATCH v2 1/2] mesa: Add KBL PCI IDs and platform information.

On Wed, Nov 18, 2015 at 4:54 PM, Sarah Sharp wrote: >> There's not really a consensus I guess, but most people do leave the version >> information in the final commit message. > > I personally feel like that's leaving boredom doodles on a final > architectural

Re: [Mesa-dev] [PATCH 2/2] i965/fs: Add support for gl_HelperInvocation system value.

On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote: > --- > This fails... for reasons I cannot determine. Can anyone spot what's wrong? Ilia identified the problem in 10 seconds -- I need to NOT the pixel mask. A set bit in the mask means the channel is enabled, and that's

Re: [Mesa-dev] [PATCH 1/2] mesa/extensions: Sort the extension table alphabetically

On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery wrote: > From: Nanley Chery > > Make it easier to determine where to add new extensions. > Performed with the vim sort command. Well, I think I'm obligated to review such a patch :) > Signed-off-by:

[Mesa-dev] [PATCH 2/8] mesa: Extension tracking for EXT_shader_samples_indentical

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/main/extensions_table.h | 1 + src/mesa/main/mtypes.h | 1 + 2 files changed, 2 insertions(+) diff --git a/src/mesa/main/extensions_table.h

[Mesa-dev] [PATCH 0/8] Implement EXT_shader_samples_identical

This patch series implements a new GL extension, EXT_shader_samples_identical. This extension allows shaders to determine when all of the samples in a particular texel are the same. This takes advantage of the way compressed multisample surfaces are stored on modern Intel and AMD hardware. This

[Mesa-dev] [PATCH 3/8] glsl: Extension tracking for EXT_shader_samples_indentical

From: Ian Romanick Signed-off-by: Ian Romanick --- src/glsl/glcpp/glcpp-parse.y| 3 +++ src/glsl/glsl_parser_extras.cpp | 1 + src/glsl/glsl_parser_extras.h | 2 ++ 3 files changed, 6 insertions(+) diff --git

[Mesa-dev] [PATCH 6/8] nir: Add nir_texop_samples_identical opcode

From: Ian Romanick This is the NIR analog to GLSL IR ir_samples_identical. However, the NIR has an extra source. This is a fake sample index with a type nir_tex_src_ms_index. This enables backends to (likely) share more code with the existing nir_texop_txf_ms

[Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 + src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 1 +

[Mesa-dev] [PATCH 1/8] Import current draft of EXT_shader_samples_identical spec

From: Ian Romanick Signed-off-by: Ian Romanick Cc: "Chris Forbes" --- docs/specs/EXT_shader_samples_identical.txt | 174 1 file changed, 174 insertions(+) create mode 100644

[Mesa-dev] [PATCH 4/8] glsl: Add ir_samples_identical opcode

From: Ian Romanick Signed-off-by: Ian Romanick --- src/glsl/ir.cpp| 6 +- src/glsl/ir.h | 2 ++ src/glsl/ir_clone.cpp | 1 + src/glsl/ir_equals.cpp

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