On Wednesday, July 20, 2016 9:49:42 PM PDT Francisco Jerez wrote:
> ---
> src/compiler/glsl/ast_to_hir.cpp | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/src/compiler/glsl/ast_to_hir.cpp
> b/src/compiler/glsl/ast_to_hir.cpp
> index c050a3f..ac651a9 100644
> ---
On Thu, Jul 28, 2016 at 12:20:25AM +0200, Dieter Nützel wrote:
> Without this GCC 4.8.x throws below error:
>
> error: invalid initialization of non-const reference of type
> 'clover::llvm::compat::raw_ostream_to_emit_file {aka
> llvm::raw_svector_ostream&}'
> from an rvalue of type ''
>
> v2:
On Thu, 2016-07-28 at 15:49 +1000, Timothy Arceri wrote:
> On Tue, 2016-07-19 at 12:40 +0200, Iago Toral Quiroga wrote:
> >
> > From: Connor Abbott
> >
> > ---
> > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff
On Tue, Jul 26, 2016 at 03:02:18PM -0700, Jason Ekstrand wrote:
> Multisample array surfaces on IVB don't support the minimum array element
> surface attribute so it needs to come through the sampler message. We may
> as well just pass it through everything.
> ---
>
On Wednesday, July 27, 2016 2:02:55 PM PDT Emil Velikov wrote:
> From: Emil Velikov
>
> Cc: "12.0"
> Cc: Jason Ekstrand
> Signed-off-by: Emil Velikov
> ---
>
From: Michel Dänzer
Without this, the X server may accumulate stale Present event contexts
if a client ends up creating and destroying DRI drawables for the same
window.
Signed-off-by: Michel Dänzer
---
src/loader/loader_dri3_helper.c | 8
From: Michel Dänzer
Without this, the X server may accumulate stale Present event contexts
if a client creates and destroys multiple swapchains using the same
window.
Signed-off-by: Michel Dänzer
---
NOTE: This patch is completely untested!
On Thu, Jul 28, 2016 at 06:34:44PM +0900, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Without this, the X server may accumulate stale Present event contexts
> if a client ends up creating and destroying DRI drawables for the same
> window.
>
> Signed-off-by: Michel
On Tue, Jul 26, 2016 at 03:02:11PM -0700, Jason Ekstrand wrote:
> Instead, we manually mutate the surface size as needed.
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c| 21 ++---
> src/mesa/drivers/dri/i965/brw_blorp.h| 12
>
On Tue, Jul 26, 2016 at 03:02:17PM -0700, Jason Ekstrand wrote:
> At the moment, the minify operation does nothing because
> params.depth.view.base_level is always zero. However, as soon as we start
> using actual base miplevels and array slices, we are going to need the
> minification. Also, we
On Tue, Jul 26, 2016 at 03:02:10PM -0700, Jason Ekstrand wrote:
> The helper does a full transformation on the surface to turn it into a new
> 2-D single-layer single-level surface representing the original layer and
> level in memory.
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 84
>
On Tue, Jul 26, 2016 at 03:02:16PM -0700, Jason Ekstrand wrote:
> The sampling hardware can handle them ok. It just looks at the tiling to
> determine whether it's the new gen9 1-D layout or the old one. The render
> hardware isn't so smart.
To clarify, this is not needed at this point but
On Tue, Jul 26, 2016 at 03:02:15PM -0700, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 25 -
> 1 file changed, 24 insertions(+), 1 deletion(-)
Reviewed-by: Topi Pohjolainen
>
> diff --git
https://bugs.freedesktop.org/show_bug.cgi?id=97102
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
CC|
https://bugs.freedesktop.org/show_bug.cgi?id=97102
--- Comment #1 from Jan Ziak <0xe2.0x9a.0...@gmail.com> ---
Created attachment 125361
--> https://bugs.freedesktop.org/attachment.cgi?id=125361=edit
gdb.log
--
You are receiving this mail because:
You are the assignee for the bug.
You are the
On Wed, Jul 27, 2016 at 07:37:56PM +0200, Francesco Ansanelli wrote:
> Hello,
>
> unluckily this didn't fix the warning...
> I've done some more compile testing and found this solution:
>
> - static struct ir3_shader_key key = {{0}};
> +static struct ir3_shader_key key = {{{0, 0, 0, 0, 0, 0, 0,
On Wed, Jul 27, 2016 at 02:02:54PM +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> The vkCmdDbgMarker{Begin,End} symbols are exported, yet the json does not
+"advertise"
> that the driver supports the extension. Furturmore the functions are empty
> stubs.
From: Michel Dänzer
Without this, the X server may accumulate stale Present event contexts
if a client performs several video decoding sessions using the same
window.
Signed-off-by: Michel Dänzer
---
src/gallium/auxiliary/vl/vl_winsys_dri3.c |
Running XTS (the X test suite) on Xephyr using glamor running on Xorg,
I stumbled upon an issue:
* XTS causes Xephyr to keep resetting and starting new server generations
* glamor creates a new GLX context for each server generation but re-uses
the same window
This caused Xorg to accumulate
On Wednesday, July 27, 2016 2:02:51 PM PDT Emil Velikov wrote:
> From: Emil Velikov
>
> Hide the internal symbols and annotate the vk_icdGetInstanceProcAddr as public
> since the loader needs it (as of v1 of the loader interface).
>
> Cc: "12.0"
On Friday, July 22, 2016 8:59:00 PM PDT Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 89
>
> 1 file changed, 89 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>
https://bugs.freedesktop.org/show_bug.cgi?id=97102
Bug ID: 97102
Summary: [dri][swr] stack overflow / infinite loop with
GALLIUM_DRIVER=swr
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux
On Tue, Jul 26, 2016 at 03:02:22PM -0700, Jason Ekstrand wrote:
> Now that the generic blorp path uses base level/layer, there's no need to
> make gen8 special.
Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_state.h| 7
>
On Tue, Jul 26, 2016 at 03:02:23PM -0700, Jason Ekstrand wrote:
> The data comes in via ISL in a format that's almost directly usable by the
> hardware so we can avoid some of the conversion headache.
> ---
> src/mesa/drivers/dri/i965/gen6_blorp.c | 34 --
>
From: Emil Velikov
Hide the internal symbols and annotate the vk_icdGetInstanceProcAddr as public
since the loader needs it (since v1 of the loader interface).
v2: Add VISIBILITY_CFLAGS to AM_CFLAGS (Ken)
Cc: "12.0"
Reviewed-by:
On Thu, Jul 28, 2016 at 07:04:08AM -0700, Jason Ekstrand wrote:
>On Jul 28, 2016 7:59 AM, "Pohjolainen, Topi"
><[1]topi.pohjolai...@intel.com> wrote:
>>
>> On Tue, Jul 26, 2016 at 03:02:20PM -0700, Jason Ekstrand wrote:
>> > Since the dawn of time, blorp has used offsets
On Tue, Jul 26, 2016 at 03:02:21PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl_surface_state.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/src/intel/isl/isl_surface_state.c
> b/src/intel/isl/isl_surface_state.c
> index 6febcbf..fb23414 100644
> ---
On 22 July 2016 at 04:27, Nicolas Boichat wrote:
> android.opengl.cts.WrapperTest#testGetIntegerv1 CTS test calls
> eglTerminate, followed by eglReleaseThread. A similar case is
> observed in this bug: https://bugs.freedesktop.org/show_bug.cgi?id=69622,
> where the test
On Tue, Jul 26, 2016 at 03:02:26PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl_surface_state.c | 13 +
> 1 file changed, 13 insertions(+)
Patches 33-35 are:
Reviewed-by: Topi Pohjolainen
>
> diff --git a/src/intel/isl/isl_surface_state.c
>
On Tue, Jul 26, 2016 at 03:11:08PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 121
>
> src/intel/isl/isl.h | 15 +++
> 2 files changed, 136 insertions(+)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index
On Thu, Jul 28, 2016 at 04:50:10PM +0300, Pohjolainen, Topi wrote:
> On Tue, Jul 26, 2016 at 03:11:07PM -0700, Jason Ekstrand wrote:
> > At one point, we were doing this correctly. It must have gotten lost in
> > one of the many rebases.
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c
On Tue, Jul 26, 2016 at 03:11:09PM -0700, Jason Ekstrand wrote:
> In order for the calculations of things such as fast clear rectangles to
> work, we need more details of the auxiliary surface to be correct. In
> particular, we need to be able to trust the width and height fields.
> (These are
On Tue, Jul 26, 2016 at 03:11:07PM -0700, Jason Ekstrand wrote:
> At one point, we were doing this correctly. It must have gotten lost in
> one of the many rebases.
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git
On Jul 28, 2016 9:00 AM, "Pohjolainen, Topi"
wrote:
>
> On Tue, Jul 26, 2016 at 03:11:09PM -0700, Jason Ekstrand wrote:
> > In order for the calculations of things such as fast clear rectangles to
> > work, we need more details of the auxiliary surface to be correct.
On Thu, Jul 28, 2016 at 05:29:44PM +0300, Pohjolainen, Topi wrote:
> On Thu, Jul 28, 2016 at 07:04:08AM -0700, Jason Ekstrand wrote:
> >On Jul 28, 2016 7:59 AM, "Pohjolainen, Topi"
> ><[1]topi.pohjolai...@intel.com> wrote:
> >>
> >> On Tue, Jul 26, 2016 at 03:02:20PM -0700, Jason
From: Emil Velikov
Presently the layer has only a single entry point. As mentioned by Jason the
function does not validate anything that isn't checked elsewhere, thus we can
drop the whole thing.
Cc: "12.0"
Cc: Jason Ekstrand
From: Emil Velikov
v2: Add VISIBILITY_CFLAGS to AM_CFLAGS (Ken)
Cc: "12.0"
Reviewed-by: Jason Ekstrand (v1)
Signed-off-by: Emil Velikov
---
src/intel/isl/Makefile.am | 18
On Thu, Jul 14, 2016 at 05:20:55PM +0100, Emil Velikov wrote:
> On 14 July 2016 at 15:23, Eric Engestrom wrote:
> > On Thu, Jul 14, 2016 at 03:21:20PM +0200, Stefan Dirsch wrote:
> >> This 'last' variable used in FindGLXFunction(...) may become negative,
> >> but has
On Jul 28, 2016 7:59 AM, "Pohjolainen, Topi"
wrote:
>
> On Tue, Jul 26, 2016 at 03:02:20PM -0700, Jason Ekstrand wrote:
> > Since the dawn of time, blorp has used offsets directly to get at
different
> > mip levels and array slices of surfaces. This isn't really
On Fri, Jul 22, 2016 at 6:22 PM, Rob Herring wrote:
> In order to prevent multiple pipe_screens being created in the same
> process, lookup of the DRM FD and reference counting of the pipe_screen
> are needed. Several implementations of this exist in various gallium
>
On 28 July 2016 at 09:21, Eric Engestrom wrote:
> On Wed, Jul 27, 2016 at 07:37:56PM +0200, Francesco Ansanelli wrote:
>> Hello,
>>
>> unluckily this didn't fix the warning...
>> I've done some more compile testing and found this solution:
>>
>> - static struct
We let the user believe we support some transfer formats which we don't.
This can lead to crashes when actually trying to use those formats.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_formats.c | 7 +--
1 file changed, 5 insertions(+), 2
On 07/13/2016 05:47 AM, Timothy Arceri wrote:
---
src/compiler/glsl/shader_cache.cpp | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/compiler/glsl/shader_cache.cpp
b/src/compiler/glsl/shader_cache.cpp
index 08f8e37..8aae1c8 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=77449
Bug 77449 depends on bug 96762, which changed state.
Bug 96762 Summary: [radeonsi,apitrace] Firewatch: nothing rendered in
scrollable (text) areas
https://bugs.freedesktop.org/show_bug.cgi?id=96762
What|Removed
On Thu, Jul 28, 2016 at 6:31 AM, Emil Velikov wrote:
> On 28 July 2016 at 09:21, Eric Engestrom wrote:
>> On Wed, Jul 27, 2016 at 07:37:56PM +0200, Francesco Ansanelli wrote:
>>> Hello,
>>>
>>> unluckily this didn't fix the warning...
>>> I've
Well, I couldn't find anything wrong with this.
Marek
On Sat, Jul 16, 2016 at 6:21 PM, Ilia Mirkin wrote:
> The additional provision of GL_OES_copy_image is that it work for ETC.
> However many desktop GPUs don't have native ETC support, so st/mesa does
> the decoding by
On Tue, Jul 26, 2016 at 03:02:20PM -0700, Jason Ekstrand wrote:
> Since the dawn of time, blorp has used offsets directly to get at different
> mip levels and array slices of surfaces. This isn't really necessary since
> we can just use the base level/layer provided in the surface state. While
>
On Thu, Jul 28, 2016 at 2:25 AM, Iago Toral wrote:
> On Thu, 2016-07-28 at 15:49 +1000, Timothy Arceri wrote:
>> On Tue, 2016-07-19 at 12:40 +0200, Iago Toral Quiroga wrote:
>> >
>> > From: Connor Abbott
>> >
>> > ---
>> >
On Tue, Jul 26, 2016 at 03:11:11PM -0700, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 30
> +---
> 1 file changed, 14 insertions(+), 16 deletions(-)
Looks cleaner:
Reviewed-by: Topi Pohjolainen
>
> diff
Le 25/07/2016 à 18:08, Nicolai Hähnle a écrit :
> From: Nicolai Hähnle
>
> When an application declares varying arrays but does not actually do any
> indirect indexing, some array indices may end up unused in the consuming
> shader, so the number of input slots that
Praise from Caesar is praise indeed :) Is that a R-b, or just saying
it for posterity?
On Thu, Jul 28, 2016 at 7:25 AM, Marek Olšák wrote:
> Well, I couldn't find anything wrong with this.
>
> Marek
>
> On Sat, Jul 16, 2016 at 6:21 PM, Ilia Mirkin wrote:
On Thu, Jul 28, 2016 at 10:10:29AM +0300, Pohjolainen, Topi wrote:
> On Tue, Jul 26, 2016 at 03:02:10PM -0700, Jason Ekstrand wrote:
> > The helper does a full transformation on the surface to turn it into a new
> > 2-D single-layer single-level surface representing the original layer and
> >
On Friday, July 22, 2016 8:58:54 PM PDT Francisco Jerez wrote:
> This is an implementation of non-coherent framebuffer fetch as
> described here [1] working on most hardware generations supported
> by the i965 driver (from Gen5 to Gen8). My plan was to send the
> coherent framebuffer fetch
On Thu, Jul 28, 2016 at 5:35 PM, Ilia Mirkin wrote:
> Praise from Caesar is praise indeed :) Is that a R-b, or just saying
> it for posterity?
Acked-by: Marek Olšák
Marek
___
mesa-dev mailing list
On Tue, Jul 26, 2016 at 03:11:12PM -0700, Jason Ekstrand wrote:
> Instead, we add a bo and offset field to brw_blorp_surface_info and use
> those in the backend.
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c| 10 +---
> src/mesa/drivers/dri/i965/brw_blorp.h| 3 ++-
>
On Jul 28, 2016 8:02 AM, "Pohjolainen, Topi"
wrote:
>
> On Tue, Jul 26, 2016 at 03:02:21PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/isl/isl_surface_state.c | 10 ++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git
On Wed, Jul 27, 2016 at 5:57 PM, Haixia Shi wrote:
> On android platform, the width and height of a native window surface may
> be updated after initialization. It is therefore necessary to query android
> framework for the current width and height.
>
>
tbh, I haven't used anything as ancient as 4.6 in a while.. these days
I'm using 6.1 and even with 5.x I don't remember seeing that warning.
Maybe we can just drop -Wmissing-field-initializers??
BR,
-R
On Thu, Jul 28, 2016 at 1:16 PM, Francesco Ansanelli
wrote:
> Hi,
>
>
On Tue, Jul 26, 2016 at 03:11:12PM -0700, Jason Ekstrand wrote:
> Instead, we add a bo and offset field to brw_blorp_surface_info and use
> those in the backend.
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c| 10 +---
> src/mesa/drivers/dri/i965/brw_blorp.h| 3 ++-
>
On android platform, the width and height of a native window surface may
be updated after initialization. It is therefore necessary to query android
framework for the current width and height.
v2: remove Android specific #ifdef's and just implement the fallback directly
if the platform
On Tue, Jul 26, 2016 at 03:11:13PM -0700, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 43
> ---
> src/mesa/drivers/dri/i965/brw_blorp.h | 4
> 2 files changed, 29 insertions(+), 18 deletions(-)
>
> diff --git
On Thu, Jul 28, 2016 at 09:33:37AM -0700, Jason Ekstrand wrote:
>On Jul 28, 2016 8:02 AM, "Pohjolainen, Topi"
><[1]topi.pohjolai...@intel.com> wrote:
>>
>> On Tue, Jul 26, 2016 at 03:02:21PM -0700, Jason Ekstrand wrote:
>> > ---
>> > src/intel/isl/isl_surface_state.c | 10
Hi,
with my version of the compiler:
gcc (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3
and original code ({0}) I get:
src/gallium/drivers/freedreno/ir3/ir3_shader.c:312:17: warning: missing
braces around initializer [-Wmissing-braces]
src/gallium/drivers/freedreno/ir3/ir3_shader.c:312:17: warning:
Am 29.07.2016 um 00:35 schrieb Matt Turner:
> ---
> src/gallium/auxiliary/Makefile.sources | 1 +
> src/gallium/auxiliary/util/u_bitcast.h | 57
> ++
> 2 files changed, 58 insertions(+)
> create mode 100644 src/gallium/auxiliary/util/u_bitcast.h
>
> diff --git
On Thu, Jul 28, 2016 at 6:55 PM, Rob Clark wrote:
> On Thu, Jul 28, 2016 at 6:36 PM, Rob Herring wrote:
>> On Thu, Jun 30, 2016 at 12:16 PM, Francesco Ansanelli
>> wrote:
>>> ---
>>> src/gallium/drivers/freedreno/a2xx/fd2_screen.c |
This removes unnecessary error checks on return result of mtx_lock
calls as in all other places in MESA source since there is no chance
that mtx_lock returns any of error codes in current implementation.
Signed-off-by: Dongwon Kim
---
src/egl/drivers/dri2/egl_dri2.c | 21
This series gets coherent render target reads working with the i965
driver and exposes the EXT_shader_framebuffer_fetch extension on Gen9+
platforms. It's dependent on the series I sent last week to make the
driver-independent changes to enable framebuffer fetch [1], and the
series to enable
On Thu, Jul 28, 2016 at 6:44 PM, Rob Herring wrote:
> On Thu, Jul 28, 2016 at 1:07 PM, Rob Clark wrote:
>> tbh, I haven't used anything as ancient as 4.6 in a while.. these days
>> I'm using 6.1 and even with 5.x I don't remember seeing that warning.
>
>
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 24
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 ++
4 files changed, 28 insertions(+)
diff --git
---
src/mesa/drivers/dri/i965/brw_disasm.c | 28 +---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index d74d5d5..cca4c8b 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
The reason why it was safe for the scheduler to ignore the side
effects of framebuffer write instructions was that its side effects
couldn't have had any influence on any other instruction in the
program, because we weren't doing framebuffer reads, and framebuffer
writes were always
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index e3215da..85e111d 100644
---
---
src/mesa/drivers/dri/i965/brw_defines.h | 4
src/mesa/drivers/dri/i965/brw_eu.h | 8
src/mesa/drivers/dri/i965/brw_eu_emit.c | 28
3 files changed, 40 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
---
src/mesa/drivers/dri/i965/brw_defines.h| 3 +++
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 20
src/mesa/drivers/dri/i965/brw_shader.cpp |
---
src/mesa/drivers/dri/i965/intel_extensions.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 12bf454..33114db 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++
We weren't checking the fs_inst::target field when comparing whether
two instructions are equal. For FB writes it doesn't matter because
they aren't CSE-able anyway, but this would have become a problem with
FB reads which are expression-like instructions.
---
On Thu, Jul 28, 2016 at 1:07 PM, Rob Clark wrote:
> tbh, I haven't used anything as ancient as 4.6 in a while.. these days
> I'm using 6.1 and even with 5.x I don't remember seeing that warning.
FWIW, clang 3.8 throws the warning too.
Rob
Fix VAAPI YV12/I420 convert to NV12 U/V reversal.
Input order is YVU when this is called.
Signed-off-by: Andy Furniss
---
src/gallium/auxiliary/util/u_video.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/util/u_video.h
Improves performance of OglBatch7 by 4.06851% +/- 1.17925% (n=169) on
Haswell, and cuts ~18k of .text:
text data bss dec hex filename
5824627 28781629384 6141827 5db783 before/i965_dri.so
5806354 28781629384 6123554 5d7022 after/i965_dri.so
Reviewed-by:
---
src/gallium/auxiliary/draw/draw_cliptest_tmp.h | 6 --
src/gallium/auxiliary/draw/draw_pipe_clip.c| 3 ++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_cliptest_tmp.h
b/src/gallium/auxiliary/draw/draw_cliptest_tmp.h
index
---
src/mesa/drivers/dri/i915/intel_clear.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i915/intel_clear.c
b/src/mesa/drivers/dri/i915/intel_clear.c
index 8cf7c142..4306826 100644
--- a/src/mesa/drivers/dri/i915/intel_clear.c
+++
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 38e2c4a..362559f 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++
---
src/gallium/auxiliary/Makefile.sources | 1 +
src/gallium/auxiliary/util/u_bitcast.h | 57 ++
2 files changed, 58 insertions(+)
create mode 100644 src/gallium/auxiliary/util/u_bitcast.h
diff --git a/src/gallium/auxiliary/Makefile.sources
---
src/gallium/drivers/r300/compiler/radeon_inline_literals.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r300/compiler/radeon_inline_literals.c
b/src/gallium/drivers/r300/compiler/radeon_inline_literals.c
index 492f00e..c40a380 100644
---
On Thu, Jul 28, 2016 at 6:36 PM, Rob Herring wrote:
> On Thu, Jun 30, 2016 at 12:16 PM, Francesco Ansanelli
> wrote:
>> ---
>> src/gallium/drivers/freedreno/a2xx/fd2_screen.c |8
>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff
Kenneth Graunke writes:
> On Wednesday, July 20, 2016 9:49:42 PM PDT Francisco Jerez wrote:
>> ---
>> src/compiler/glsl/ast_to_hir.cpp | 13 +
>> 1 file changed, 13 insertions(+)
>>
>> diff --git a/src/compiler/glsl/ast_to_hir.cpp
>>
I did a test with:
static struct ir3_shader_key key;
memset(, 0, sizeof(key));
both gcc and clang seems happy with it.
Let me know if you want me to send a patch.
2016-07-29 1:53 GMT+02:00 Rob Clark :
> On Thu, Jul 28, 2016 at 6:44 PM, Rob Herring wrote:
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On Jul 28, 2016 2:41 AM, "Pohjolainen, Topi"
wrote:
>
> On Tue, Jul 26, 2016 at 03:02:16PM -0700, Jason Ekstrand wrote:
> > The sampling hardware can handle them ok. It just looks at the tiling
to
> > determine whether it's the new gen9 1-D layout or the old one. The
Hi,
On Thursday, July 28, 2016 02:05:08 Fredrik Höglund wrote:
> On Wednesday 27 July 2016, Mathias Fröhlich wrote:
> > Hi,
> >
> > On Thursday, June 23, 2016 16:53:59 Fredrik Höglund wrote:
> > > On Friday 17 June 2016, mathias.froehl...@gmx.net wrote:
> > > > From: Mathias Fröhlich
On Thu, Jul 28, 2016 at 7:58 PM, Roland Scheidegger wrote:
> Am 29.07.2016 um 00:35 schrieb Matt Turner:
>> ---
>> src/gallium/auxiliary/Makefile.sources | 1 +
>> src/gallium/auxiliary/util/u_bitcast.h | 57
>> ++
>> 2 files changed, 58
Good Morning,
On Wednesday, July 27, 2016 12:02:52 Eric Anholt wrote:
> mathias.froehl...@gmx.net writes:
>
> > From: Mathias Fröhlich
> >
> > Similar to _mesa_update_array_format add an argument to
> > avoid calling FLUSH_VERTICES in certain cases.
> > This will be
(Re-adding the list)
On Mon, Jul 25, 2016 at 4:46 AM, tournier.elie wrote:
> Hi.
>
> Thanks for your email.
> It seems that you don't work for nvidia. :P.
>
> 1.
> In my *.shader_test files, I have:
> [require]
> GLSL >= 1.30
>
> Should I still add "#version 130" at the
Fixes the vulkan cts regression in test dEQP-VK.api.info.device.properties
Cc: Mark Janes
Cc: Jason Ekstrand
Signed-off-by: Anuj Phogat
---
src/intel/vulkan/anv_device.c | 6 +++---
1 file changed, 3 insertions(+), 3
On Fri, Jul 29, 2016 at 2:51 AM, Haixia Shi wrote:
> On android platform, the width and height of a native window surface may
> be updated after initialization. It is therefore necessary to query android
> framework for the current width and height.
>
> v2: remove Android
Before my patch, gcc warned about:
src/gallium/drivers/freedreno/a2xx/fd2_screen.c:64:30: warning: comparison
between signed and unsigned integer expressions [-Wsign-compare]
The change suggested:
(fd2_pipe2surface(format) != (enum a2xx_sq_surfaceformat)~0)) {
makes both compiler
On Jul 28, 2016 7:37 PM, "Anuj Phogat" wrote:
>
> Fixes the vulkan cts regression in test dEQP-VK.api.info.device.properties
>
> Cc: Mark Janes
> Cc: Jason Ekstrand
> Signed-off-by: Anuj Phogat
> ---
>
Reviewed-by: Dave Airlie
On 29 July 2016 at 08:35, Matt Turner wrote:
> ---
> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
>
On Wednesday, July 27, 2016 12:36:32 Eric Anholt wrote:
> mathias.froehl...@gmx.net writes:
>
> > From: Mathias Fröhlich
> >
> > Implement the equivalent of vbo_all_varyings_in_vbos for
> > vertex array objects.
>
> One comment on patch 1, but other than that, 2-11
brw_set_dp_read_message() was setting the data cache as send message
SFID on Gen7+ hardware, ignoring the target cache specified by the
caller. Some of the callers were passing a bogus target cache value
as argument relying on brw_set_dp_read_message not to take it into
account. Fix them too.
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