On 24/01/17 12:36 PM, Qiang Yu wrote:
> Third-party can put their backend to a directory configured with
> '--with-gbm-backenddir' and create a /etc/gbm.conf.d/*.conf file
> which contains the backend so file name to overwrite the default
> builtin DRI backend.
>
> The /etc/gbm.conf.d/*.conf will
On Tuesday, December 20, 2016 4:45:28 PM PST Topi Pohjolainen wrote:
> This series introduces new use of brw_blorp_blit_miptrees()/
> brw_blorp_copy_miptrees(). Initial intention was to enable compression
> on SKL already at the time of upload. That, however, didn't help
> benchmarks but quite
Am 25.01.2017 um 03:56 schrieb Michel Dänzer:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue, Jan 24, 2017 at 2:17 PM, Christian König
wrote:
Am 24.01.2017 um 11:44 schrieb Samuel Pitoiset:
On 01/24/2017 11:38 AM, Nicolai Hähnle wrote:
On 24.01.2017 11:34, Samuel
On 25.01.2017 01:17, Ian Romanick wrote:
From: Ian Romanick
All of the functions were passing 1 to _mesa_uniform instead of passing
count.
Fixes 16 unsed parameter warnings like:
main/uniforms.c: In function ‘_mesa_Uniform1i64vARB’:
main/uniforms.c:1692:47: warning:
On Wed 25 Jan 2017, Lionel Landwerlin wrote:
> Looks good to me :
>
> Reviewed-by: Lionel Landwerlin
>
> On 25/01/17 20:12, Chad Versace wrote:
> > Untested, but builds. I wanted to get feedback on this approach before
> > going through the trouble of fetching and
Series is
Reviewed-by: Bas Nieuwenhuizen
On Wed, Jan 25, 2017, at 06:05, Lionel Landwerlin wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> src/compiler/spirv/spirv_to_nir.c | 12
> src/compiler/spirv/vtn_variables.c | 3
Signed-off-by: Lionel Landwerlin
---
src/compiler/spirv/spirv_to_nir.c | 12
src/compiler/spirv/vtn_variables.c | 3 +++
2 files changed, 15 insertions(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index
Signed-off-by: Lionel Landwerlin
---
src/compiler/spirv/spirv_to_nir.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index aecda17271..968502c5fd 100644
---
From: Christian König
Just simply the description of the planes.
Signed-off-by: Christian König
---
src/gallium/auxiliary/vl/vl_video_buffer.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Christian König
That allows us to switch between different
surface formats for different codecs.
Signed-off-by: Christian König
---
src/gallium/state_trackers/vdpau/decode.c | 11 ++-
1 file changed, 6 insertions(+), 5
From: Christian König
Just use whatever the state tracker allocated.
Signed-off-by: Christian König
---
src/gallium/drivers/radeon/radeon_uvd.c | 5 ++---
src/gallium/drivers/radeon/radeon_video.c | 11 ++-
2 files changed, 12
From: Christian König
That should make it possible to use the 16bit surfaces in OpenGL as well.
Signed-off-by: Christian König
---
src/gallium/include/state_tracker/vdpau_dmabuf.h | 2 ++
src/gallium/include/state_tracker/vdpau_funcs.h |
From: Christian König
Same layout as NV12, but 16bit per channel instead of 8.
Signed-off-by: Christian König
---
src/gallium/auxiliary/util/u_format.csv | 2 ++
src/gallium/auxiliary/util/u_format_yuv.c | 19 +++
From: Christian König
No need to have that twice.
Signed-off-by: Christian König
---
src/gallium/state_trackers/va/surface.c | 52 +
1 file changed, 27 insertions(+), 25 deletions(-)
diff --git
From: Christian König
Most likely only partially correct, but at least a start.
Signed-off-by: Christian König
---
src/gallium/state_trackers/va/config.c | 9 ++---
src/gallium/state_trackers/va/image.c | 10 ++
Hi guys,
ok this is completely work in progress and untested except for a compile run.
Most of the stuff necessary should be there for VDPAU, but I'm honestly not
sure how to approach VAAPI.
My main problem at the moment is that I can't get mpv/ffmpeg to decode Main10
content using VDPAU and
Hello list,
The candidate for the Mesa 13.0.4 is now available. Currently we have:
- 61 queued
- 18 nominated (outstanding)
- and 2 rejected patch(es)
With this series we have - multiple fixes for the i965 and radeonsi drivers.
An odd glitch in glxgears and freedreno was resolved, with the
On 01/25/2017 03:55 PM, Christian König wrote:
Am 25.01.2017 um 15:19 schrieb Samuel Pitoiset:
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue, Jan 24, 2017 at 2:17 PM, Christian König
wrote:
Am 24.01.2017 um 11:44
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue, Jan 24, 2017 at 2:17 PM, Christian König
wrote:
Am 24.01.2017 um 11:44 schrieb Samuel Pitoiset:
On 01/24/2017 11:38 AM, Nicolai Hähnle wrote:
On 24.01.2017 11:34, Samuel
Am 25.01.2017 um 16:01 schrieb Samuel Pitoiset:
On 01/25/2017 03:55 PM, Christian König wrote:
Am 25.01.2017 um 15:19 schrieb Samuel Pitoiset:
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue, Jan 24, 2017 at 2:17 PM, Christian König
The second release candidate for Mesa 17.0.0 is now available.
Andres Rodriguez (2):
vulkan/wsi: clarify the severity of lack of DRI3 v2
radv: fix include order for installed headers v2
Bruce Cherniak (1):
swr: Prune empty nodes in CalculateProcessorTopology.
Dave Airlie (1):
On 25/01/17 13:13, Bas Nieuwenhuizen wrote:
On Wed, Jan 25, 2017, at 05:06, Lionel Landwerlin wrote:
Just to confirm, are you fine with the header update triggering warnings
fixed by the following commit?
Can't you update the switches before updating the header? That would
avoid any warnings
Signed-off-by: Lionel Landwerlin
---
src/compiler/spirv/GLSL.std.450.h | 12 --
src/compiler/spirv/spirv.h| 77 ---
src/compiler/spirv/spirv_info.c | 6 +++
3 files changed, 86 insertions(+), 9 deletions(-)
diff
On 01/25/2017 04:01 PM, Samuel Pitoiset wrote:
On 01/25/2017 03:55 PM, Christian König wrote:
Am 25.01.2017 um 15:19 schrieb Samuel Pitoiset:
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue, Jan 24, 2017 at 2:17 PM, Christian König
Am 25.01.2017 um 15:19 schrieb Samuel Pitoiset:
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue, Jan 24, 2017 at 2:17 PM, Christian König
wrote:
Am 24.01.2017 um 11:44 schrieb Samuel Pitoiset:
On 01/24/2017 11:38 AM,
According to GL_KHR_vulkan_glsl, the signature of subpassLoad() is:
gvec4 subpassLoad(gsubpassInput subpass);
gvec4 subpassLoad(gsubpassInputMS subpass, int sample);
So the multisampled case always receives an explicit sample index that we
should use. The current implementation was ignoring
On Wed, Jan 25, 2017, at 05:06, Lionel Landwerlin wrote:
> Just to confirm, are you fine with the header update triggering warnings
> fixed by the following commit?
Can't you update the switches before updating the header? That would
avoid any warnings unless I'm missing stuff.
>
> Thanks!
Can you split the switch changes to a different commit? With that,
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Wed, Jan 25, 2017, at 04:39, Lionel Landwerlin wrote:
> Signed-off-by: Lionel Landwerlin
> ---
>
Reviewed-by: Lionel Landwerlin
On 25/01/17 01:16, Jason Ekstrand wrote:
---
src/vulkan/wsi/wsi_common_wayland.c | 3 ++-
src/vulkan/wsi/wsi_common_x11.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git
Reviewed-by: Lionel Landwerlin
On 25/01/17 00:44, Jason Ekstrand wrote:
---
src/vulkan/wsi/wsi_common_wayland.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/vulkan/wsi/wsi_common_wayland.c
Reviewed-by: Lionel Landwerlin
On 25/01/17 00:44, Jason Ekstrand wrote:
---
src/vulkan/wsi/wsi_common_wayland.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/vulkan/wsi/wsi_common_wayland.c
Looks good to me :) Reviewed-by: Plamena Manolova <
plamena.manol...@intel.com>
On Wed, Jan 25, 2017 at 1:30 AM, Ian Romanick wrote:
> From: Ian Romanick
>
> This is C++, so we can mix code and declarations. Doing so allows
> constification.
>
>
Just to confirm, are you fine with the header update triggering warnings
fixed by the following commit?
Thanks!
On 25/01/17 12:45, Bas Nieuwenhuizen wrote:
Can you split the switch changes to a different commit? With that,
Reviewed-by: Bas Nieuwenhuizen
for the
Don't lower a type conversion between different type sizes
because SEL does't support them, SEL without conditional modifier
just do a raw move.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp | 2 ++
1 file changed, 2
Right, the order can only be overwrite with GBM_BACKEND environment variable.
If we make the DRI backend also configurable by the conf file or give a
"priority"
property to a backend in conf and assign a default priority to DRI backend, your
worry can be addressed.
Regards,
Qiang
Hi all,
Vulkan 1.0.39 was released earlier this week. The specification list a
number of new extensions. In particular the
VK_KHR_shader_draw_parameters extension requires the
SPV_KHR_shader_draw_parameters extension which seems to be part of
SPIRV 1.1.
Here are patches to update the headers as
Signed-off-by: Lionel Landwerlin
---
src/compiler/spirv/spirv_to_nir.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index aecda17271..968502c5fd 100644
---
Signed-off-by: Lionel Landwerlin
---
src/compiler/spirv/GLSL.std.450.h | 12 --
src/compiler/spirv/spirv.h | 77 +++---
src/compiler/spirv/spirv_info.c| 6 +++
src/compiler/spirv/spirv_to_nir.c | 12 ++
https://bugs.freedesktop.org/show_bug.cgi?id=98223
Kenneth Graunke changed:
What|Removed |Added
Status|NEW |RESOLVED
This new query returns the current visible usage of VRAM accessed
by the CPU. It will return 0 on radeon because it's unimplemented.
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/radeon/r600_query.c | 7 +++
The spec section 5.2 says:
"vkAllocateCommandBuffers can be used to create multiple command
buffers. If the creation of any of those command buffers fails, the
implementation must destroy all successfully created command buffer
objects from this command, set all entries of the
Oops...
Reviewed-by: Jason Ekstrand
Cc: "17.0"
On Wed, Jan 25, 2017 at 7:28 AM, Iago Toral Quiroga
wrote:
> According to GL_KHR_vulkan_glsl, the signature of subpassLoad() is:
>
> gvec4 subpassLoad(gsubpassInput
R600_DEBUG="info" can be used to display that size, as well as
the total amount of VRAM/GTT.
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/radeon/r600_pipe_common.c | 1 +
src/gallium/drivers/radeon/radeon_winsys.h| 1 +
On 24 January 2017 at 18:07, Eric Engestrom wrote:
> Khronos introduced a new macro (suggested by Google) to avoid using
> C-style casts in C++ code, as those generate warnings.
>
> Khronos Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16113
>
Am 25.01.2017 um 16:12 schrieb Samuel Pitoiset:
On 01/25/2017 04:01 PM, Samuel Pitoiset wrote:
On 01/25/2017 03:55 PM, Christian König wrote:
Am 25.01.2017 um 15:19 schrieb Samuel Pitoiset:
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
On 25/01/17 12:05 AM, Marek Olšák wrote:
On Tue,
I thought I looked for this when doing maintenance1... oh well.
Reviewed-by: Jason Ekstrand
Cc: "13.0 17.0"
On Wed, Jan 25, 2017 at 8:29 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> The spec section 5.2 says:
>
>
On Wed, Jan 25, 2017 at 8:29 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> The spec section 5.2 says:
>
>"vkAllocateCommandBuffers can be used to create multiple command
>buffers. If the creation of any of those command buffers fails, the
>implementation must destroy
On Wed, Jan 25, 2017 at 4:45 AM, Bas Nieuwenhuizen
wrote:
> Can you split the switch changes to a different commit? With that,
>
Agreed,
Reviewed-by: Jason Ekstrand
> Reviewed-by: Bas Nieuwenhuizen
>
> for the
https://bugs.freedesktop.org/show_bug.cgi?id=97879
--- Comment #55 from Timothee Besset ---
Rocket League uses an async I/O thread to stream in content in the background.
That thread works off of a queue and only does disk reads and decompression (it
doesn't issue any OpenGL
mesa 17.0 is scheduled to be released earlier than llvm-4.0, so imho no,
not worth the effort.
I certainly won't stop anyone from porting the necessary changes and
doing some minimal testing, though...
Roland
Am 25.01.2017 um 17:47 schrieb Nicolai Hähnle:
> I think we can consider it, but note
To make distributions lives easier, can we please support llvm-4.0 in
the mesa-13.0 branch?
It currently fails to compile:
https://bugs.gentoo.org/show_bug.cgi?id=606608
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
On 01/25/2017 05:05 PM, Christian König wrote:
Am 25.01.2017 um 16:12 schrieb Samuel Pitoiset:
On 01/25/2017 04:01 PM, Samuel Pitoiset wrote:
On 01/25/2017 03:55 PM, Christian König wrote:
Am 25.01.2017 um 15:19 schrieb Samuel Pitoiset:
On 01/25/2017 03:56 AM, Michel Dänzer wrote:
I think we can consider it, but note that it's not entirely trivial. In
addition to compile fixes, there were changes in intrinsics that are
relevant for radeonsi.
Nicolai
On 25.01.2017 17:19, Matt Turner wrote:
To make distributions lives easier, can we please support llvm-4.0 in
the
Reviewed-by: Nicolai Hähnle
On 25.01.2017 16:56, Samuel Pitoiset wrote:
This new query returns the current visible usage of VRAM accessed
by the CPU. It will return 0 on radeon because it's unimplemented.
Signed-off-by: Samuel Pitoiset
---
On Tue 24 Jan 2017, Eric Engestrom wrote:
> Khronos introduced a new macro (suggested by Google) to avoid using
> C-style casts in C++ code, as those generate warnings.
>
> Khronos Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16113
> Signed-off-by: Eric Engestrom
The struct was deleted by:
commit efe9d1cde3340d3a9d17e5560b609a4fb839d43d
Author: Edward O'Callaghan
Subject: anv: Clean up some unused variables
Unlike the original anv_common, the new one has a non-const pNext
pointer because we will use it for the output
Having read through this code, I think I like this approach. It seems to
be the most easily extensible thing we can do. Series is
Reviewed-by: Jason Ekstrand
On Wed, Jan 25, 2017 at 12:12 PM, Chad Versace
wrote:
> ---
>
On Wed, Jan 25, 2017 at 12:12 PM, Chad Versace
wrote:
> ---
> src/intel/vulkan/anv_device.c | 90 ++
>
> src/intel/vulkan/anv_formats.c | 53 +
> src/intel/vulkan/anv_private.h | 18 +
> 3 files
Ian Romanick writes:
> On 01/24/2017 03:26 PM, Francisco Jerez wrote:
>> This does point at the front-end emitting silly code that could have
>> been optimized out, but the current fsign implementation would emit
>> bogus IR if abs was set for the argument (because it would
On Wed 25 Jan 2017, Jason Ekstrand wrote:
> On Wed, Jan 25, 2017 at 12:12 PM, Chad Versace
> wrote:
>
> The struct was deleted by:
> commit efe9d1cde3340d3a9d17e5560b609a4fb839d43d
> Author: Edward O'Callaghan
>
Looks good to me :
Reviewed-by: Lionel Landwerlin
On 25/01/17 20:12, Chad Versace wrote:
Untested, but builds. I wanted to get feedback on this approach before
going through the trouble of fetching and building the newest CTS. If
the review feedback is good,
Christian König wrote:
Hi guys,
ok this is completely work in progress and untested except for a compile run.
Most of the stuff necessary should be there for VDPAU, but I'm honestly not
sure how to approach VAAPI.
These regress R9 285 8bit h264 vaapi decode with mpv,
[vd] Pixel formats
Hi Christian,
2017-01-25 15:41 GMT+01:00 Christian König :
> Hi guys,
>
> ok this is completely work in progress and untested except for a compile
> run.
>
> Most of the stuff necessary should be there for VDPAU, but I'm honestly
> not sure how to approach VAAPI.
>
> My
https://bugs.freedesktop.org/show_bug.cgi?id=97879
--- Comment #56 from Grazvydas Ignotas ---
Is the async I/O thread doing a lot of memory allocations?
If so, perhaps the malloc implementation is slowed down by having large amount
of small allocs/frees from shader compiles
On Tue 24 Jan 2017, Jason Ekstrand wrote:
> On Tue, Jan 24, 2017 at 11:25 AM, Emil Velikov
> wrote:
>
> On 24 January 2017 at 18:02, Jason Ekstrand wrote:
> > On Tue, Jan 24, 2017 at 9:03 AM, Matt Turner wrote:
>
Series Reviewed-by: Jordan Justen
On 2017-01-24 17:30:11, Ian Romanick wrote:
> These are some patches that I wrote ages ago... the initial versions
> pre-date Mesa's ARB_gpu_shader_fp64 support. This was part of a larger
> effort that got bogged down and eventually
On Wed 25 Jan 2017, Jason Ekstrand wrote:
>
>
> On Wed, Jan 25, 2017 at 12:12 PM, Chad Versace
> wrote:
>
> +VkResult vkGetPhysicalDeviceImageFormatProperties2KHR(
>
>
> This needs to be anv_
Oops.
___
mesa-dev
We really use the depth block for the blits.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_formats.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index
Signed-off-by: Bas Nieuwenhuizen
Tested-by: Andres Rodriguez
---
src/amd/vulkan/radv_formats.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index f56f67c400e..c968cefc9c7
On Wed 25 Jan 2017, Lionel Landwerlin wrote:
> The spec section 5.2 says:
>
>"vkAllocateCommandBuffers can be used to create multiple command
>buffers. If the creation of any of those command buffers fails, the
>implementation must destroy all successfully created command buffer
>
https://bugs.freedesktop.org/show_bug.cgi?id=97879
Clément Guérin changed:
What|Removed |Added
CC||geecko@free.fr
On Wed, Jan 25, 2017 at 10:46 PM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, Jan 24, 2017 at 03:45:48PM -0800, Jason Ekstrand wrote:
> > The previous version was sort-of strapped on in that it just adjusted
> > the blit rectangle and trusted in the fact that we would use
On Tue, Jan 24, 2017 at 03:45:49PM -0800, Jason Ekstrand wrote:
> This commit adds support for using both R24_UNORM_X8_TYPELESS and
> R9G9B9E5_SHAREDEXP as destination formats even though the hardware does
> not support rendering to them. This is done by using a different format
> and emitting
On Tue, Jan 24, 2017 at 03:45:51PM -0800, Jason Ekstrand wrote:
> ---
> src/intel/blorp/blorp_blit.c | 4
> 1 file changed, 4 insertions(+)
Patches 3 and 4 are:
Reviewed-by: Topi Pohjolainen
Patch 2 looks good also. I just need to study the E9-math some more.
Applications may delete a shader program, create a new one, and bind it
before the next draw. With terrible luck, malloc may randomly return a
chunk of memory for the new gl_program that happened to be the exact
same pointer as our previously bound gl_program. In this case, our
logic to detect
On Tue, Jan 24, 2017 at 03:45:54PM -0800, Jason Ekstrand wrote:
> Previously, blorp could only blit into something that was renderable.
> Thanks to recent additions to blorp, it can now blit into basically
> anything so long as it isn't compressed.
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c |
On Tue, Jan 24, 2017 at 03:45:48PM -0800, Jason Ekstrand wrote:
> The previous version was sort-of strapped on in that it just adjusted
> the blit rectangle and trusted in the fact that we would use texelFetch
> and round to the nearest integer to ensure that the component positions
> matched.
On Wed, Jan 25, 2017 at 10:51:53PM -0800, Jason Ekstrand wrote:
>On Wed, Jan 25, 2017 at 10:46 PM, Pohjolainen, Topi
><[1]topi.pohjolai...@gmail.com> wrote:
>
>On Tue, Jan 24, 2017 at 03:45:48PM -0800, Jason Ekstrand wrote:
>> The previous version was sort-of strapped on in that
On Wed, Jan 25, 2017 at 11:14:32PM -0800, Kenneth Graunke wrote:
> Applications may delete a shader program, create a new one, and bind it
> before the next draw. With terrible luck, malloc may randomly return a
> chunk of memory for the new gl_program that happened to be the exact
> same pointer
Ouch...
Reviewed-by: Jason Ekstrand
On Wed, Jan 25, 2017 at 11:14 PM, Kenneth Graunke
wrote:
> Applications may delete a shader program, create a new one, and bind it
> before the next draw. With terrible luck, malloc may randomly return a
> chunk
https://bugs.freedesktop.org/show_bug.cgi?id=97879
--- Comment #58 from Vladislav Egorov ---
Correction - in fact I only tested radeon+radeonsi pair. I will try
amdgpu+radeonsi later.
--
You are receiving this mail because:
You are the assignee for the
https://bugs.freedesktop.org/show_bug.cgi?id=97967
--- Comment #10 from Vinson Lee ---
Can someone provide a patch with the print statements wanted to test?
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the
Kepler and up unfortunately only support up to 8 constbufs. We work
around this by loading from constbufs as if they were storage buffers.
However we were not consistently applying limits to loads from these
buffers. Make sure to do the same thing we do for storage buffers.
Fixes
On Wed, Jan 25, 2017 at 11:51 PM, Ilia Mirkin wrote:
> Kepler and up unfortunately only support up to 8 constbufs. We work
> around this by loading from constbufs as if they were storage buffers.
> However we were not consistently applying limits to loads from these
>
When a texture is immutable, we can't tack on extra levels
after-the-fact like we could with glTexImage. So check against that
level limit and return an error if it's surpassed.
The spec is a little unclear in that it says to check if "level is not a
supported texture level", however that is
All the other calls to retrieve the attachment have been covered except
this one - return the proper error for attachment points that are valid
enums but out of bound for the driver.
Fixes GL45-CTS.geometry_shader.layered_fbo.fb_texture_invalid_attachment
Signed-off-by: Ilia Mirkin
https://bugs.freedesktop.org/show_bug.cgi?id=97879
--- Comment #57 from Vladislav Egorov ---
Simple way to reproduce the bug - launch the game, then go to "Options" menu
and get multi-second (>5s) freeze.
I've tried to launch Rocket League on several GPUs. Graphics
This fixes
GL45-CTS.tessellation_shader.tessellation_shader_tessellation.max_in_out_attributes
likely among others on nouveau. We only support 30 patch varyings (as 2
vec4 slots end up being used for tess level settings), but were getting
32 exposed.
Signed-off-by: Ilia Mirkin
On 25/01/17 11:19 PM, Samuel Pitoiset wrote:
> On 01/25/2017 03:56 AM, Michel Dänzer wrote:
>> On 25/01/17 12:05 AM, Marek Olšák wrote:
>>> On Tue, Jan 24, 2017 at 2:17 PM, Christian König
>>> wrote:
Am 24.01.2017 um 11:44 schrieb Samuel Pitoiset:
> On 01/24/2017
We are casting from a signed 32bit int to an unsigned 16bit int
so shift 15 bits rather than 16.
---
src/mesa/drivers/dri/i965/brw_inst.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_inst.h
b/src/mesa/drivers/dri/i965/brw_inst.h
index
jip should always be negative here as its the result of
do instruction - while instruction.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 257757f..f4bec33
Many many many compute shaders only define a 1- or 2-dimensional block,
but then continue to use system values that take the full 3d into
account (like gl_LocalInvocationIndex, etc). So for the special case
that a dimension is exactly 1, we know that the thread id along that
axis will always be 0,
Apparently GL 4.5 requires 14 of these (there's a "*" in the spec, but
it's unclear what it refers to). We need to expose an extra binding
point for the "program parameters", which means this must be 15. Remove
the last vestige of the "use c14 for immediates" idea.
Fixes
On Mon, Jan 23, 2017 at 4:54 PM, Matt Turner wrote:
> These files belong to the vulkan loader.
I forgot to add the tag, but this (commit 045f38a5075) should go to
the 17.0 branch. Emil, can you see to that?
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https://bugs.freedesktop.org/show_bug.cgi?id=93375
Vedran Miletić changed:
What|Removed |Added
Status|NEW |RESOLVED
Is there something we need to do here to plumb gl_DrawId through
correctly? I'm pretty sure we have exactly zero code for that.
On Wed, Jan 25, 2017 at 10:55 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Enables 10 tests from:
>
>dEQP-VK.draw.shader_draw_parameters.*
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=93375
Vedran Miletić changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |ved...@miletic.net
On Mon, Jan 23, 2017 at 10:21:46PM -0800, Ben Widawsky wrote:
> This patch provides the support (and comments) for allocating the BO
> with space for the CCS buffer just underneath it.
>
> This patch was originally titled:
> "i965: Create correctly sized mcs for an image"
>
> In order to make
On Mon, Jan 23, 2017 at 10:21:55PM -0800, Ben Widawsky wrote:
> We no longer allocate a miptree for the mcs_buf, so this is not a useful
> assertion.
>
> While here, move the CCS disabling so that we only conditionally shut it
> off. This helps us dtrt later when CCS is used in more places.
>
>
On Mon, Jan 23, 2017 at 10:21:42PM -0800, Ben Widawsky wrote:
> This code will disable actually creating these buffers for the scanout,
> but it puts the allocation in place.
>
> Primarily this patch is split out for review, it can be squashed in
> later if preferred.
>
> v2:
> assert(mt->offset
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