Re: [Mesa-dev] [PATCH v3 02/14] i965/miptree: Allocate HiZ up-front

On Mon, Jul 17, 2017 at 03:29:32PM +0300, Pohjolainen, Topi wrote: > On Fri, Jul 14, 2017 at 03:22:51PM -0700, Chad Versace wrote: > > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > > HiZ, like MCS and CCS_E, can compress more than just clear colors so we > > > want it turned on whenever the

[Mesa-dev] [Bug 101814] es2gears_wayland only achieves 40 FPS (in Weston and Gnome Shell)

https://bugs.freedesktop.org/show_bug.cgi?id=101814 --- Comment #2 from Daniel Stone --- FWIW, weston/clients/simple-egl.c (and simple-shm.c for software rendering) is a _much_ better reference client than the Mesa ones; eglut really is a pretty terrible interface. -- You

[Mesa-dev] [Bug 101814] es2gears_wayland only achieves 40 FPS (in Weston and Gnome Shell)

https://bugs.freedesktop.org/show_bug.cgi?id=101814 Daniel Stone changed: What|Removed |Added CC|

[Mesa-dev] [Bug 101814] es2gears_wayland only achieves 40 FPS (in Weston and Gnome Shell)

https://bugs.freedesktop.org/show_bug.cgi?id=101814 --- Comment #1 from Daniel Stone --- Oh wow, eglut_wayland really was super broken. Fix on the list: https://patchwork.freedesktop.org/patch/167336/ Thanks for the report! -- You are receiving this mail because: You are

[Mesa-dev] [PATCH 5/5] radeonsi: bail out instead of crashing if the main shader part failed to compile

From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index af93ca1..30de03f 100644 ---

[Mesa-dev] [PATCH 1/5] radeonsi/gfx9: fix vertex idx in ES with multiple waves per threadgroup

From: Nicolai Hähnle Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/drivers/radeonsi/si_shader.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index

[Mesa-dev] [PATCH 2/5] radeonsi/gfx9: always wrap GS and TCS in an if-block

From: Nicolai Hähnle With merged ESGS shaders, the GS part of a wave may be empty, and the hardware gets confused if any GS messages are sent from that wave. Since S_SENDMSG is executed even when EXEC = 0, we have to wrap even non-monolithic GS shaders in an if-block, so

[Mesa-dev] [PATCH 3/5] radeonsi/gfx9: dump previous stage LLVM IR for merged shaders

From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 9aeda49..91f2ea3 100644 ---

[Mesa-dev] [PATCH 4/5] radeonsi: update a comment for merged shaders

From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 91f2ea3..af93ca1 100644 ---

Re: [Mesa-dev] [PATCH 1/2] eglut_wayland: Drive event loop by frame events

Hi, Sorry, I have no idea why --subject-prefix didn't actually work. These two patches are for the demos repo. Cheers, Daniel On 17 July 2017 at 12:00, Daniel Stone wrote: > The eglut_wayland event loop attempted to use frame events to drive the > redraw loop. However,

[Mesa-dev] [PATCH 1/2] eglut_wayland: Drive event loop by frame events

The eglut_wayland event loop attempted to use frame events to drive the redraw loop. However, the frame events were being requested after eglSwapBuffers (i.e. wl_surface_commit()), which means they would not actually activate until the next eglSwapBuffers. This was being balanced out by

[Mesa-dev] [PATCH 2/2] egl: Build some OpenGL demos for Wayland

Signed-off-by: Daniel Stone --- src/egl/opengl/.gitignore| 4 src/egl/opengl/Makefile.am | 18 +- src/egl/opengles2/.gitignore | 2 ++ 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/src/egl/opengl/.gitignore

Re: [Mesa-dev] [PATCH 03/11] anv/cmd_buffer: Properly handle render passes with 0 attachments

On Tue, 2017-07-11 at 17:04 -0700, Jason Ekstrand wrote: > We were early returning and never created the NULL surface state. > > Cc: mesa-sta...@lists.freedesktop.org This patch fixes a bug that affected me. Tested-by: James Legg I submitted a similar patch before

Re: [Mesa-dev] [PATCH] anv: remove early out from cmd_buffer_setup_attachments

On Fri, 2017-07-14 at 18:06 +0100, Lionel Landwerlin wrote: > Hi James, > > I think this patch from Jason might fix the same problem :  > https://patchwork.freedesktop.org/patch/166280/ Yes it does. I'll drop my patch if and when Jason's is pushed to master. Thanks, James.

Re: [Mesa-dev] [PATCH v3 02/14] i965/miptree: Allocate HiZ up-front

On Fri, Jul 14, 2017 at 03:22:51PM -0700, Chad Versace wrote: > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > HiZ, like MCS and CCS_E, can compress more than just clear colors so we > > want it turned on whenever the miptree is being used as a depth > > attachment. It's theoretically possible for

Re: [Mesa-dev] [PATCH 2/2] i965: Check if the modifier is supported in select_best_modifier

On 17 July 2017 at 01:48, Jason Ekstrand wrote: > Otherwise, if a client gave us a list of modifiers that contained a > modifier we understand but which is not supported on the hardware, we > might return that one and then fail to create the image. Reviewed-by: Daniel Stone

[Mesa-dev] [PATCH] radv: Set the RADEON_SURF_OPTIMIZE_FOR_SPACE flag for images

This looks like a regression from df301237940 ("radv: use ac_compute_surface"). Before that, the opt4Space addrlib flag was set to true unless the image has FMASK (ac_compute_surface will similarly only set that flag for images without FMASK). This saves multiple gigabytes of VRAM on one of our

Re: [Mesa-dev] [PATCH 5/6] radeonsi: use slot indexes for bindless handles

On 07/15/2017 02:54 AM, Marek Olšák wrote: On Wed, Jul 5, 2017 at 1:42 PM, Nicolai Hähnle wrote: On 04.07.2017 15:05, Samuel Pitoiset wrote: Using VRAM address as bindless handles is not a good idea because we have to use LLVMIntToPTr and the LLVM CSE pass can't

Re: [Mesa-dev] [PATCH v3 10/14] i965/miptree: Allocate mcs_buf for an image's CCS

On Wed, Jul 12, 2017 at 09:23:21PM -0700, Jason Ekstrand wrote: > From: Ben Widawsky > > This code will disable actually creating these buffers for the scanout, > but it puts the allocation in place. > > Primarily this patch is split out for review, it can be squashed in >

[Mesa-dev] [PATCH] r600: Add support for B5G5R5A1.

From: Michal Srb Fixes rendercheck errors when using glamor acceleration in X server. --- Fixes rendercheck errors on tests with r5g5b5 and b5g5r5. For example `rendercheck -t blend -f r5g5b5,a8r8g8b8`. I am not completely sure if it is correct. I wasn't able to run all piglit

Re: [Mesa-dev] [PATCH v6 2/6] mesa/st: glsl_to_tgsi: implement new temporary register lifetime tracker

Just a few comments while updating the patch: > One more comment about the debug_log: as written, it will getenv  > every time. It would be better to use the approach taken by e.g.  > should_clone_nir() in compiler/nir/nir.h. There's no reason to have  > a whole class for this. Actually, 

Re: [Mesa-dev] [PATCH 1/2] i965: Rework the modifier info map

Hi, On 17 July 2017 at 01:48, Jason Ekstrand wrote: > This commit splits the mapping in half. The modifier_infos table now > only contains the modifier and the since_gen field. The tiling bits > have been moved into a table in modifier_to_tiling as that's the only > place

[Mesa-dev] [PATCH 09/16] i965/miptree: Stop setting total_width/height for existing bo

Now that image surface vertical slice calculator doesn't depend on total_height, total dimensions are only needed when new buffer objects are created. Therefore one can safely ignore them when miptrees are created for already exisiting buffer objects. Signed-off-by: Topi Pohjolainen

[Mesa-dev] [PATCH 08/16] i965/wm: Use isl for determining vertical slice pitch

This helps to drop dependency to miptree::total_height which is used in brw_miptree_get_vertical_slice_pitch(). This is also readily compatible once miptree itself is isl based. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c |

[Mesa-dev] [PATCH 10/16] i965/miptree: Add pitch override for imported buffer objects

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index

[Mesa-dev] [PATCH 12/16] i965: Use offset helper in intel_readpixels_tiled_memcpy()

providing support for isl based. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c

[Mesa-dev] [PATCH 11/16] i965/miptree: Pass flags instead of explicit tiling to surface creator

allowing one to isl tiling filter. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 13/16] i965/wm: Use level offsets directly

dropping dependency to slice table. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c

[Mesa-dev] [PATCH 16/16] i965/gen4: Set tile offsets to zero after depth rebase

Current logic calls intel_renderbuffer_set_draw_offset() which in turn tries to calculate x and y offset against layer/level settings that are against the original miptree actually having sufficient levels/layers. This returns correctly x=0 y=0 regardless of the given layer/level only because one

[Mesa-dev] [PATCH 07/16] i965/miptree: Check for miptree_create() failures

Rest of the function assumes it always succeeds. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

Re: [Mesa-dev] [PATCH] gbm: avoid null pointer dereference

Thanks Daniel for a detailed explain with link, that was totally my misunderstood. ignore this patch ^^. 2017-07-17 23:20 GMT+09:00 Daniel Stone : > Hi, > > On 17 July 2017 at 15:02, Gwan-gyeong Mun wrote: >> gbm_dri_surface_create() might create

Re: [Mesa-dev] [PATCH 01/16] i965/miptree: Set refcount before failing via _release()

On 17 July 2017 at 14:34, Topi Pohjolainen wrote: > Otherwise one wraps uint to UINT_MAX via -1. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 ++- > 1 file changed, 2 insertions(+), 1

Re: [Mesa-dev] [PATCH] swr: remove unneeded fallback strcasecmp define

Reviewed-by: Tim Rowley > On Jul 17, 2017, at 9:34 AM, Emil Velikov wrote: > > From: Emil Velikov > > The last user of the function was removed with earlier commit. > > Fixes: 50842e8a931 ("swr: replace

Re: [Mesa-dev] [PATCH 03/16] i965: Mark read-only args as const in intel_miptree_supports_hiz()

On 17 July 2017 at 14:34, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 03/11] anv/cmd_buffer: Properly handle render passes with 0 attachments

On Mon, Jul 17, 2017 at 4:18 AM, James Legg wrote: > On Tue, 2017-07-11 at 17:04 -0700, Jason Ekstrand wrote: > > We were early returning and never created the NULL surface state. > > > > Cc: mesa-sta...@lists.freedesktop.org > > This patch fixes a bug that affected

Re: [Mesa-dev] [PATCH 1/2] i965: Rework the modifier info map

Hi, On 17 July 2017 at 15:39, Jason Ekstrand wrote: > On Mon, Jul 17, 2017 at 2:24 AM, Daniel Stone wrote: >> On 17 July 2017 at 01:48, Jason Ekstrand wrote: >> > This commit splits the mapping in half. The modifier_infos table

Re: [Mesa-dev] [PATCH] gbm: fix typo in doxygen comment

On 17 July 2017 at 15:01, Gwan-gyeong Mun wrote: > This fixes the misspelling of gbm_bo_import api param. > Fixes: 44f066b9ffb ("gbm: Add new gbm_bo_import entry point") Reviewed-by: Emil Velikov I'll push this later on today, barring any

Re: [Mesa-dev] [PATCH] gbm: avoid null pointer dereference

Hi, On 17 July 2017 at 15:02, Gwan-gyeong Mun wrote: > gbm_dri_surface_create() might create gbm_surface without modifiers. > therefore, gbm_dri_surface_destroy() needs to check modifiers is null or not > prior to free it. This is not true. The code here does not perform a

Re: [Mesa-dev] [PATCH v2] st/va: Fix scaling list ordering for H.265

On 17 July 2017 at 14:50, Christian König wrote: > Am 15.07.2017 um 20:51 schrieb Mark Thompson: >> >> Mesa here requires the scaling lists in diagonal scan order, but >> VAAPI passes them in raster scan order. Therefore, rearrange the >> elements when copying. >> >> v2:

Re: [Mesa-dev] [PATCH v3 10/14] i965/miptree: Allocate mcs_buf for an image's CCS

On Mon, Jul 17, 2017 at 2:47 AM, Pohjolainen, Topi < topi.pohjolai...@gmail.com> wrote: > On Wed, Jul 12, 2017 at 09:23:21PM -0700, Jason Ekstrand wrote: > > From: Ben Widawsky > > > > This code will disable actually creating these buffers for the scanout, > > but it puts the

[Mesa-dev] [PATCH 05/16] i965: Make irb::mt_layer logical instead of physical

same as irb::layer_count. In case of copies and blits msaa surfacas already fall to blorp which natively works with logical slices. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 44 +---

[Mesa-dev] [PATCH 01/16] i965/miptree: Set refcount before failing via _release()

Otherwise one wraps uint to UINT_MAX via -1. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] i965: Prep work for transitioning to ISL

Here are miscellanious "little" things now and there making the actual transition cleaner/simpler. These sit on top of Jason's ccs-modifiers. Topi Pohjolainen (16): i965/miptree: Set refcount before failing via _release() i965/miptree: Use > 1 instead of > 0 to check for multisampling

[Mesa-dev] [PATCH 03/16] i965: Mark read-only args as const in intel_miptree_supports_hiz()

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index

[Mesa-dev] [PATCH 02/16] i965/miptree: Use > 1 instead of > 0 to check for multisampling

Checking against zero currently works as single sampling is represented with zero. Once one moves to isl single sampling really has sample number of one. This keeps later patches simpler. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 4

[Mesa-dev] [PATCH 04/16] i965/tex: Use offset helper instead of accessing table directly

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex_image.c| 6 -- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 6 -- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c

[Mesa-dev] [PATCH 06/16] i965/miptree: Do not rely on msaa type to decide if aux is needed

Once the driver moves to ISL both compressed and uncompressed have the same type. One needs to tell them apart by other means. This can be done by checking the existence of mcs_buf. There is a short period of time within intel_miptree_create() where mcs_buf doesn't exist yet (between calls to

Re: [Mesa-dev] [PATCH v2] st/va: Fix scaling list ordering for H.265

Am 15.07.2017 um 20:51 schrieb Mark Thompson: Mesa here requires the scaling lists in diagonal scan order, but VAAPI passes them in raster scan order. Therefore, rearrange the elements when copying. v2: Move scan tables to vl_zscan.c. Fix type in size assertion. Signed-off-by: Mark

[Mesa-dev] [PATCH 1.5/14] i965/miptree: Add an intel_tiling_supports_hiz helper

We need this split for the same reason that we need the split for CCS: intel_miptree_supports_hiz is called *before* we choose the actual tiling. Adding a tiling_supports_hiz helper lets choose_aux_usage more accurately decide whether or not to enable hiz. In particular, this prevents us from

[Mesa-dev] [PATCH] egl/drm: Format code in platform_drm.c according to style guide.

This is a tiny housekeeping patch which does the following: * Limit lines to 78 or fewer characters. According to the mesa coding style guidelines. Signed-off-by: Mun Gwan-gyeong --- src/egl/drivers/dri2/platform_drm.c | 3 ++- 1 file changed, 2 insertions(+), 1

Re: [Mesa-dev] [PATCH] egl/drm: add going out of the loop when the designated buffer is found

On 17 July 2017 at 16:03, Gwan-gyeong Mun wrote: > Because the color_buffers have a each unique bo, if the designated buffer is > found, release_buffer() can go out the loop which seaches the buffer. > Indeed. Currently we waste a couple of CPU cycles to check the remaining

[Mesa-dev] [PATCH 1/2] configure/swr: configurable swr architectures

Allow configuration of the SWR architecture depend libraries we build for with --with-swr-archs. Maintains current behavior by defaulting to avx,avx2. Scons changes made to make it still build and work, but without the changes for configuring which architectures. --- configure.ac

[Mesa-dev] [PATCH 0/2] swr: add knl and skx architectutes

Patch set allows the swr architectures built to be specified at configure time, and adds KNL and SKX as possible targets (not built by default). Tim Rowley (2): configure/swr: configurable swr architectures configure/swr: add KNL and SKX architecture targets configure.ac

[Mesa-dev] [PATCH 2/2] configure/swr: add KNL and SKX architecture targets

Not built by default. --- configure.ac | 16 ++ src/gallium/drivers/swr/Makefile.am| 38 ++ src/gallium/drivers/swr/swr_loader.cpp | 20 +- 3 files changed, 73 insertions(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH 1/2] i965: Rework the modifier info map

On Mon, Jul 17, 2017 at 2:24 AM, Daniel Stone wrote: > Hi, > > On 17 July 2017 at 01:48, Jason Ekstrand wrote: > > This commit splits the mapping in half. The modifier_infos table now > > only contains the modifier and the since_gen field. The

Re: [Mesa-dev] Mesa 17.2.0 release plan

On 16 July 2017 at 06:35, Jason Ekstrand wrote: > n Fri, Jul 7, 2017 at 11:07 AM, Emil Velikov > wrote: >> >> Hi all, >> >> As you may have noticed, for a little while now we've had the release >> plan on the mesa3d.org website [1]. >> >> Here is

[Mesa-dev] [PATCH] egl/drm: add going out of the loop when the designated buffer is found

Because the color_buffers have a each unique bo, if the designated buffer is found, release_buffer() can go out the loop which seaches the buffer. Signed-off-by: Mun Gwan-gyeong --- src/egl/drivers/dri2/platform_drm.c | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [Mesa-dev] [PATCH 02/16] i965/miptree: Use > 1 instead of > 0 to check for multisampling

On 17 July 2017 at 14:34, Topi Pohjolainen wrote: > Checking against zero currently works as single sampling is > represented with zero. Once one moves to isl single sampling > really has sample number of one. > > This keeps later patches simpler. > After ISL lands we

[Mesa-dev] [PATCH 15/16] i965: Refactor check for separate stencil

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 24 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 14/16] intel/blorp/gen4: Drop cube map flag for single face copy

This will falsely trigger an assert on number of lyaers once isl is prepared for 3D layouts of Gen4 cube maps. Signed-off-by: Topi Pohjolainen --- src/intel/blorp/blorp_blit.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH v6 2/6] mesa/st: glsl_to_tgsi: implement new temporary register lifetime tracker

On 17.07.2017 04:32, Gert Wollny wrote: Just a few comments while updating the patch: One more comment about the debug_log: as written, it will getenv every time. It would be better to use the approach taken by e.g. should_clone_nir() in compiler/nir/nir.h. There's no reason to have a whole

[Mesa-dev] [PATCH] gbm: avoid null pointer dereference

gbm_dri_surface_create() might create gbm_surface without modifiers. therefore, gbm_dri_surface_destroy() needs to check modifiers is null or not prior to free it. Signed-off-by: Mun Gwan-gyeong --- src/gbm/backends/dri/gbm_dri.c | 3 ++- 1 file changed, 2 insertions(+), 1

[Mesa-dev] [PATCH] gbm: fix typo in doxygen comment

This fixes the misspelling of gbm_bo_import api param. Signed-off-by: Mun Gwan-gyeong --- src/gbm/main/gbm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c index 79d78b763e..52eac7f29d 100644 ---

Re: [Mesa-dev] [PATCH] i965: use strtol to convert the integer deviceID override

On 14 July 2017 at 18:02, Kenneth Graunke wrote: > On Friday, July 14, 2017 5:56:58 AM PDT Emil Velikov wrote: >> From: Emil Velikov >> >> One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE >> variable. A few symbolic names or a

[Mesa-dev] [PATCH] swr: remove unneeded fallback strcasecmp define

From: Emil Velikov The last user of the function was removed with earlier commit. Fixes: 50842e8a931 ("swr: replace gallium->swr format enum conversion") Cc: Tim Rowley Signed-off-by: Emil Velikov --- Continue

Re: [Mesa-dev] [PATCH v3 02/14] i965/miptree: Allocate HiZ up-front

On Mon, Jul 17, 2017 at 5:50 AM, Pohjolainen, Topi < topi.pohjolai...@gmail.com> wrote: > On Mon, Jul 17, 2017 at 03:29:32PM +0300, Pohjolainen, Topi wrote: > > On Fri, Jul 14, 2017 at 03:22:51PM -0700, Chad Versace wrote: > > > On Wed 12 Jul 2017, Jason Ekstrand wrote: > > > > HiZ, like MCS and

Re: [Mesa-dev] [PATCH 04/16] i965/tex: Use offset helper instead of accessing table directly

1-4 are Reviewed-by: Jason Ekstrand On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_tex_image.c| 6 -- >

Re: [Mesa-dev] [PATCH 15/16] i965: Refactor check for separate stencil

On Mon, Jul 17, 2017 at 6:35 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 24 > > 1 file changed, 20 insertions(+), 4 deletions(-) > > diff

Re: [Mesa-dev] [PATCH 16/16] i965/gen4: Set tile offsets to zero after depth rebase

9-16 are Reviewed-by: Jason Ekstrand On Mon, Jul 17, 2017 at 6:35 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Current logic calls intel_renderbuffer_set_draw_offset() which in > turn tries to calculate x and y offset against layer/level settings > that are

Re: [Mesa-dev] [PATCH 1/2] i965: Rework the modifier info map

On Mon, Jul 17, 2017 at 8:24 AM, Daniel Stone wrote: > Hi, > > On 17 July 2017 at 15:39, Jason Ekstrand wrote: > > On Mon, Jul 17, 2017 at 2:24 AM, Daniel Stone > wrote: > >> On 17 July 2017 at 01:48, Jason Ekstrand

Re: [Mesa-dev] [PATCH 2/2] configure/swr: add KNL and SKX architecture targets

On 17 July 2017 at 15:08, Tim Rowley wrote: > Not built by default. > --- > configure.ac | 16 ++ > src/gallium/drivers/swr/Makefile.am| 38 > ++ > src/gallium/drivers/swr/swr_loader.cpp | 20

[Mesa-dev] [PATCH v7 1/6] mesa/st: glsl_to_tgsi move some helper classes to extra files

To prepare the implementation of a temp register lifetime tracker some of the classes are moved into seperate header/implementation files to make them accessible from other files. Specifically these are: class st_src_reg; class st_dst_reg; class glsl_to_tgsi_instruction; struct

[Mesa-dev] [PATCH v7 6/6] mesa/st: glsl_to_tgsi: tie in new temporary register merge approach

This patch replaces the old register lifetime estiamtion and rename mapping evaluation with the new one. Performance to compare between the current and the new implementation were measured by running the shader-db in one thread. ---

[Mesa-dev] [PATCH v7 4/6] mesa/st: glsl_to_tgsi: add register rename mapping evaluator

The remapping evaluator first sorts the temporary registers ascending based on their first life time instruction, and then uses a binary search to find merge canidates. For the initial sorting it uses std::sort because qsort is quite slow in comparison. By removing the define USE_STL_SORT in

[Mesa-dev] [PATCH v7 2/6] mesa/st: glsl_to_tgsi: implement new temporary register lifetime tracker

This patch adds a class for tracking the life times of temporary registers in the glsl to tgsi translation. The algorithm runs in three steps: First, in order to minimize the number of needed memory allocations the program is scanned to evaluate the number of scopes. Then, the program is scanned

[Mesa-dev] [PATCH v7 0/6] mesa/st: glsl_to_tgsi: improved temp-reg lifetime estimation

Hello Nicolai, many thanks for the review. With this new patch set I've implemented most of your suggestions, patch 1 and 6 are only rebased though. The patches are also available via https://github.com/gerddie/mesa/tree/regrename-v7 The one thing I did not do (or better said, I reverted it)

[Mesa-dev] [PATCH v7 5/6] mesa/st: glsl_to_tgsi: Add test set for evaluation of rename mapping

The patch adds tests for the register rename mapping evaluation and combined life time estimation and renaming. --- .../tests/test_glsl_to_tgsi_lifetime.cpp | 192 + 1 file changed, 192 insertions(+) diff --git

Re: [Mesa-dev] [PATCH 06/16] i965/miptree: Do not rely on msaa type to decide if aux is needed

On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Once the driver moves to ISL both compressed and uncompressed have > the same type. One needs to tell them apart by other means. This > can be done by checking the existence of mcs_buf. > > There is a short

Re: [Mesa-dev] [PATCH 06/16] i965/miptree: Do not rely on msaa type to decide if aux is needed

Oops, forgot to add: Reviewed-by: Jason Ekstrand On Mon, Jul 17, 2017 at 9:27 AM, Jason Ekstrand wrote: > On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen < > topi.pohjolai...@gmail.com> wrote: > >> Once the driver moves to ISL both compressed and

Re: [Mesa-dev] [PATCH 1.2/8] spirv: Generate spirv_info.c

On 07/14/2017 09:22 PM, Jason Ekstrand wrote: > On Fri, Jul 14, 2017 at 6:39 PM, Ian Romanick > wrote: > > From: Ian Romanick > > > The old table based spirv_*_to_string

Re: [Mesa-dev] [PATCH 4/4] dri: Add KHR_no_error toggle to driconf

On 13 July 2017 at 12:09, Grigori Goronzy wrote: > On 2017-07-12 15:15, Emil Velikov wrote: >> >> As mentioned in earlier commit no_error should be device agnostic. >> Hence removing the st/dri bits and adding a DRI_CONF_MESA_NO_ERROR() >> line next to DRI_CONF_VBLANK_MODE

[Mesa-dev] [PATCH] egl/drm: fix assert checking of dri2_surf->buffer_count

This adds an increment of buffer_count and changes a border value with ARRAY_SIZE() macro. Signed-off-by: Mun Gwan-gyeong --- src/egl/drivers/dri2/platform_drm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/egl/drivers/dri2/platform_drm.c

Re: [Mesa-dev] [PATCH 05/16] i965: Make irb::mt_layer logical instead of physical

Thank you, thank you, thank you! This has been annoying me for a long time. Good to see it get sorted. I did a quick grep through the tree and it looks like you got them all. Reviewed-by: Jason Ekstrand On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen <

Re: [Mesa-dev] [PATCH 08/16] i965/wm: Use isl for determining vertical slice pitch

On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > This helps to drop dependency to miptree::total_height which is > used in brw_miptree_get_vertical_slice_pitch(). > > This is also readily compatible once miptree itself is isl > based. > > Signed-off-by:

Re: [Mesa-dev] [PATCH 1/2] configure/swr: configurable swr architectures

On 17 July 2017 at 15:08, Tim Rowley wrote: > Allow configuration of the SWR architecture depend libraries > we build for with --with-swr-archs. Maintains current behavior > by defaulting to avx,avx2. > > Scons changes made to make it still build and work, but >

Re: [Mesa-dev] [PATCH 5/6] radeonsi: use slot indexes for bindless handles

On Mon, Jul 17, 2017 at 4:35 AM, Samuel Pitoiset wrote: > > > On 07/15/2017 02:54 AM, Marek Olšák wrote: >> >> On Wed, Jul 5, 2017 at 1:42 PM, Nicolai Hähnle wrote: >>> >>> On 04.07.2017 15:05, Samuel Pitoiset wrote: Using VRAM

[Mesa-dev] [PATCH v7 3/6] mesa/st: glsl_to_tgsi: add tests for the new temporary lifetime tracker

This patch adds a set of unit tests for the new lifetime tracker. --- configure.ac |1 + src/mesa/Makefile.am |2 +- src/mesa/state_tracker/tests/Makefile.am | 36 + .../tests/test_glsl_to_tgsi_lifetime.cpp

Re: [Mesa-dev] [PATCH] egl/drm: fix assert checking of dri2_surf->buffer_count

On 17 July 2017 at 16:47, Gwan-gyeong Mun wrote: > This adds an increment of buffer_count and changes a border value with > ARRAY_SIZE() macro. > > Signed-off-by: Mun Gwan-gyeong > --- > src/egl/drivers/dri2/platform_drm.c | 3 ++- > 1 file changed, 2

Re: [Mesa-dev] [PATCH 07/16] i965/miptree: Check for miptree_create() failures

Reviewed-by: Jason Ekstrand On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Rest of the function assumes it always succeeds. > > Signed-off-by: Topi Pohjolainen > --- >

[Mesa-dev] [PATCH v2] etnaviv: Add support for ETC2 texture compression

Add support for ETC2 compressed textures in the etnaviv driver. One step closer towards GL ES 3 support. For now, treat SRGB and RGB formats the same. It looks like these are distinguished using a different bit in sampler state, and not part of the format, but I have not yet been able to confirm

Re: [Mesa-dev] [PATCH v2] etnaviv: Add support for ETC2 texture compression

;On Mon, Jul 17, 2017 at 12:56 PM, Wladimir J. van der Laan wrote: > Add support for ETC2 compressed textures in the etnaviv driver. > > One step closer towards GL ES 3 support. > > For now, treat SRGB and RGB formats the same. It looks like these are > distinguished using a

Re: [Mesa-dev] [PATCH v3 02/14] i965/miptree: Allocate HiZ up-front

On Mon, Jul 17, 2017 at 08:10:01AM -0700, Jason Ekstrand wrote: > On Mon, Jul 17, 2017 at 5:50 AM, Pohjolainen, Topi < > topi.pohjolai...@gmail.com> wrote: > > > On Mon, Jul 17, 2017 at 03:29:32PM +0300, Pohjolainen, Topi wrote: > > > On Fri, Jul 14, 2017 at 03:22:51PM -0700, Chad Versace wrote:

Re: [Mesa-dev] [PATCH] egl/drm: Format code in platform_drm.c according to style guide.

On 17 July 2017 at 16:21, Gwan-gyeong Mun wrote: > This is a tiny housekeeping patch which does the following: > * Limit lines to 78 or fewer characters. > According to the mesa coding style guidelines. > The odd line which goes over the guideline (note it's not a

Re: [Mesa-dev] [PATCH 15/16] i965: Refactor check for separate stencil

On Mon, Jul 17, 2017 at 09:19:01AM -0700, Jason Ekstrand wrote: > On Mon, Jul 17, 2017 at 6:35 AM, Topi Pohjolainen < > topi.pohjolai...@gmail.com> wrote: > > > Signed-off-by: Topi Pohjolainen > > --- > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 24 > >

[Mesa-dev] [PATCH] st/mesa: init winsys buffers list only if context creation succeeds

Fixes piglit test crash when context creation fails. --- src/mesa/state_tracker/st_context.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c index 560d94e..8eccad6 100644 ---

Re: [Mesa-dev] [PATCH 01/20] nir: Add intrinsics from ARB_shader_group_vote

I've force pushed this series with all suggested changes to the ballot branch of my tree git://people.freedesktop.org/~mattst88/mesa ballot The only two reviews I have so far are my own, after changing the authorship on two patches to Curro. With the branchpoint coming up this week, I'd

[Mesa-dev] [PATCH 1/2] egl/drm: Fix misused x and y offsets on swrast_put_image2()

It fixes misused x and y offsets on the calculation of the memory copy regions. And it adds limits of the height and the width on the copy region. Signed-off-by: Mun Gwan-gyeong --- src/egl/drivers/dri2/platform_drm.c | 17 +++-- 1 file changed, 15 insertions(+),

[Mesa-dev] [PATCH 2/2] egl/drm: Fix misused x and y offsets on swrast_get_image()

It fixes misused x and y offsets on the calculation of the memory copy regions. And it adds limits of the height and the width on the copy region. Signed-off-by: Mun Gwan-gyeong --- src/egl/drivers/dri2/platform_drm.c | 19 --- 1 file changed, 16

Re: [Mesa-dev] [PATCH 1.2/8] spirv: Generate spirv_info.c

On 07/17/2017 10:54 AM, Emil Velikov wrote: > On 15 July 2017 at 02:39, Ian Romanick wrote: >> From: Ian Romanick >> >> The old table based spirv_*_to_string functions would return NULL for >> any values "inside" the table that didn't have entries.

Re: [Mesa-dev] [PATCH 08/16] i965/wm: Use isl for determining vertical slice pitch

On Mon, Jul 17, 2017 at 09:11:53AM -0700, Jason Ekstrand wrote: > On Mon, Jul 17, 2017 at 6:34 AM, Topi Pohjolainen < > topi.pohjolai...@gmail.com> wrote: > > > This helps to drop dependency to miptree::total_height which is > > used in brw_miptree_get_vertical_slice_pitch(). > > > > This is also

  1   2   >