Re: [Mesa-dev] [PATCH 1/2] radeonsi: add FMASK texture binding slots and resource setup (v2)

2013-08-16 Thread Michel Dänzer
On Fre, 2013-08-16 at 03:29 +0200, Marek Olšák wrote: v2: bind FMASK textures to shader resource slots 16..31 This series is Reviewed-by: Michel Dänzer michel.daen...@amd.com -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast |

Re: [Mesa-dev] [PATCH 1/2] radeonsi: Don't leave gaps between position exports from vertex shader

2013-08-16 Thread Michel Dänzer
On Fre, 2013-08-09 at 23:41 +0200, Laurent Carlier wrote: Le vendredi 9 août 2013 18:50:20 Michel Dänzer a écrit : From: Michel Dänzer michel.daen...@amd.com Exporting position 2/3 (clip distances) but not position 1 (point size) causes geometry corruption for some reason. Bugzilla:

[Mesa-dev] [PATCH 2/5] vl: rename enum pipe_video_codec to pipe_video_format

2013-08-16 Thread Christian König
From: Christian König christian.koe...@amd.com Signed-off-by: Christian König christian.koe...@amd.com --- src/gallium/auxiliary/util/u_video.h | 12 +++ src/gallium/auxiliary/vl/vl_decoder.c |4 +-- src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c |2

[Mesa-dev] [PATCH 4/5] vl: add entrypoint to get_video_param

2013-08-16 Thread Christian König
From: Christian König christian.koe...@amd.com Signed-off-by: Christian König christian.koe...@amd.com --- src/gallium/auxiliary/vl/vl_decoder.c |4 +++- src/gallium/auxiliary/vl/vl_decoder.h |3 ++- src/gallium/auxiliary/vl/vl_video_buffer.c |1 +

[Mesa-dev] [PATCH 5/5] vl: add entrypoint to is_video_format_supported

2013-08-16 Thread Christian König
From: Christian König christian.koe...@amd.com Signed-off-by: Christian König christian.koe...@amd.com --- src/gallium/auxiliary/vl/vl_video_buffer.c |3 ++- src/gallium/auxiliary/vl/vl_video_buffer.h |3 ++- src/gallium/drivers/ilo/ilo_format.c|5 +++--

Re: [Mesa-dev] [PATCH 6/6] i965: Make the VS binding table as small as possible.

2013-08-16 Thread Paul Berry
On 14 August 2013 21:07, Kenneth Graunke kenn...@whitecape.org wrote: For some reason, we didn't use this information even though the VS backend has computed it (albeit poorly) for ages. Signed-off-by: Kenneth Graunke kenn...@whitecape.org For some reason I can't get this series to apply

Re: [Mesa-dev] [PATCH 6/6] i965: Make the VS binding table as small as possible.

2013-08-16 Thread Paul Berry
On 16 August 2013 05:35, Paul Berry stereotype...@gmail.com wrote: On 14 August 2013 21:07, Kenneth Graunke kenn...@whitecape.org wrote: For some reason, we didn't use this information even though the VS backend has computed it (albeit poorly) for ages. Signed-off-by: Kenneth Graunke

Re: [Mesa-dev] [PATCH 1/6] i965/fs: Use SURF_INDEX_DRAW() when emitting FB writes.

2013-08-16 Thread Paul Berry
On 14 August 2013 21:07, Kenneth Graunke kenn...@whitecape.org wrote: SURF_INDEX_DRAW is the identity function, and it's unlikely that it will change, but we may as well use it for documentation's sake. Signed-off-by: Kenneth Graunke kenn...@whitecape.org The comment above the declaration

Re: [Mesa-dev] [PATCH 2/6] i965/fs: Track the maximum surface index used in brw_wm_prog_data.

2013-08-16 Thread Paul Berry
On 14 August 2013 21:07, Kenneth Graunke kenn...@whitecape.org wrote: This allows us to determine how small we can make the binding table. Since it depends entirely on the shader program, we can just compute it once at compile time, rather than at binding table emit time (which happens

Re: [Mesa-dev] [PATCH 6/6] i965: Make the VS binding table as small as possible.

2013-08-16 Thread Paul Berry
On 14 August 2013 21:07, Kenneth Graunke kenn...@whitecape.org wrote: For some reason, we didn't use this information even though the VS backend has computed it (albeit poorly) for ages. Signed-off-by: Kenneth Graunke kenn...@whitecape.org This series, and the 10 patch series it's based on,

Re: [Mesa-dev] radeonsi: LLVM r187139 broke some piglit tests

2013-08-16 Thread Michel Dänzer
On Don, 2013-08-15 at 13:50 -0700, Tom Stellard wrote: On Thu, Aug 15, 2013 at 07:50:10PM +0200, Michel Dänzer wrote: On Don, 2013-08-15 at 09:16 -0700, Tom Stellard wrote: On Thu, Aug 15, 2013 at 08:22:39AM -0700, Tom Stellard wrote: On Thu, Aug 15, 2013 at 11:55:36AM +0200, Michel

Re: [Mesa-dev] radeonsi: LLVM r187139 broke some piglit tests

2013-08-16 Thread Tom Stellard
On Fri, Aug 16, 2013 at 03:36:38PM +0200, Michel Dänzer wrote: On Don, 2013-08-15 at 13:50 -0700, Tom Stellard wrote: On Thu, Aug 15, 2013 at 07:50:10PM +0200, Michel Dänzer wrote: On Don, 2013-08-15 at 09:16 -0700, Tom Stellard wrote: On Thu, Aug 15, 2013 at 08:22:39AM -0700, Tom

Re: [Mesa-dev] [PATCH V3 3/3] i965/blorp: Add support for single sample scaled blit with bilinear filter

2013-08-16 Thread Paul Berry
On 14 August 2013 18:28, Anuj Phogat anuj.pho...@gmail.com wrote: Currently single sample scaled blits with GL_LINEAR filter falls back to meta path. Patch removes this limitation in BLORP engine and implements single sample scaled blit with bilinear filter. No piglit, gles3 regressions are

[Mesa-dev] [PATCH] R600/SI: Add pattern for xor of i1

2013-08-16 Thread Michel Dänzer
From: Michel Dänzer michel.daen...@amd.com Fixes two recent piglit regressions with radeonsi. Signed-off-by: Michel Dänzer michel.daen...@amd.com --- lib/Target/R600/SIInstructions.td | 4 +++- test/CodeGen/R600/xor.ll | 17 + 2 files changed, 20 insertions(+), 1

Re: [Mesa-dev] nouveau: xvmc on nv43

2013-08-16 Thread Ilia Mirkin
On Fri, Aug 16, 2013 at 5:40 AM, Pali Rohár pali.ro...@gmail.com wrote: Hello Ilia, I was your last commit which fixing xvmc support for nv30 hw in mesa git tree. Maybe you can help me. I have graphics card nvidia geforce 6600 gt (nv43 chip) According to wiki page

Re: [Mesa-dev] [PATCH] R600/SI: Add pattern for xor of i1

2013-08-16 Thread Tom Stellard
On Fri, Aug 16, 2013 at 04:04:37PM +0200, Michel Dänzer wrote: From: Michel Dänzer michel.daen...@amd.com Fixes two recent piglit regressions with radeonsi. Signed-off-by: Michel Dänzer michel.daen...@amd.com Reviewed-by: Tom Stellard thomas.stell...@amd.com ---

Re: [Mesa-dev] [PATCH 2/2] i965: Don't copy propagate bitcasts with source modifiers.

2013-08-16 Thread Paul Berry
On 15 August 2013 16:19, Matt Turner matts...@gmail.com wrote: Previously, copy propagation would cause bitcast_f2u(abs(float)) to be performed in a single step, but the application of source modifiers (abs, neg) happens after type conversion, leading to incorrect results. That is, for

Re: [Mesa-dev] [PATCH 1/2] i965: Emit MOVs for neg/abs.

2013-08-16 Thread Matt Turner
On Thu, Aug 15, 2013 at 7:38 PM, Ian Romanick i...@freedesktop.org wrote: On 08/12/2013 01:18 PM, Matt Turner wrote: Necessary to avoid combining a bitcast and a modifier into a single operation. Otherwise if safe, the MOV should be removed by copy-propagation or register coalescing. Has

Re: [Mesa-dev] nouveau: xvmc on nv43

2013-08-16 Thread Matt Turner
On Fri, Aug 16, 2013 at 7:34 AM, Ilia Mirkin imir...@alum.mit.edu wrote: On Fri, Aug 16, 2013 at 5:40 AM, Pali Rohár pali.ro...@gmail.com wrote: Hello Ilia, I was your last commit which fixing xvmc support for nv30 hw in mesa git tree. Maybe you can help me. I have graphics card nvidia

Re: [Mesa-dev] [PATCH 1/2] radeonsi: Don't leave gaps between position exports from vertex shader

2013-08-16 Thread Laurent Carlier
Le vendredi 16 août 2013 10:59:13 Michel Dänzer a écrit : On Fre, 2013-08-09 at 23:41 +0200, Laurent Carlier wrote: Le vendredi 9 août 2013 18:50:20 Michel Dänzer a écrit : From: Michel Dänzer michel.daen...@amd.com Exporting position 2/3 (clip distances) but not position 1 (point

Re: [Mesa-dev] [PATCH 1/3] i965: Move GL_APPLE_object_purgeable functionality into a new file.

2013-08-16 Thread Ian Romanick
On 08/14/2013 12:06 PM, Kenneth Graunke wrote: GL_APPLE_object_purgeable creates a mechanism for marking OpenGL objects as purgeable so they can be thrown away when system resources become scarce. It specifically applies to buffer objects, textures, and renderbuffers. The

Re: [Mesa-dev] [PATCH 2/3] i965: Split intel_upload code out into a separate file.

2013-08-16 Thread Ian Romanick
On 08/14/2013 12:06 PM, Kenneth Graunke wrote: This code upload performs batched uploads via a BO. By moving it out to a separate file, intel_buffer_objects.c only provides the core buffer object functionality. Signed-off-by: Kenneth Graunke kenn...@whitecape.org Patch 2 and 3 are

Re: [Mesa-dev] [PATCH 1/2] i965: Add Gen6 depth stall flushes before disabling depth in BLORP.

2013-08-16 Thread Ian Romanick
Series is Reviewed-by: Ian Romanick ian.d.roman...@intel.com On 08/13/2013 12:07 PM, Kenneth Graunke wrote: We emit these before configuring depth in the normal path, or actually using the depth buffer in BLORP - we just failed to emit them when disabling depth altogether. On Sandybridge,

[Mesa-dev] [PATCH] st/vdpau: drop unnecessary variable prof

2013-08-16 Thread Emil Velikov
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com --- src/gallium/state_trackers/vdpau/mixer.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/state_trackers/vdpau/mixer.c b/src/gallium/state_trackers/vdpau/mixer.c index 26db5c8..8c20d05 100644 ---

Re: [Mesa-dev] segfault in pstip_bind_sampler_states

2013-08-16 Thread Kevin H. Hobbs
On 08/12/2013 10:29 AM, Brian Paul wrote: On 08/09/2013 01:50 PM, Kevin H. Hobbs wrote: (gdb) print pstip $1 = (struct pstip_stage *) 0xff66331aff66331a I don't think my actual RAM goes that high. That looks suspect since the low and high halves of the address are the same. I believe

[Mesa-dev] [PATCH] radeonsi/compute: Let the state tracker do all the flushing

2013-08-16 Thread Tom Stellard
From: Tom Stellard thomas.stell...@amd.com It shouldn't be necessary to call radeon_winsys::cs_flush() from radeonsi_launch_grid(), because the state tracker is responsible for flushing the pipeline at the appropriate time. The current behavior is also wrong, because radeonsi_launch_grid()

Re: [Mesa-dev] [PATCH 2/6] i965/fs: Track the maximum surface index used in brw_wm_prog_data.

2013-08-16 Thread Kenneth Graunke
On Friday, August 16, 2013 06:11:25 AM Paul Berry wrote: On 14 August 2013 21:07, Kenneth Graunke kenn...@whitecape.org wrote: This allows us to determine how small we can make the binding table. Since it depends entirely on the shader program, we can just compute it once at compile

Re: [Mesa-dev] [PATCH] clover: Fix linkage of libOpenCL

2013-08-16 Thread Tom Stellard
On Wed, Aug 07, 2013 at 05:48:48PM +0200, Niels Ole Salscheider wrote: Clover needs the option component of llvm. Pushed, thanks! -Tom Signed-off-by: Niels Ole Salscheider niels_...@salscheider-online.de --- configure.ac | 4 1 Datei geändert, 4 Zeilen hinzugefügt(+) diff --git

[Mesa-dev] [PATCH] gallivm: do clamping of border color correctly for all formats

2013-08-16 Thread sroland
From: Roland Scheidegger srol...@vmware.com Turns out it is actually very complicated to figure out what a format really is wrt range, as using channel information for determining unorm/snorm etc. doesn't work for a bunch of cases - namely compressed, subsampled, other. Also while here add

[Mesa-dev] [Bug 68209] New: piglit glean vertArrayBGRA regression

2013-08-16 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=68209 Priority: medium Bug ID: 68209 Keywords: regression CC: fred...@kde.org Assignee: mesa-dev@lists.freedesktop.org Summary: piglit glean vertArrayBGRA regression

[Mesa-dev] [Bug 68209] piglit glean vertArrayBGRA regression

2013-08-16 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=68209 Ian Romanick i...@freedesktop.org changed: What|Removed |Added Status|NEW |RESOLVED

[Mesa-dev] [Bug 68209] piglit glean vertArrayBGRA regression

2013-08-16 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=68209 --- Comment #2 from Kenneth Graunke kenn...@whitecape.org --- I don't believe there are patches pending for the Glean test, though. It needs to be fixed too. -- You are receiving this mail because: You are the assignee for the bug.

Re: [Mesa-dev] [PATCH 00/10] i965: Separate VS/FS sampler tables.

2013-08-16 Thread Ian Romanick
On 08/14/2013 06:55 PM, Kenneth Graunke wrote: Currently, i965 uploads a single SAMPLER_STATE table shared across all shader stages (VS, FS). This series splits it out, uploading a unique table for each stage. I think this may actually fix some bugs with vertex texturing: Piglit's

Re: [Mesa-dev] [PATCH 01/10] i965: Split sampler count variable to be per-stage.

2013-08-16 Thread Ian Romanick
On 08/14/2013 06:55 PM, Kenneth Graunke wrote: Currently, we only have a single sampler state table shared among all stages, so we just copy wm.sampler_count into vs.sampler_count. In the future, each shader stage will have its own SAMPLER_STATE table, at which point we'll need these separate