Re: [Mesa-dev] [PATCH] i965: Use tex_mocs instead of rb_mocs for GL images.

On Mon, Jul 18, 2016 at 07:08:46PM -0700, Kenneth Graunke wrote: > Fixes a 10-20% performance regression in OglCSDof caused by commit > 5a8c89038abab0184ea72664ab390ec6ca58b4d6, which made images (in the > image load/store sense) use BDW_MOCS_PTE instead of BDW_MOCS_WB. > > This seems sketchy, as

Re: [Mesa-dev] [PATCH 3a/3] i965: Correctly set RENDER_SURFACE_STATE::Depth for cube map textures

On Mon, Jul 18, 2016 at 10:16:53PM -0700, Jason Ekstrand wrote: > From the Sky Lake PRM: > >"For SURFTYPE_CUBE: For Sampling Engine Surfaces and Typed Data Port >Surfaces, the range of this field is [0,340], indicating the number of >cube array elements (equal to the number of

Re: [Mesa-dev] [PATCH 7/7] i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.

On Jul 18, 2016 10:11 PM, "Chris Forbes" wrote: > > I remember arguing about this when it got added -- tradeoff was payload size/register pressure vs needing to call out to this unit, if centroid barycentric coords weren't required for anything else? It does seem fairly

[Mesa-dev] [PATCH 2/3] i965/miptree: Set logical_depth0 == 6 for cube maps

This matches what we do for cube maps where logical_depth0 is in number of face-layers rather than number of cubes. This does mean that we will temporarily be setting the surface bounds too loose for cube map textures but we are already setting them too loose for cube arrays and we will be fixing

[Mesa-dev] [PATCH 3a/3] i965: Correctly set RENDER_SURFACE_STATE::Depth for cube map textures

From the Sky Lake PRM: "For SURFTYPE_CUBE: For Sampling Engine Surfaces and Typed Data Port Surfaces, the range of this field is [0,340], indicating the number of cube array elements (equal to the number of underlying 2D array elements divided by 6). For other surfaces, this field

[Mesa-dev] [PATCH 3b/3] i965: Stop muging cube array lengths by 6

From the Sky Lake PRM: "For SURFTYPE_CUBE: For Sampling Engine Surfaces and Typed Data Port Surfaces, the range of this field is [0,340], indicating the number of cube array elements (equal to the number of underlying 2D array elements divided by 6). For other surfaces, this field

[Mesa-dev] [PATCH 1/3] i965: Use intel_get_image_dims in alloc_texture_storage

The intel_get_image_dims helper function handles some image dimension sanitization for us for things such as 1-D array textures. We should probably be using it here. Signed-off-by: Jason Ekstrand Cc: "12.0 11.2 11.1" ---

[Mesa-dev] [PATCH 0/3] i965: Correctly set RENDER_SURFACE_STATE::Depth for

From the Sky Lake PRM: "For SURFTYPE_CUBE: For Sampling Engine Surfaces and Typed Data Port Surfaces, the range of this field is [0,340], indicating the number of cube array elements (equal to the number of underlying 2D array elements divided by 6). For other surfaces, this field

[Mesa-dev] [Bug 96950] Another regression from bc4e0c486: vbo: Use a bitmask to track the active arrays in vbo_exec*.

https://bugs.freedesktop.org/show_bug.cgi?id=96950 --- Comment #5 from Mathias Fröhlich --- Or Can you provide an apitrace? I have no such system to reproduce at hands. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact

Re: [Mesa-dev] [PATCH 7/7] i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.

I remember arguing about this when it got added -- tradeoff was payload size/register pressure vs needing to call out to this unit, if centroid barycentric coords weren't required for anything else? It does seem fairly pointless, though. For the series:- Reviewed-by: Chris Forbes

Re: [Mesa-dev] [PATCH 2/7] nir: Add a nir_lower_io flag for using load_interpolated_input intrins.

Seems a little unfortunate to add a random bool to this interface which is otherwise fairly descriptive, but OK. On Tue, Jul 19, 2016 at 8:26 AM, Kenneth Graunke wrote: > While my intention is that the new intrinsics should be usable by all > drivers, we need to make them

Re: [Mesa-dev] [PATCH 6/7] i965: Rewrite FS input handling to use the new NIR intrinsics.

On Tue, Jul 19, 2016 at 8:26 AM, Kenneth Graunke wrote: > + default: > + assert(!"invalid intrinsic"); > unreachable() ? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 00/10] egl/android: Improve the Android EGL backend

On Tue, Jul 19, 2016 at 12:35 PM, Rob Herring wrote: > On Fri, Jul 15, 2016 at 2:53 AM, Tomasz Figa wrote: >> Hi, >> >> This series is a collection of various fixes and extensions we came up >> with during our attempt to use Mesa for Android. >> >> Fixes

Re: [Mesa-dev] [PATCH 00/10] egl/android: Improve the Android EGL backend

On Fri, Jul 15, 2016 at 2:53 AM, Tomasz Figa wrote: > Hi, > > This series is a collection of various fixes and extensions we came up > with during our attempt to use Mesa for Android. > > Fixes included in this series: > - added mandatory EGL_MAX_PBUFFER_WIDTH and _HEIGHT

Re: [Mesa-dev] [PATCH 07/10] egl/android: Make drm_gralloc headers optional

On Tue, Jul 19, 2016 at 2:35 AM, Emil Velikov wrote: > On 18 July 2016 at 16:38, Tomasz Figa wrote: >> On Mon, Jul 18, 2016 at 11:58 PM, Emil Velikov >> wrote: >>> On 18 July 2016 at 13:02, Tomasz Figa

Re: [Mesa-dev] Required Mako version? (WAS: mesa from git fails to compile)

On Monday, July 18, 2016 10:58:25 PM PDT Pali Rohár wrote: > Any conclusion or fix for this issue? Dylan suggested you use pip --user to install a newer version of Mako. Is that a workable solution to your problem? I'm having a hard time getting excited about making upstream support building

Re: [Mesa-dev] [PATCH] gallium/util: Fix debug_printf under Haiku

July 18 2016 1:10 PM, "Emil Velikov" wrote: > On 18 July 2016 at 16:28, Alexander von Gluck IV > wrote: > >> July 18 2016 9:20 AM, "Emil Velikov" wrote: >>> On 18 July 2016 at 14:39, Alexander von Gluck IV

[Mesa-dev] [PATCH] i965: Use tex_mocs instead of rb_mocs for GL images.

Fixes a 10-20% performance regression in OglCSDof caused by commit 5a8c89038abab0184ea72664ab390ec6ca58b4d6, which made images (in the image load/store sense) use BDW_MOCS_PTE instead of BDW_MOCS_WB. This seems sketchy, as the default PTE value is supposed to be WB LLC eLLC, which is the same as

Re: [Mesa-dev] [PATCH 8/8] anv: Properly call gen75_emit_state_base_address on Haswell.

Also, feel free to cc the while lot to stable since it really is a gen7 fix. I guess you could leave 6-7 off stable if you want but Meh. On Jul 18, 2016 6:33 PM, "Jason Ekstrand" wrote: > Series is > > Reviewed-by: Jason Ekstrand > > Thanks for

Re: [Mesa-dev] [PATCH 8/8] anv: Properly call gen75_emit_state_base_address on Haswell.

Series is Reviewed-by: Jason Ekstrand Thanks for cleaning this up. The more we can share code the better I say. On Jul 18, 2016 6:06 PM, "Kenneth Graunke" wrote: > This should fix MOCS values. Caught by Coverity. > > CID: 1364155 > >

Re: [Mesa-dev] Required Mako version? (WAS: mesa from git fails to compile)

Any conclusion or fix for this issue? On Saturday 16 July 2016 02:52:50 Jason Ekstrand wrote: > Adding Dylan > > On Jul 14, 2016 10:24 PM, "Samuel Iglesias Gonsálvez" > > > wrote: > > On 14/07/16 18:34, Eric Engestrom wrote: > > > On Thu, Jul 14, 2016 at 04:01:13PM +0100,

[Mesa-dev] Switch OpenMAX state tracker in Mesa/Gallium to use Tizonia

I am interested in this project idea.I want some help regarding it. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 8/8] anv: Properly call gen75_emit_state_base_address on Haswell.

This should fix MOCS values. Caught by Coverity. CID: 1364155 Signed-off-by: Kenneth Graunke --- src/intel/vulkan/anv_cmd_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c

[Mesa-dev] [PATCH 5/8] anv: Unify 3DSTATE_CLIP code across generations.

The bulk of this is the same. There are just a couple fields that only exist on one generation or another, and we can easily handle those with an #ifdef. Signed-off-by: Kenneth Graunke --- src/intel/vulkan/gen7_pipeline.c | 23 ++

[Mesa-dev] [PATCH 2/8] genxml: Add APIMODE_D3D missing enum values and improve consistency.

Signed-off-by: Kenneth Graunke --- src/intel/genxml/gen6.xml| 1 + src/intel/genxml/gen7.xml| 1 + src/intel/genxml/gen75.xml | 1 + src/intel/genxml/gen8.xml| 3 ++- src/intel/genxml/gen9.xml| 3 ++- src/intel/vulkan/gen8_pipeline.c |

[Mesa-dev] [PATCH 7/8] anv: Perform rasterizer discard in the SOL stage instead of the clipper.

See commit b0629e6894513a2c49a018bc3342a4e55435a236, where we discovered that the SOL stage's "Rendering Disable" feature is a lot faster at throwing away all geometry than the clipper's "reject all" mode. Signed-off-by: Kenneth Graunke ---

[Mesa-dev] [PATCH 1/8] genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.

Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL. Being consistent will let me unify code, and I prefer having the prefix. Signed-off-by: Kenneth Graunke --- src/intel/genxml/gen8.xml| 6 +++--- src/intel/genxml/gen9.xml| 6 +++---

[Mesa-dev] [PATCH 4/8] anv: Enable early culling on Gen7.

We set the cull mode, but forgot the enable bit. Gen8 uses this. Signed-off-by: Kenneth Graunke --- src/intel/vulkan/gen7_pipeline.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index

[Mesa-dev] [PATCH 3/8] anv: Fix near plane clipping on Gen7/7.5.

The Gen7/7.5 clip code used APIMODE_OGL, while the Gen8+ clip code used APIMODE_D3D. The meaning hasn't changed, so one of these must be wrong. It appears that the hardware documentation is completely wrong. It claims that the "API Mode" bit means: 0hAPIMODE_OGLNEAR_VP boundary ==

[Mesa-dev] [PATCH 6/8] genxml: Rename "API Rendering Disable" to "Rendering Disable".

Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API". Pick one for consistency, and so we can share code between generations. Signed-off-by: Kenneth Graunke --- src/intel/genxml/gen8.xml | 2 +- src/intel/genxml/gen9.xml | 2 +- 2 files changed, 2

Re: [Mesa-dev] [PATCH 2/2] i965: Fix shared atomic intrinsics to pay attention to base.

On Mon, 2016-07-18 at 15:49 -0700, Kenneth Graunke wrote: So this fixes a bug with indirects right? Is there a piglit test for this? With the typo Ilia pointed out fixed, both are: Reviewed-by: Timothy Arceri > Signed-off-by: Kenneth Graunke

Re: [Mesa-dev] [PATCH 2/2] i965: Fix shared atomic intrinsics to pay attention to base.

On Mon, 2016-07-18 at 15:49 -0700, Kenneth Graunke wrote: So this fixes a bug with indirects right? Is there a piglit test for this? With the typo Ilia pointed out fixed. Reviewed-by: Timothy Arceri > Signed-off-by: Kenneth Graunke > ---

Re: [Mesa-dev] [PATCH 06/11] vl/util: add copy func for yv12image to nv12surface

Zhang, Boyuan wrote: Hi Andy, I just submitted another patch set, most of the issues you reported are solved, please see the information below: - Giving different frame rate should result different output size. The final result from my side is very close to the CBR I set. Please give a try

Re: [Mesa-dev] [RFC] gallium/u_queue: add barrier function

possibly.. although sprinkling queue_barrier() calls (which is at least useful for debugging, although I think I won't use it in the end after debugging) hasn't found the issue yet. I did at least find an issue w/ fence handling (I was grabbing the fence # potentially before the batch was

Re: [Mesa-dev] [PATCH] i965: Skip update_texture_surface when the plane doesn't exist

On Mon, Jul 18, 2016 at 9:50 AM, Jordan Justen wrote: > On 2016-07-18 09:14:48, Jason Ekstrand wrote: > > Thanks to rebase fail, recent surface state changes effectively reverted > > This happened in 09b5a71517fadd6c20b72e7ad9ea1f7539c93a42, right? > Should we mention

Re: [Mesa-dev] [RFC] gallium/u_queue: add barrier function

I think your issue is that you have self-releasing jobs with the cleanup callback and you automatically lose fences that way, so there is no way to wait for completion. Since you have only 1 thread with N jobs at most, I suggest you keep N+1 fences around (a ring of fences) that you reuse for new

[Mesa-dev] [Bug 96979] Mesa 10.5.7 implementation error: Trying to disable permanently enabled extensions

https://bugs.freedesktop.org/show_bug.cgi?id=96979 --- Comment #3 from Ilia Mirkin --- (In reply to Kenneth Graunke from comment #2) > This isn't something we want to support. > > We should probably use fprintf rather than _mesa_problem so it doesn't print > "Mesa:

Re: [Mesa-dev] [PATCH 06/11] vl/util: add copy func for yv12image to nv12surface

Hi Andy, I just submitted another patch set, most of the issues you reported are solved, please see the information below: - Giving different frame rate should result different output size. The final result from my side is very close to the CBR I set. Please give a try with different frame

Re: [Mesa-dev] [PATCH 2/2] i965: Fix shared atomic intrinsics to pay attention to base.

On Mon, Jul 18, 2016 at 6:49 PM, Kenneth Graunke wrote: > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 15 +-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git

[Mesa-dev] [PATCH 1/2] nir: Add a base const_index to shared atomic intrinsics.

Commit 52e75dcb8c04c0dde989970c4c587cbe8313f7cf made nir_lower_io start using nir_intrinsic_set_base instead of writing const_index[0] directly. However, those intrinsics apparently don't /have/ a base, so this caused assert failures. However, the old code was happily setting non-existent

[Mesa-dev] [PATCH 2/2] i965: Fix shared atomic intrinsics to pay attention to base.

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 6265dc6..a39c37e

[Mesa-dev] [PATCH 10/12] st/va: add preset values for VAAPI encode

Add some hardcoded values hardware needs mainly for rate control purpose. With previously hardcoded values for OMX, the rate control result is not correct. This change fixed the rate control result by setting correct values for Vaapi. Signed-off-by: Boyuan Zhang ---

[Mesa-dev] [PATCH 12/12] st/va: enable h264 VAAPI encode

Enable H.264 VAAPI encoding through config. Currently only H.264 baseline is supported. Signed-off-by: Boyuan Zhang --- src/gallium/state_trackers/va/config.c | 32 ++-- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git

[Mesa-dev] [PATCH 11/12] st/va: add environmental variable to disable interlace

Add environmental variable to disable interlace mode. At VAAPI decoding stage, driver can not distinguish b/w pure decoding case and transcoding case. And since interlace encoding is not supported, we have to disable interlace for transcoding case. The temporary solution is to use enviromental

[Mesa-dev] [PATCH 08/12] st/va: get rate control method from configattrib

Rate control method is passed from app to driver through config attrib list. That is why we need to store this rate control method to config. And later on, we will pass this value to context->desc.h264enc.rate_ctrl.rate_ctrl_method. Signed-off-by: Boyuan Zhang ---

[Mesa-dev] [PATCH 06/12] vl/util: add copy func for yv12image to nv12surface

Add function to copy from yv12 image to nv12 surface for VAAPI putimage call. We need this function in VaPutImage call where copying from yv12 image to nv12 surface for encoding. Existing function can't be used because it only work for copying from yv12 surface to nv12 image in Vaapi.

[Mesa-dev] [PATCH 09/12] st/va: add functions for VAAPI encode

Add necessary functions/changes for VAAPI encoding to buffer and picture. These changes will allow driver to handle all Vaapi encode related operations. This patch doesn't change the Vaapi decode behaviour. Signed-off-by: Boyuan Zhang ---

[Mesa-dev] [PATCH 07/12] st/va: add conversion for yv12 to nv12in putimage

For putimage call, if image format is yv12 (or IYUV with U V field swap) and surface format is nv12, then we need to convert yv12 to nv12 and then copy the converted data from image to surface. We can't use the existing logic where surface is destroyed and re-created with yv12 format.

[Mesa-dev] [PATCH 05/12] st/va: add encode entrypoint

VAAPI passes PIPE_VIDEO_ENTRYPOINT_ENCODE as entry point for encoding case. We will save this encode entry point in config. config_id was used as profile previously. Now, config has both profile and entrypoint field, and config_id is used to get the config object. Later on, we pass this

[Mesa-dev] [PATCH 02/12] vl: add entry point

Add entrypoint to distinguish H.264 decode and encode. For example, in patch 5/11 when is calling "VaCreateContext", "pps" and "sps" shouldn't be allocated for H.264 encoding. So we need to use the entry_point to determine this is H.264 decode or H.264 encode. We can use config to determine the

[Mesa-dev] [Bug 96979] Mesa 10.5.7 implementation error: Trying to disable permanently enabled extensions

https://bugs.freedesktop.org/show_bug.cgi?id=96979 --- Comment #2 from Kenneth Graunke --- This isn't something we want to support. We should probably use fprintf rather than _mesa_problem so it doesn't print "Mesa: implementation error" as it isn't an implementation

Re: [Mesa-dev] [PATCH RFC 2/8] nvc0: bind images for 3d/cp shaders on GM107+

On 07/18/2016 11:13 PM, Ilia Mirkin wrote: On Mon, Jul 18, 2016 at 4:55 PM, Samuel Pitoiset wrote: On Maxwell, images binding is slightly different (and much better) regarding Fermi and Kepler because a texture view needs to be uploaded for each image and this is

Re: [Mesa-dev] [PATCH] virgl: add exported dmabuf to BO hash table

On Fri, Jun 17, 2016 at 5:25 PM, Rob Herring wrote: > Exported dmabufs can get imported by the same process, but the handle was > not getting added to the hash table on export. Add the handle to the hash > table on export. Ping. Dave, can you please apply. Rob > > Cc: Dave

Re: [Mesa-dev] [PATCH] nvc0: add support for BGRA8 images

On 07/18/2016 11:16 PM, Ilia Mirkin wrote: Karol tested it on Kepler1, so we should be good. Reviewed-by: Samuel Pitoiset On Mon, Jul 18, 2016 at 5:15 PM, Samuel Pitoiset wrote: Works fine on Fermi, but still need to test on

Re: [Mesa-dev] [PATCH] nvc0: add support for BGRA8 images

Karol tested it on Kepler1, so we should be good. On Mon, Jul 18, 2016 at 5:15 PM, Samuel Pitoiset wrote: > Works fine on Fermi, but still need to test on Kepler1. > > > On 07/16/2016 09:09 PM, Ilia Mirkin wrote: >> >> This is useful for pbo downloads, which are now

Re: [Mesa-dev] [PATCH] nvc0: add support for BGRA8 images

Works fine on Fermi, but still need to test on Kepler1. On 07/16/2016 09:09 PM, Ilia Mirkin wrote: This is useful for pbo downloads, which are now accelerated with images. BGRA8 is a moderately common format to do that in. Signed-off-by: Ilia Mirkin --- This needs

Re: [Mesa-dev] [PATCH RFC 2/8] nvc0: bind images for 3d/cp shaders on GM107+

On Mon, Jul 18, 2016 at 4:55 PM, Samuel Pitoiset wrote: > On Maxwell, images binding is slightly different (and much better) > regarding Fermi and Kepler because a texture view needs to be uploaded > for each image and this is going to simplify the thing a lot. > >

Re: [Mesa-dev] [PATCH v3] glsl: reuse main extension table to appropriately restrict extensions

Well, I have a basic review on this from Eric Engestrom, who is not a mesa expert (yet?) but has been giving out a lot of good review comments lately, and nobody else has piped up saying they hate this, so I'm going to push this in the next few days unless I hear any objections. IMHO this is a

Re: [Mesa-dev] [PATCH] anv: Drop unnecessary is_haswell check in state base address code.

On Mon, Jul 18, 2016 at 1:41 PM, Kenneth Graunke wrote: > Both branches are identical. Fixes a Coverity warning. > > CID: 1364155 > > Signed-off-by: Kenneth Graunke > --- > src/intel/vulkan/anv_cmd_buffer.c | 5 + > 1 file changed, 1

[Mesa-dev] [PATCH RFC 6/8] gm107/ir: add emission for SUREDx

Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 50 ++ 1 file changed, 50 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp

[Mesa-dev] [PATCH RFC 7/8] nv50/ir: print OP_SUREDB subops in debug mode

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index

[Mesa-dev] [PATCH RFC 8/8] nvc0: disable MS images on GM107+

MS images have to be handled explicitly and I don't plan to implement them for now. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 7 +++ 1 file changed, 7 insertions(+) diff --git

[Mesa-dev] [PATCH RFC 2/8] nvc0: bind images for 3d/cp shaders on GM107+

On Maxwell, images binding is slightly different (and much better) regarding Fermi and Kepler because a texture view needs to be uploaded for each image and this is going to simplify the thing a lot. Signed-off-by: Samuel Pitoiset ---

[Mesa-dev] [PATCH RFC 3/8] gm107/ir: lower surface operations

Signed-off-by: Samuel Pitoiset --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 76 +- .../nouveau/codegen/nv50_ir_lowering_nvc0.h| 2 + 2 files changed, 77 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH RFC 4/8] gm107/ra: fix constraints for surface operations

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 25 -- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp

[Mesa-dev] [PATCH RFC 5/8] gm107/ir: add emission for SUSTx and SULDx

Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 105 + 1 file changed, 105 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp

[Mesa-dev] [PATCH RFC 1/8] nvc0: increase the tex handles area size in the driver cb

Currently, we can store 32 tex handles of 32-bits integer each and that fits perfectly with the underlying hardware except on GM107+ which requires to upload a texture view for each images. This patch increases the number of storable texture handles in the driver constant buffer from 32 to 40

[Mesa-dev] [PATCH RFC 0/8] nvc0: ARB_shader_image_load_store for Maxwell

Hi folks, This series adds support for ARB_shader_image_load_store (GL 4.2) and ARB_shader_image_size (GL 4.3) on Maxwell GPUs. Maxwell family is slightly different regarding Fermi and Kepler because it requires to use a texture view for each images. But this is actually quite fine because the

Re: [Mesa-dev] [PATCH] mapi: Massage code to allow clang to compile.

On Mon, Jul 11, 2016 at 10:49 AM, Matt Turner wrote: > According to https://llvm.org/bugs/show_bug.cgi?id=19778#c3 this code > was violating the spec, resulting in it failing to compile. > > Cc: mesa-sta...@lists.freedesktop.org > Co-authored-by: Tomasz Paweł Gajc

[Mesa-dev] [Bug 89599] symbol 'x86_64_entry_start' is already defined when building with LLVM/clang

https://bugs.freedesktop.org/show_bug.cgi?id=89599 --- Comment #11 from Matt Turner --- I sent a modified version of Tomasz's patch last week to mesa-dev. Would anyone like to test it? [PATCH] mapi: Massage code to allow clang to compile. -- You are receiving this mail

Re: [Mesa-dev] [RFC] gallium/u_queue: add barrier function

On Mon, Jul 18, 2016 at 4:34 PM, Nicolai Hähnle wrote: > On 18.07.2016 22:25, Rob Clark wrote: >> >> Helper to block until all previous jobs are complete. >> --- >> So I think this might end up being useful to me in some cases.. but >> the implementation only works for a

[Mesa-dev] [PATCH] anv: Drop unnecessary is_haswell check in state base address code.

Both branches are identical. Fixes a Coverity warning. CID: 1364155 Signed-off-by: Kenneth Graunke --- src/intel/vulkan/anv_cmd_buffer.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/intel/vulkan/anv_cmd_buffer.c

Re: [Mesa-dev] [RFC] gallium/u_queue: add barrier function

On 18.07.2016 22:25, Rob Clark wrote: Helper to block until all previous jobs are complete. --- So I think this might end up being useful to me in some cases.. but the implementation only works for a single threaded queue (which is all I need). I could also just put a helper in my driver code.

[Mesa-dev] [PATCH 7/7] i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.

We no longer use this message. As far as I can tell, it's fairly useless - the equivalent information is provided in the payload. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_defines.h| 1 - src/mesa/drivers/dri/i965/brw_fs.cpp | 2

[Mesa-dev] [PATCH 5/7] i965: Move load_interpolated_input/barycentric_* intrinsics to the top.

Currently, i965 interpolates all FS inputs at the top of the program. This has advantages and disadvantages, but I'd like to keep that policy while reworking this code. We can consider changing it independently. The next patch will make the compiler generate PLN instructions "on the fly", when

[Mesa-dev] [PATCH 4/7] i965: Add a pass to demote sample interpolation intrinsics.

When working with a non-multisampled render target, asking for "sample" interpolation locations doesn't make sense. We demote them to centroid. In a couple of patches, brw_compute_barycentric_modes will begin looking at these intrinsics to determine the barycentric modes. fs_visitor also will

[Mesa-dev] [PATCH 3/7] nir: Add nir_load_interpolated_input lowering code.

Now nir_lower_io can optionally produce load_interpolated_input and load_barycentric_* intrinsics for fragment shader inputs. flat inputs continue using regular load_input. Signed-off-by: Kenneth Graunke --- src/compiler/nir/nir_lower_io.c | 94

[Mesa-dev] [PATCH 6/7] i965: Rewrite FS input handling to use the new NIR intrinsics.

This eliminates the need to walk the list of input variables, recurse into their types (via logic largely redundant with nir_lower_io), and interpolate all possible inputs up front. The backend no longer has to care about variables at all, which eliminates complications from trying to pack

[Mesa-dev] [PATCH 2/7] nir: Add a nir_lower_io flag for using load_interpolated_input intrins.

While my intention is that the new intrinsics should be usable by all drivers, we need to make them optional until all drivers switch. This doesn't do anything yet, but I added it as a separate patch to keep the interface churn separate for easier review. Signed-off-by: Kenneth Graunke

[Mesa-dev] [PATCH 1/7] nir: Add new intrinsics for fragment shader input interpolation.

Backends can normally handle shader inputs solely by looking at load_input intrinsics, and ignore the nir_variables in nir->inputs. One exception is fragment shader inputs. load_input doesn't capture the necessary interpolation information - flat, smooth, noperspective mode, and centroid,

[Mesa-dev] [RFC] gallium/u_queue: add barrier function

Helper to block until all previous jobs are complete. --- So I think this might end up being useful to me in some cases.. but the implementation only works for a single threaded queue (which is all I need). I could also just put a helper in my driver code. Opinions?

[Mesa-dev] [PATCH v2 2/2] st/vdapu: use lanczos filter for scaling v2

HIGH_QUALITY_SCALING_L2 to HIGH_QUALTIY_SCALING_L9 uses lanczos filter with number representing the size of the sinc window. Signed-off-by: Nayan Deshmukh --- src/gallium/state_trackers/vdpau/mixer.c | 116 ---

[Mesa-dev] [PATCH v2 1/2] vl: add a lanczos interpolation filter v2

v2: avoiding dividing by zero when calculating lanczos Signed-off-by: Nayan Deshmukh --- src/gallium/auxiliary/Makefile.sources | 2 + src/gallium/auxiliary/vl/vl_lanczos_filter.c | 447 +++ src/gallium/auxiliary/vl/vl_lanczos_filter.h

[Mesa-dev] [Bug 96979] Mesa 10.5.7 implementation error: Trying to disable permanently enabled extensions

https://bugs.freedesktop.org/show_bug.cgi?id=96979 --- Comment #1 from Ruslan Kabatsayev --- Created attachment 125133 --> https://bugs.freedesktop.org/attachment.cgi?id=125133=edit glxinfo.{i915,haswell} files used in the command leading to the error Here're the lists

[Mesa-dev] [Bug 96979] Mesa 10.5.7 implementation error: Trying to disable permanently enabled extensions

https://bugs.freedesktop.org/show_bug.cgi?id=96979 Bug ID: 96979 Summary: Mesa 10.5.7 implementation error: Trying to disable permanently enabled extensions Product: Mesa Version: 10.5 Hardware: Other OS:

Re: [Mesa-dev] [RFC mesa] Introduce .editorconfig

On Sun, Jul 17, 2016 at 7:46 PM, Eric Engestrom wrote: > diff --git a/src/gallium/drivers/freedreno/.editorconfig > b/src/gallium/drivers/freedreno/.editorconfig > new file mode 100644 > index 000..cc8e11f > --- /dev/null > +++ b/src/gallium/drivers/freedreno/.editorconfig

Re: [Mesa-dev] [RFC mesa] Introduce .editorconfig

Eric Engestrom writes: > A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files > to try and enforce the formatting of the code, to which Michel Dänzer > suggested [1] we start by importing the existing .dir-locals.el > settings. It's too bad emacs doesn't

[Mesa-dev] [PATCH 1/3] mesa: automake: list builddir before srcdir

From: Emil Velikov In the case of building in out-of-tree fashion, while having generated in-tree sources, the latter, likely stale, files will be used by the compiler. Flip the order so prevent any issue that this may cause. Cc: "11.2 12.0"

[Mesa-dev] [PATCH 3/3] mesa: scons: remove left over src/glsl include

From: Emil Velikov The path no longer exists. Signed-off-by: Emil Velikov --- src/mesa/SConscript | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/SConscript b/src/mesa/SConscript index f72e380..05aa660 100644 ---

[Mesa-dev] [PATCH 2/3] mesa: scons: list builddir before srcdir

From: Emil Velikov Analogous to previous commit. Cc: "11.2 12.0" Cc: Alexander von Gluck IV Signed-off-by: Emil Velikov --- Alexander, if my earlier suggestion(s) don't get you

Re: [Mesa-dev] [PATCH] gallium/util: Fix debug_printf under Haiku

On 18 July 2016 at 16:28, Alexander von Gluck IV wrote: > July 18 2016 9:20 AM, "Emil Velikov" wrote: >> On 18 July 2016 at 14:39, Alexander von Gluck IV >> wrote: >> >>> July 18 2016 3:29 AM, "Nicolai Hähnle"

Re: [Mesa-dev] [PATCH 07/10] egl/android: Make drm_gralloc headers optional

On 18 July 2016 at 16:38, Tomasz Figa wrote: > On Mon, Jul 18, 2016 at 11:58 PM, Emil Velikov > wrote: >> On 18 July 2016 at 13:02, Tomasz Figa wrote: >>> On Mon, Jul 18, 2016 at 7:28 PM, Emil Velikov

Re: [Mesa-dev] [PATCH mesa v2] vl: fix memory leak

Hi Guys, I don't have the push access. Can anyone please push the patch. Thanks, Nayan. On Thu, Jul 14, 2016 at 10:36 AM, Nayan Deshmukh wrote: > Reviewed-by: Nayan Deshmukh > > > On Thu, Jul 14, 2016 at 3:20 AM, Eric Engestrom

[Mesa-dev] [PATCH 11/11] swr: [rasterizer core] introduce simd16intrin.h

Refactoring to leave existing simd_* intrinsics in "simdintrin.h" unchanged, adding corresponding simd16_* intrinsics in "simd16intrin.h" on the side, with emulation, that we can use piecemeal, rather than the all-or-nothing approach to bring up avx512. ---

[Mesa-dev] [PATCH 10/11] swr: [rasterizer core] fix for possible int32 overflow condition

--- src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp b/src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp index 897556a..1909ddb 100644 ---

[Mesa-dev] [PATCH 08/11] swr: [rasterizer core] centroid correction

--- .../drivers/swr/rasterizer/core/backend.cpp| 26 ++ 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/backend.cpp b/src/gallium/drivers/swr/rasterizer/core/backend.cpp index b492810..5d83baf 100644 ---

[Mesa-dev] [PATCH 07/11] swr: [rasterizer core] support range of values in TemplateArgUnroller

Fixes Linux warnings. --- .../drivers/swr/rasterizer/core/frontend.cpp | 13 +++-- .../drivers/swr/rasterizer/core/rasterizer.cpp | 6 ++- src/gallium/drivers/swr/rasterizer/core/utils.h| 63 +++--- 3 files changed, 56 insertions(+), 26 deletions(-) diff --git

[Mesa-dev] [PATCH 00/11] update swr rasterizer

Highlights are more avx512 work and api cleanup. Tim Rowley (11): swr: [rasterizer core] viewport rounding for disabled scissor swr: [rasterizer core] avx512 work in progress initial step swr: [rasterizer jitter] rework vertex/instance ID storage in fetch swr: [rasterizer common] icc

[Mesa-dev] [PATCH 05/11] swr: [rasterizer] attribute swizzling and linkage

Add support for enhanced attribute swizzling. Currently supports constant source overrides to handle PrimitiveID support. No support yet for input select swizzling or wrap shortest. Removes obsoleted linkageMask and associated code. --- src/gallium/drivers/swr/rasterizer/core/api.cpp| 56

[Mesa-dev] [PATCH 06/11] swr: [rasterizer core] ensure adjacent topologies use the cut-aware PA

--- src/gallium/drivers/swr/rasterizer/core/pa.h | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/pa.h b/src/gallium/drivers/swr/rasterizer/core/pa.h index 64932af..2b8110f 100644 --- a/src/gallium/drivers/swr/rasterizer/core/pa.h

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