date:20180905



On 06/09/18 07:57, Andres Gomez wrote:> Hello list,


The sixth release candidate for the Mesa 18.2.0 is now available. This
is the final planned RC.

Currently we have:
  - 32 queued.
  - 2 nominated (outstanding).
  - and 1 rejected patch.


We have in the queue:

The GLSL compiler has received a couple of fixes, including one that
solves a linker error. NIR has also gotten a couple of fixes in some
conversions.

Mesa's state tracker has gotten a patch to fix the stencil border color
for GL_DEPTH_STENCIL textures.

Intel's drivers have received several fixes, including one to correct
an important drop of performance in gen9+.

AMD's drivers have also received multiple fixes. Particularly, radv has
seen fixed a crash with GTA V and DXVK and has gotten VEGA20 support
switched on.

The Tegra driver has also gotten a leak plugged.

Gallium utils have seen another leak plugged too.

Finally, the EGL driver has gotten a leak fixed for the Wayland
platform.


Take a look at section "Mesa stable queue" for more information.


Testing reports/general approval


Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.

Promotion to Mesa 18.2.0 (final) will happen next Friday (2018/09/07),
around or shortly after 18:00 EEST. Only crucial fixes will be accepted
at this point.

If you have any questions or suggestions - be that about the current
patch queue or otherwise, please go ahead.


Trivial merge conflicts
---

No merge conflicts.

Br,
Andres


Mesa stable queue
-

Nominated (2)
=

 Dylan Baker (1):
   bf34d8a15ab meson: Print a message about why a libdrm version was 
selected

 Gert Wollny (1):
   928f031d2dc winsys/virgl: correct resource and handle allocation (v2)


Queued (32)
===

 Andres Gomez (4):
   cherry-ignore: mesa: allow GL_UNSIGNED_BYTE type for SNORM reads
   cherry-ignore: radeonsi: fix regression in indirect input swizzles.
   cherry-ignore: anv/blorp: Fix a comment as per Nanley's review feedback
   Update version to 18.2.0-rc6

 Andrii Simiklit (1):
   i965/gen6/xfb: handle case where transform feedback is not active

 Bas Nieuwenhuizen (4):
   radv: Add missing checks in radv_get_image_format_properties.
   radv: Add VEGA20 support.
   radv: Use a lower max offchip buffer count.
   radv: Fix CMASK dimensions.

 Christian Gmeiner (1):
   tegra: fix memory leak

 Dave Airlie (1):
   ac/radeonsi: fix CIK copy max size

 Ernestas Kulik (1):
   u_vbuf: Fix leak

 Ian Romanick (2):
   i965/vec4: Correctly handle uniform sources in 
generate_tes_add_indirect_urb_offset
   i965/vec4: Clamp indirect tes input array reads with 0x0fff

 Jason Ekstrand (9):
   vulkan/alloc: Add a vk_strdup helper
   anv: Copy the appliation info into the instance
 Squashed with commit:
   anv: Free the app and engine name
   anv: Claim to support depthBounds for ID games
   nir/algebraic: Be more careful converting ushr to extract_u8/16
   nir/format_convert: Fix a bitmask in unpack_11f11f10f
   egl/dri2: Add a helper for the number of planes for a FOURCC format
   egl/dri2: Guard against invalid fourcc formats
 Squashed with commit:
   st/dri: Don't expose sRGB formats to clients
   i965/screen: Allow modifiers on sRGB formats
   anv/blorp: Do more flushing around HiZ clears

 Juan A. Suarez Romero (1):
   egl/wayland: do not leak wl_buffer when it is locked

 Lionel Landwerlin (1):
   anv: blorp: support multiple aspect blits

 Marek Olšák (2):
   ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on 
SI/CI/VI
   st/mesa: help fix stencil border color for GL_DEPTH_STENCIL textures

 Mauro Rossi (1):
   egl/android: do not indent HAVE_DRM_GRALLOC preprocessor directive

 Nanley Chery (1):
   i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9

 Samuel Pitoiset (1):
   radv: fix passing clip/cull distances from VS to PS

 Timothy Arceri (1):
   glsl: skip stringification in preprocessor if in unreachable branch


This patch caused a previously hidden existing bug to pop-up its head. 
The following patch is required to avoid regressions.


https://patchwork.freedesktop.org/patch/246834/




 vadym.shovkoplias (1):
   glsl/linker: Link all out vars from a shader objects on a single stage


Rejected (1)


 Tapani Pälli (1):
   a72dbc461bd mesa: allow GL_UNSIGNED_BYTE type for SNORM reads

 Reason: The commit addresses a regression introduced by previous
 commit fa9e6c235da, which didn't make it for 18.2.


git tag: mesa-18.2.0-rc6

https://mesa.freedesktop.org/archive/mesa-18.2.0-rc6.tar.gz
MD5:  e38335dbc5b2687bd647eacb064d2963  mesa-18.2.0-rc6.tar.gz
SHA1: e699392c052f9328a0b808f1a87f954d2c4c1abb

[Mesa-dev] [PATCH v2 3/4] intel/decoder: construct correct xml filename

construct correct gen xml filename when we try to load hardware xml
description from a given path

v2: remove temporary variable (Francesco Ansanelli)

Signed-off-by: Sagar Ghuge 
Reviewed-by: Lionel Landwerlin 
---
 src/intel/common/gen_decoder.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index 9d647033cf..1ad7d6b4d3 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -463,14 +463,13 @@ character_data(void *data, const XML_Char *s, int len)
 }
 
 static int
-devinfo_to_gen(const struct gen_device_info *devinfo)
+devinfo_to_gen(const struct gen_device_info *devinfo, bool x10)
 {
-   int value = 10 * devinfo->gen;
-
-   if (devinfo->is_baytrail || devinfo->is_haswell)
-  value += 5;
+   if (devinfo->is_baytrail || devinfo->is_haswell) {
+  return devinfo->gen * 10 + 5;
+   }
 
-   return value;
+   return x10 ? devinfo->gen * 10 : devinfo->gen;
 }
 
 static uint32_t zlib_inflate(const void *compressed_data,
@@ -558,7 +557,7 @@ gen_spec_load(const struct gen_device_info *devinfo)
uint8_t *text_data = NULL;
uint32_t text_offset = 0, text_length = 0;
MAYBE_UNUSED uint32_t total_length;
-   uint32_t gen_10 = devinfo_to_gen(devinfo);
+   uint32_t gen_10 = devinfo_to_gen(devinfo, true);
 
for (int i = 0; i < ARRAY_SIZE(genxml_files_table); i++) {
   if (genxml_files_table[i].gen_10 == gen_10) {
@@ -627,7 +626,7 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
FILE *input;
 
len = snprintf(filename, filename_len, "%s/gen%i.xml",
-  path, devinfo_to_gen(devinfo));
+  path, devinfo_to_gen(devinfo, false));
assert(len < filename_len);
 
input = fopen(filename, "r");
-- 
2.17.1

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[Mesa-dev] [PATCH v2 2/4] intel/decoder: Avoid freeing invalid pointer

v2: Free ctx.spec if error while reading genxml (Lionel Landwerlin)

Signed-off-by: Sagar Ghuge 
---
 src/intel/common/gen_decoder.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index d4db8b89cc..9d647033cf 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -654,7 +654,7 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
ctx.spec = gen_spec_init();
if (ctx.spec == NULL) {
   fprintf(stderr, "Failed to create gen_spec\n");
-  return NULL;
+  goto end;
}
 
do {
@@ -662,17 +662,26 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
   len = fread(buf, 1, XML_BUFFER_SIZE, input);
   if (len == 0) {
  fprintf(stderr, "fread: %m\n");
- free(ctx.spec);
+ gen_spec_destroy(ctx.spec);
  ctx.spec = NULL;
  goto end;
+  } else {
+ if (ferror(input)) {
+fprintf(stderr, "fread: %m\n");
+gen_spec_destroy(ctx.spec);
+ctx.spec = NULL;
+goto end;
+ } else if (feof(input))
+goto end;
   }
+
   if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) {
  fprintf(stderr,
  "Error parsing XML at line %ld col %ld: %s\n",
  XML_GetCurrentLineNumber(ctx.parser),
  XML_GetCurrentColumnNumber(ctx.parser),
  XML_ErrorString(XML_GetErrorCode(ctx.parser)));
- free(ctx.spec);
+ gen_spec_destroy(ctx.spec);
  ctx.spec = NULL;
  goto end;
   }
-- 
2.17.1

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[Mesa-dev] [PATCH] gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITS

From: Marek Olšák 

---
 src/gallium/auxiliary/util/u_screen.c  | 3 +++
 src/gallium/docs/source/screen.rst | 2 ++
 src/gallium/drivers/r600/r600_pipe.c   | 1 +
 src/gallium/drivers/radeonsi/si_get.c  | 1 +
 src/gallium/include/pipe/p_defines.h   | 1 +
 src/mesa/state_tracker/st_extensions.c | 1 +
 6 files changed, 9 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_screen.c 
b/src/gallium/auxiliary/util/u_screen.c
index 7efc9c23bc4..a4d62aa06b7 100644
--- a/src/gallium/auxiliary/util/u_screen.c
+++ b/src/gallium/auxiliary/util/u_screen.c
@@ -247,20 +247,23 @@ u_pipe_screen_get_param_defaults(struct pipe_screen 
*pscreen,
case PIPE_CAP_MAX_WINDOW_RECTANGLES: /* Enables EXT_window_rectangles */
case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
   return 0;
 
+   case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
+  return 4; /* GLES 2.0 minimum value */
+
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
   return 1;
 
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:
case PIPE_CAP_TGSI_TEX_TXF_LZ:
case PIPE_CAP_TGSI_CLOCK:
diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index 66b7221c932..c3bf3efc43b 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -335,20 +335,22 @@ The integer capabilities:
   extension and thus implements proper support for culling planes.
 * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is
   supported for patch primitives.
 * ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders.
 * ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles
   supported in ``set_window_rectangles``.
 * ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements 
support
   for ``pipe_rasterizer_state::offset_units_unscaled``.
 * ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for
   floating point viewport bounds.
+* ``PIPE_CAP_RASTERIZER_SUBPIXEL_BITS``: Number of bits of subpixel precision 
used
+  by the rasterizer.
 * ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback
   support for color/depth format combinations that use a different
   number of bits. For the purpose of this cap, Z24 is treated as
   32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
   combination will require a driver fallback, and should not be
   advertised in the GLX/EGL config list.
 * ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the
   UsageMask of input and output declarations and allows declaring arrays
   in overlapping ranges. The components must be a contiguous range, e.g. a
   UsageMask of  xy or yzw is allowed, but xz or yw isn't. Declarations with
diff --git a/src/gallium/drivers/r600/r600_pipe.c 
b/src/gallium/drivers/r600/r600_pipe.c
index a43381f4e47..979d2ef40c9 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -504,20 +504,21 @@ static int r600_get_param(struct pipe_screen* pscreen, 
enum pipe_cap param)
return 2048;
 
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
/* XXX some r6xx are buggy and can only do 4 */
return 8;
 
case PIPE_CAP_MAX_VIEWPORTS:
return R600_MAX_VIEWPORTS;
case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+   case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
return 8;
 
/* Timer queries, present when the clock frequency is non zero. */
case PIPE_CAP_QUERY_TIME_ELAPSED:
return rscreen->b.info.clock_crystal_freq != 0;
case PIPE_CAP_QUERY_TIMESTAMP:
return rscreen->b.info.drm_minor >= 20 &&
   rscreen->b.info.clock_crystal_freq != 0;
 
case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
diff --git a/src/gallium/drivers/radeonsi/si_get.c 
b/src/gallium/drivers/radeonsi/si_get.c
index b7d5468e000..db72a003a16 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -283,20 +283,21 @@ static int si_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
/* textures support 8192, but layered rendering supports 2048 */
return 12;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
/* textures support 8192, but layered rendering supports 2048 */
return 2048;
 
/* Viewports and render targets. */
case PIPE_CAP_MAX_VIEWPORTS:
return SI_MAX_VIEWPORTS;
case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+   case

Re: [Mesa-dev] [PATCH] gallium: Set the default GL_SUBPIXEL_BITS to 4.

Yeah I wanted to add the CAP but forgot.

Marek

On Wed, Sep 5, 2018 at 7:26 PM, Roland Scheidegger  wrote:
> I really think it makes no sense to hack some more around this.
>
> GLES (even 3.2) doesn't even support non-integer viewports.
> As I mentioned before, it's incorrect to report more than 0 bits for
> viewport subpixels if a driver only supports integer viewports.
> To fix this for real really 2 caps would be needed, one for subpixel
> bits (which can have a default of 4), and one for viewport subpixel bits
> (which should be default 0), so the state tracker doesn't use the same
> setting for both queries.
>
> Roland
>
>
> Am 05.09.2018 um 16:56 schrieb Eric Anholt:
>> This is the minimum value for GLES2, and 0 certainly wouldn't be valid.
>> Fixes dEQP-GLES2.functional.state_query.integers.subpixel_bits_getfloat
>> and friends.
>> ---
>>  src/gallium/auxiliary/util/u_screen.c | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/src/gallium/auxiliary/util/u_screen.c 
>> b/src/gallium/auxiliary/util/u_screen.c
>> index d19d604e0c51..3ac2f15a5356 100644
>> --- a/src/gallium/auxiliary/util/u_screen.c
>> +++ b/src/gallium/auxiliary/util/u_screen.c
>> @@ -246,7 +246,11 @@ u_pipe_screen_get_param_defaults(struct pipe_screen 
>> *pscreen,
>> case PIPE_CAP_TGSI_VOTE:
>> case PIPE_CAP_MAX_WINDOW_RECTANGLES: /* Enables EXT_window_rectangles */
>> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
>> +  return 0;
>> +
>> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
>> +  return 4; /* GLES 2.0 minimum maximum value. */
>> +
>> case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
>> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
>> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
>>
>
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[Mesa-dev] [PATCH v2 1/4] intel/decoder: add gen_spec_init method

Initialize gen_spec instance properly when loading hardware xml
description from specifc directory to avoid segmentation fault.

v2: correct function definition (Lionel Landwerlin)

Signed-off-by: Sagar Ghuge 
Reviewed-by: Lionel Landwerlin 
---
 src/intel/common/gen_decoder.c | 51 +++---
 1 file changed, 35 insertions(+), 16 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index c6c213fcd1..d4db8b89cc 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -526,6 +526,30 @@ static uint32_t _hash_uint32(const void *key)
return (uint32_t) (uintptr_t) key;
 }
 
+static struct gen_spec *
+gen_spec_init(void)
+{
+   struct gen_spec *spec;
+   spec = rzalloc(NULL, struct gen_spec);
+   if (spec == NULL)
+  return NULL;
+
+   spec->commands =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->structs =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->registers_by_name =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->registers_by_offset =
+  _mesa_hash_table_create(spec, _hash_uint32, _mesa_key_pointer_equal);
+   spec->enums =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->access_cache =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+
+   return spec;
+}
+
 struct gen_spec *
 gen_spec_load(const struct gen_device_info *devinfo)
 {
@@ -560,21 +584,11 @@ gen_spec_load(const struct gen_device_info *devinfo)
XML_SetElementHandler(ctx.parser, start_element, end_element);
XML_SetCharacterDataHandler(ctx.parser, character_data);
 
-   ctx.spec = rzalloc(NULL, struct gen_spec);
-
-   ctx.spec->commands =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->structs =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->registers_by_name =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->registers_by_offset =
-  _mesa_hash_table_create(ctx.spec, _hash_uint32, _mesa_key_pointer_equal);
-   ctx.spec->enums =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-
-   ctx.spec->access_cache =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
+   ctx.spec = gen_spec_init();
+   if (ctx.spec == NULL) {
+  fprintf(stderr, "Failed to create gen_spec\n");
+  return NULL;
+   }
 
total_length = zlib_inflate(compress_genxmls,
sizeof(compress_genxmls),
@@ -636,7 +650,12 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
XML_SetElementHandler(ctx.parser, start_element, end_element);
XML_SetCharacterDataHandler(ctx.parser, character_data);
ctx.loc.filename = filename;
-   ctx.spec = rzalloc(NULL, struct gen_spec);
+
+   ctx.spec = gen_spec_init();
+   if (ctx.spec == NULL) {
+  fprintf(stderr, "Failed to create gen_spec\n");
+  return NULL;
+   }
 
do {
   buf = XML_GetBuffer(ctx.parser, XML_BUFFER_SIZE);
-- 
2.17.1

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[Mesa-dev] [PATCH 6/8] st/mesa: pin driver threads to a specific L3 cache on AMD Zen CPUs

From: Marek Olšák 

---
 src/gallium/auxiliary/util/u_helpers.c | 40 ++
 src/gallium/auxiliary/util/u_helpers.h |  4 ++
 src/mesa/state_tracker/st_context.c|  3 ++
 src/mesa/state_tracker/st_manager.c|  9 
 src/util/u_thread.h| 57 ++
 5 files changed, 113 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_helpers.c 
b/src/gallium/auxiliary/util/u_helpers.c
index 25d8fbce6f7..8374940fc41 100644
--- a/src/gallium/auxiliary/util/u_helpers.c
+++ b/src/gallium/auxiliary/util/u_helpers.c
@@ -18,23 +18,25 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  * IN NO EVENT SHALL THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  **/
 
+#include "util/u_cpu_detect.h"
 #include "util/u_helpers.h"
 #include "util/u_inlines.h"
 #include "util/u_upload_mgr.h"
+#include "util/u_thread.h"
 #include 
 
 /**
  * This function is used to copy an array of pipe_vertex_buffer structures,
  * while properly referencing the pipe_vertex_buffer::buffer member.
  *
  * enabled_buffers is updated such that the bits corresponding to the indices
  * of disabled buffers are set to 0 and the enabled ones are set to 1.
  *
  * \sa util_copy_framebuffer_state
@@ -111,20 +113,58 @@ util_upload_index_buffer(struct pipe_context *pipe,
 
u_upload_data(pipe->stream_uploader, start_offset,
  info->count * info->index_size, 4,
  (char*)info->index.user + start_offset,
  out_offset, out_buffer);
u_upload_unmap(pipe->stream_uploader);
*out_offset -= start_offset;
return *out_buffer != NULL;
 }
 
+/**
+ * Called by MakeCurrent. Used to notify the driver that the application
+ * thread may have been changed.
+ *
+ * The function pins the current thread and driver threads to a group of
+ * CPU cores that share the same L3 cache. This is needed for good multi-
+ * threading performance on AMD Zen CPUs.
+ *
+ * \param upper_thread  thread in the state tracker that also needs to be
+ *  pinned.
+ */
+void
+util_context_thread_changed(struct pipe_context *ctx, thrd_t *upper_thread)
+{
+   thrd_t current = thrd_current();
+   int cache = util_get_L3_for_pinned_thread(current,
+ util_cpu_caps.cores_per_L3);
+
+   /* If the main thread is not pinned, choose the L3 cache. */
+   if (cache == -1) {
+  unsigned num_caches = util_cpu_caps.nr_cpus /
+util_cpu_caps.cores_per_L3;
+  static unsigned last_cache;
+
+  /* Choose a different L3 cache for each subsequent MakeCurrent. */
+  cache = p_atomic_inc_return(_cache) % num_caches;
+  util_pin_thread_to_L3(current, cache, util_cpu_caps.cores_per_L3);
+   }
+
+   /* Tell the driver to pin its threads to the same L3 cache. */
+   if (ctx->pin_threads_to_L3_cache)
+  ctx->pin_threads_to_L3_cache(ctx, cache);
+
+   /* Do the same for the upper level thread if there is any (e.g. glthread) */
+   if (upper_thread)
+  util_pin_thread_to_L3(*upper_thread, cache, util_cpu_caps.cores_per_L3);
+}
+
 /* This is a helper for hardware bring-up. Don't remove. */
 struct pipe_query *
 util_begin_pipestat_query(struct pipe_context *ctx)
 {
struct pipe_query *q =
   ctx->create_query(ctx, PIPE_QUERY_PIPELINE_STATISTICS, 0);
if (!q)
   return NULL;
 
ctx->begin_query(ctx, q);
diff --git a/src/gallium/auxiliary/util/u_helpers.h 
b/src/gallium/auxiliary/util/u_helpers.h
index e65e64d7781..38c47c1cc98 100644
--- a/src/gallium/auxiliary/util/u_helpers.h
+++ b/src/gallium/auxiliary/util/u_helpers.h
@@ -22,20 +22,21 @@
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  **/
 
 #ifndef U_HELPERS_H
 #define U_HELPERS_H
 
 #include "pipe/p_state.h"
+#include "c11/threads.h"
 #include 
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 void util_set_vertex_buffers_mask(struct pipe_vertex_buffer *dst,
   uint32_t *enabled_buffers,
   const struct pipe_vertex_buffer *src,
   unsigned start_slot, unsigned count);
@@ -43,20 +44,23 @@ void util_set_vertex_buffers_mask(struct pipe_vertex_buffer 
*dst,
 void util_set_vertex_buffers_count(struct pipe_vertex_buffer *dst,
unsigned

[Mesa-dev] [PATCH 8/8] radeonsi: pin the winsys thread to the requested L3 cache

From: Marek Olšák 

---
 src/gallium/drivers/radeon/radeon_winsys.h|  8 
 src/gallium/drivers/radeonsi/si_pipe.c|  8 
 src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 10 ++
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 13 +
 4 files changed, 39 insertions(+)

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h 
b/src/gallium/drivers/radeon/radeon_winsys.h
index b75a2331b95..5ac75b70e77 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -251,20 +251,28 @@ struct radeon_winsys {
 
 /**
  * Query an info structure from winsys.
  *
  * \param wsThe winsys this function is called from.
  * \param info  Return structure
  */
 void (*query_info)(struct radeon_winsys *ws,
struct radeon_info *info);
 
+/**
+ * A hint for the winsys that it should pin its execution threads to
+ * a group of cores sharing a specific L3 cache if the CPU has multiple
+ * L3 caches. This is needed for good multithreading performance on
+ * AMD Zen CPUs.
+ */
+void (*pin_threads_to_L3_cache)(struct radeon_winsys *ws, unsigned cache);
+
 /**
  * Buffer management. Buffer attributes are mostly fixed over its lifetime.
  *
  * Remember that gallium gets to choose the interface it needs, and the
  * window systems must then implement that interface (rather than the
  * other way around...).
  */
 
 /**
  * Create a buffer object.
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 9156f3e708c..f8e5df9b382 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -345,40 +345,48 @@ static void si_set_debug_callback(struct pipe_context 
*ctx,
 static void si_set_log_context(struct pipe_context *ctx,
   struct u_log_context *log)
 {
struct si_context *sctx = (struct si_context *)ctx;
sctx->log = log;
 
if (log)
u_log_add_auto_logger(log, si_auto_log_cs, sctx);
 }
 
+static void si_pin_threads_to_L3_cache(struct pipe_context *ctx, unsigned 
cache)
+{
+   struct radeon_winsys *ws = ((struct si_context *)ctx)->ws;
+
+   ws->pin_threads_to_L3_cache(ws, cache);
+}
+
 static struct pipe_context *si_create_context(struct pipe_screen *screen,
   unsigned flags)
 {
struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
struct radeon_winsys *ws = sscreen->ws;
int shader, i;
 
if (!sctx)
return NULL;
 
if (flags & PIPE_CONTEXT_DEBUG)
sscreen->record_llvm_ir = true; /* racy but not critical */
 
sctx->b.screen = screen; /* this must be set first */
sctx->b.priv = NULL;
sctx->b.destroy = si_destroy_context;
sctx->b.emit_string_marker = si_emit_string_marker;
sctx->b.set_debug_callback = si_set_debug_callback;
sctx->b.set_log_context = si_set_log_context;
+   sctx->b.pin_threads_to_L3_cache = si_pin_threads_to_L3_cache;
sctx->screen = sscreen; /* Easy accessing of screen/winsys. */
sctx->is_debug = (flags & PIPE_CONTEXT_DEBUG) != 0;
 
slab_create_child(>pool_transfers, >pool_transfers);
slab_create_child(>pool_transfers_unsync, 
>pool_transfers);
 
sctx->ws = sscreen->ws;
sctx->family = sscreen->info.family;
sctx->chip_class = sscreen->info.chip_class;
 
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c 
b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index dcbc075e3c5..f32bbd9d086 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -23,20 +23,21 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  * The above copyright notice and this permission notice (including the
  * next paragraph) shall be included in all copies or substantial portions
  * of the Software.
  */
 
 #include "amdgpu_cs.h"
 #include "amdgpu_public.h"
 
+#include "util/u_cpu_detect.h"
 #include "util/u_hash_table.h"
 #include "util/hash_table.h"
 #include "util/xmlconfig.h"
 #include 
 #include 
 #include 
 #include 
 #include "amd/common/sid.h"
 #include "amd/common/gfx9d.h"
 
@@ -228,20 +229,28 @@ static bool amdgpu_winsys_unref(struct radeon_winsys *rws)
simple_mtx_unlock(_tab_mutex);
return destroy;
 }
 
 static const char* amdgpu_get_chip_name(struct radeon_winsys *ws)
 {
amdgpu_device_handle dev = ((struct amdgpu_winsys *)ws)->dev;
return amdgpu_get_marketing_name(dev);
 }
 
+static void amdgpu_pin_threads_to_L3_cache(struct radeon_winsys *rws,
+

[Mesa-dev] [PATCH 5/8] gallium: add pipe_context::pin_threads_to_L3_cache for AMD Zen

From: Marek Olšák 

State trackers will not use this directly, but will instead use a helper
in MakeCurrent that does the right thing.
---
 .../auxiliary/driver_ddebug/dd_context.c   | 10 ++
 src/gallium/auxiliary/driver_noop/noop_pipe.c  |  6 ++
 .../auxiliary/driver_trace/tr_context.c| 18 ++
 src/gallium/include/pipe/p_context.h   |  9 +
 4 files changed, 43 insertions(+)

diff --git a/src/gallium/auxiliary/driver_ddebug/dd_context.c 
b/src/gallium/auxiliary/driver_ddebug/dd_context.c
index a1b6c971e89..51719b6679b 100644
--- a/src/gallium/auxiliary/driver_ddebug/dd_context.c
+++ b/src/gallium/auxiliary/driver_ddebug/dd_context.c
@@ -752,20 +752,29 @@ dd_context_delete_image_handle(struct pipe_context 
*_pipe, uint64_t handle)
 static void
 dd_context_make_image_handle_resident(struct pipe_context *_pipe,
   uint64_t handle, unsigned access,
   bool resident)
 {
struct pipe_context *pipe = dd_context(_pipe)->pipe;
 
pipe->make_image_handle_resident(pipe, handle, access, resident);
 }
 
+static void
+dd_context_pin_threads_to_L3_cache(struct pipe_context *_pipe,
+   unsigned cache)
+{
+   struct pipe_context *pipe = dd_context(_pipe)->pipe;
+
+   pipe->pin_threads_to_L3_cache(pipe, cache);
+}
+
 struct pipe_context *
 dd_context_create(struct dd_screen *dscreen, struct pipe_context *pipe)
 {
struct dd_context *dctx;
 
if (!pipe)
   return NULL;
 
dctx = CALLOC_STRUCT(dd_context);
if (!dctx)
@@ -855,20 +864,21 @@ dd_context_create(struct dd_screen *dscreen, struct 
pipe_context *pipe)
CTX_INIT(get_device_reset_status);
CTX_INIT(set_device_reset_callback);
CTX_INIT(dump_debug_state);
CTX_INIT(emit_string_marker);
CTX_INIT(create_texture_handle);
CTX_INIT(delete_texture_handle);
CTX_INIT(make_texture_handle_resident);
CTX_INIT(create_image_handle);
CTX_INIT(delete_image_handle);
CTX_INIT(make_image_handle_resident);
+   CTX_INIT(pin_threads_to_L3_cache);
 
dd_init_draw_functions(dctx);
 
u_log_context_init(>log);
if (pipe->set_log_context)
   pipe->set_log_context(pipe, >log);
 
dctx->draw_state.sample_mask = ~0;
 
list_inithead(>records);
diff --git a/src/gallium/auxiliary/driver_noop/noop_pipe.c 
b/src/gallium/auxiliary/driver_noop/noop_pipe.c
index 7de3e882398..a8d7d16a696 100644
--- a/src/gallium/auxiliary/driver_noop/noop_pipe.c
+++ b/src/gallium/auxiliary/driver_noop/noop_pipe.c
@@ -305,20 +305,25 @@ static boolean noop_generate_mipmap(struct pipe_context 
*ctx,
 unsigned last_layer)
 {
return true;
 }
 
 static void noop_invalidate_resource(struct pipe_context *ctx,
  struct pipe_resource *resource)
 {
 }
 
+static void noop_pin_threads_to_L3_cache(struct pipe_context *ctx,
+ unsigned L3_cache_index)
+{
+}
+
 static struct pipe_context *noop_create_context(struct pipe_screen *screen,
 void *priv, unsigned flags)
 {
struct pipe_context *ctx = CALLOC_STRUCT(pipe_context);
 
if (!ctx)
   return NULL;
 
ctx->screen = screen;
ctx->priv = priv;
@@ -344,20 +349,21 @@ static struct pipe_context *noop_create_context(struct 
pipe_screen *screen,
ctx->begin_query = noop_begin_query;
ctx->end_query = noop_end_query;
ctx->get_query_result = noop_get_query_result;
ctx->set_active_query_state = noop_set_active_query_state;
ctx->transfer_map = noop_transfer_map;
ctx->transfer_flush_region = noop_transfer_flush_region;
ctx->transfer_unmap = noop_transfer_unmap;
ctx->buffer_subdata = noop_buffer_subdata;
ctx->texture_subdata = noop_texture_subdata;
ctx->invalidate_resource = noop_invalidate_resource;
+   ctx->pin_threads_to_L3_cache = noop_pin_threads_to_L3_cache;
noop_init_state_functions(ctx);
 
return ctx;
 }
 
 
 /*
  * pipe_screen
  */
 static void noop_flush_frontbuffer(struct pipe_screen *_screen,
diff --git a/src/gallium/auxiliary/driver_trace/tr_context.c 
b/src/gallium/auxiliary/driver_trace/tr_context.c
index dc091aee2e9..13f147316f3 100644
--- a/src/gallium/auxiliary/driver_trace/tr_context.c
+++ b/src/gallium/auxiliary/driver_trace/tr_context.c
@@ -1569,20 +1569,37 @@ trace_context_invalidate_resource(struct pipe_context 
*_context,
trace_dump_call_begin("pipe_context", "invalidate_resource");
 
trace_dump_arg(ptr, context);
trace_dump_arg(ptr, resource);
 
trace_dump_call_end();
 
context->invalidate_resource(context, resource);
 }
 
+static void
+trace_context_pin_threads_to_L3_cache(struct pipe_context *_context,
+  unsigned cache)
+{
+   struct trace_context *tr_context = trace_context(_context);
+   struct pipe_context *context = tr_context->pipe;
+
+

[Mesa-dev] [PATCH 7/8] gallium/u_threaded: implement pin_threads_to_L3_cache

From: Marek Olšák 

---
 .../auxiliary/util/u_threaded_context.c   | 23 +++
 .../auxiliary/util/u_threaded_context.h   |  1 +
 .../auxiliary/util/u_threaded_context_calls.h |  1 +
 3 files changed, 25 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_threaded_context.c 
b/src/gallium/auxiliary/util/u_threaded_context.c
index fc7eb138835..95b98514a12 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -1892,20 +1892,42 @@ tc_create_video_codec(UNUSED struct pipe_context *_pipe,
 }
 
 static struct pipe_video_buffer *
 tc_create_video_buffer(UNUSED struct pipe_context *_pipe,
UNUSED const struct pipe_video_buffer *templ)
 {
unreachable("Threaded context should not be enabled for video APIs");
return NULL;
 }
 
+static void
+tc_call_pin_threads_to_L3_cache(struct pipe_context *pipe,
+union tc_payload *payload)
+{
+   pipe->pin_threads_to_L3_cache(pipe, payload->uint);
+}
+
+static void
+tc_pin_threads_to_L3_cache(struct pipe_context *_pipe,
+   unsigned cache)
+{
+   struct threaded_context *tc = threaded_context(_pipe);
+   union tc_payload *payload =
+  tc_add_small_call(tc, TC_CALL_pin_threads_to_L3_cache);
+
+   payload->uint = cache;
+
+   /* Pin the gallium thread as requested. */
+   util_pin_thread_to_L3(tc->queue.threads[0], cache,
+ util_cpu_caps.cores_per_L3);
+}
+
 
 /
  * draw, launch, clear, blit, copy, flush
  */
 
 struct tc_flush_payload {
struct threaded_context *tc;
struct pipe_fence_handle *fence;
unsigned flags;
 };
@@ -2683,20 +2705,21 @@ threaded_context_create(struct pipe_context *pipe,
CTX_INIT(create_fence_fd);
CTX_INIT(fence_server_sync);
CTX_INIT(fence_server_signal);
CTX_INIT(get_timestamp);
CTX_INIT(create_texture_handle);
CTX_INIT(delete_texture_handle);
CTX_INIT(make_texture_handle_resident);
CTX_INIT(create_image_handle);
CTX_INIT(delete_image_handle);
CTX_INIT(make_image_handle_resident);
+   CTX_INIT(pin_threads_to_L3_cache);
 #undef CTX_INIT
 
if (out)
   *out = tc;
 
return >base;
 
 fail:
tc_destroy(>base);
return NULL;
diff --git a/src/gallium/auxiliary/util/u_threaded_context.h 
b/src/gallium/auxiliary/util/u_threaded_context.h
index be6933d05a4..e3cb05318b2 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.h
+++ b/src/gallium/auxiliary/util/u_threaded_context.h
@@ -304,20 +304,21 @@ struct threaded_query {
 /* This is the second half of tc_call containing call data.
  * Most calls will typecast this to the type they need, typically larger
  * than 8 bytes.
  */
 union tc_payload {
struct pipe_query *query;
struct pipe_resource *resource;
struct pipe_transfer *transfer;
struct pipe_fence_handle *fence;
uint64_t handle;
+   unsigned uint;
 };
 
 #ifdef _MSC_VER
 #define ALIGN16 __declspec(align(16))
 #else
 #define ALIGN16 __attribute__((aligned(16)))
 #endif
 
 /* Each call slot should be aligned to its own size for optimal cache usage. */
 struct ALIGN16 tc_call {
diff --git a/src/gallium/auxiliary/util/u_threaded_context_calls.h 
b/src/gallium/auxiliary/util/u_threaded_context_calls.h
index 921b86a67f0..42f244f1c67 100644
--- a/src/gallium/auxiliary/util/u_threaded_context_calls.h
+++ b/src/gallium/auxiliary/util/u_threaded_context_calls.h
@@ -42,20 +42,21 @@ CALL(set_stencil_ref)
 CALL(set_clip_state)
 CALL(set_sample_mask)
 CALL(set_min_samples)
 CALL(set_polygon_stipple)
 CALL(texture_barrier)
 CALL(memory_barrier)
 CALL(delete_texture_handle)
 CALL(make_texture_handle_resident)
 CALL(delete_image_handle)
 CALL(make_image_handle_resident)
+CALL(pin_threads_to_L3_cache)
 
 CALL(bind_blend_state)
 CALL(bind_rasterizer_state)
 CALL(bind_depth_stencil_alpha_state)
 CALL(bind_compute_state)
 CALL(bind_fs_state)
 CALL(bind_vs_state)
 CALL(bind_gs_state)
 CALL(bind_tcs_state)
 CALL(bind_tes_state)
-- 
2.17.1

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[Mesa-dev] [PATCH 1/8] gallium/u_cpu_detect: fix a race condition on initialization

From: Marek Olšák 

---
 src/gallium/auxiliary/util/u_cpu_detect.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c 
b/src/gallium/auxiliary/util/u_cpu_detect.c
index 14003aa7692..93cf58011db 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -29,20 +29,21 @@
  * CPU feature detection.
  *
  * @author Dennis Smit
  * @author Based on the work of Eric Anholt 
  */
 
 #include "pipe/p_config.h"
 
 #include "u_debug.h"
 #include "u_cpu_detect.h"
+#include "c11/threads.h"
 
 #if defined(PIPE_ARCH_PPC)
 #if defined(PIPE_OS_APPLE)
 #include 
 #else
 #include 
 #include 
 #endif
 #endif
 
@@ -359,28 +360,23 @@ check_os_arm_support(void)
  util_cpu_caps.has_neon = (hwcap >> 12) & 1;
  break;
   }
}
close (fd);
 }
 #endif /* PIPE_OS_LINUX */
 }
 #endif /* PIPE_ARCH_ARM */
 
-void
-util_cpu_detect(void)
+static void
+util_cpu_detect_once(void)
 {
-   static boolean util_cpu_detect_initialized = FALSE;
-
-   if(util_cpu_detect_initialized)
-  return;
-
memset(_cpu_caps, 0, sizeof util_cpu_caps);
 
/* Count the number of CPUs in system */
 #if defined(PIPE_OS_WINDOWS)
{
   SYSTEM_INFO system_info;
   GetSystemInfo(_info);
   util_cpu_caps.nr_cpus = system_info.dwNumberOfProcessors;
}
 #elif defined(PIPE_OS_UNIX) && defined(_SC_NPROCESSORS_ONLN)
@@ -554,13 +550,19 @@ util_cpu_detect(void)
   debug_printf("util_cpu_caps.has_avx512dq = %u\n", 
util_cpu_caps.has_avx512dq);
   debug_printf("util_cpu_caps.has_avx512ifma = %u\n", 
util_cpu_caps.has_avx512ifma);
   debug_printf("util_cpu_caps.has_avx512pf = %u\n", 
util_cpu_caps.has_avx512pf);
   debug_printf("util_cpu_caps.has_avx512er = %u\n", 
util_cpu_caps.has_avx512er);
   debug_printf("util_cpu_caps.has_avx512cd = %u\n", 
util_cpu_caps.has_avx512cd);
   debug_printf("util_cpu_caps.has_avx512bw = %u\n", 
util_cpu_caps.has_avx512bw);
   debug_printf("util_cpu_caps.has_avx512vl = %u\n", 
util_cpu_caps.has_avx512vl);
   debug_printf("util_cpu_caps.has_avx512vbmi = %u\n", 
util_cpu_caps.has_avx512vbmi);
}
 #endif
+}
+
+static once_flag cpu_once_flag = ONCE_FLAG_INIT;
 
-   util_cpu_detect_initialized = TRUE;
+void
+util_cpu_detect(void)
+{
+   call_once(_once_flag, util_cpu_detect_once);
 }
-- 
2.17.1

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[Mesa-dev] [PATCH 2/8] gallium/u_cpu_detect: fix parsing the CPU family

From: Marek Olšák 

According to:
https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf

Also Intel:
https://www.microbe.cz/docs/CPUID.pdf
---
 src/gallium/auxiliary/util/u_cpu_detect.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c 
b/src/gallium/auxiliary/util/u_cpu_detect.c
index 93cf58011db..29f4ce98203 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -413,22 +413,23 @@ util_cpu_detect_once(void)
 
   /* Get max cpuid level */
   cpuid(0x, regs);
 
   if (regs[0] >= 0x0001) {
  unsigned int cacheline;
 
  cpuid (0x0001, regs2);
 
  util_cpu_caps.x86_cpu_type = (regs2[0] >> 8) & 0xf;
+ /* Add "extended family". */
  if (util_cpu_caps.x86_cpu_type == 0xf)
- util_cpu_caps.x86_cpu_type = 8 + ((regs2[0] >> 20) & 255); /* use 
extended family (P4, IA64) */
+ util_cpu_caps.x86_cpu_type += ((regs2[0] >> 20) & 0xff);
 
  /* general feature flags */
  util_cpu_caps.has_tsc= (regs2[3] >>  4) & 1; /* 0x010 */
  util_cpu_caps.has_mmx= (regs2[3] >> 23) & 1; /* 0x080 */
  util_cpu_caps.has_sse= (regs2[3] >> 25) & 1; /* 0x200 */
  util_cpu_caps.has_sse2   = (regs2[3] >> 26) & 1; /* 0x400 */
  util_cpu_caps.has_sse3   = (regs2[2] >>  0) & 1; /* 0x001 */
  util_cpu_caps.has_ssse3  = (regs2[2] >>  9) & 1; /* 0x020 */
  util_cpu_caps.has_sse4_1 = (regs2[2] >> 19) & 1;
  util_cpu_caps.has_sse4_2 = (regs2[2] >> 20) & 1;
-- 
2.17.1

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[Mesa-dev] [PATCH 0/8] Gallium & RadeonSI optimization for Ryzen CPUs

Hi,

When the Ryzen CPUs were launched, they didn't perform very well in
games, and it took a while before games were patched. Guess what,
Mesa drivers have suffered from the same inefficincies until now.

The AMD Zen architecture has multiple core complexes (CCX) where each
CCX has e.g. 4C/8T and always one L3 cache. If application and driver
threads don't run on the same CCX, communication between threads is
slow, because multiple L3 caches must maintain coherency between them.
Atomic operations seem to suffer the most, almost as if they were
uncached. (are they?)

This series pins the application thread and all driver execution
threads to 1 L3 cache (1 CCX). If the application thread is already
pinned to a hw thread or core(s), all driver threads are pinned to
the same L3 cache (CCX) as the application thread.

Shader compiler threads are unpinned, as they are not critical.

The piglit/drawoverhead microbenchmark shows that this increases
performance by 32% for DrawElements and 25% for DrawArrays on Ryzen
1st-Gen CPUs. It will probably be much less with real apps.

Please review.

Thanks,
Marek
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[Mesa-dev] [PATCH 4/8] gallium/os_thread: simplify helper pipe_current_thread_get_time_nano

From: Marek Olšák 

---
 src/gallium/auxiliary/os/os_thread.h | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/gallium/auxiliary/os/os_thread.h 
b/src/gallium/auxiliary/os/os_thread.h
index f2629c5ffe5..322888b825f 100644
--- a/src/gallium/auxiliary/os/os_thread.h
+++ b/src/gallium/auxiliary/os/os_thread.h
@@ -158,18 +158,14 @@ pipe_tsd_set(pipe_tsd *tsd, void *value)
 
 
 /*
  * Thread statistics.
  */
 
 /* Return the time of the current thread's CPU time clock. */
 static inline int64_t
 pipe_current_thread_get_time_nano(void)
 {
-#if defined(HAVE_PTHREAD)
-   return u_thread_get_time_nano(pthread_self());
-#else
-   return 0;
-#endif
+   return u_thread_get_time_nano(thrd_current());
 }
 
 #endif /* OS_THREAD_H_ */
-- 
2.17.1

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[Mesa-dev] [PATCH 3/8] gallium/u_cpu_detect: get the number of cores per L3 cache for AMD Zen

From: Marek Olšák 

---
 src/gallium/auxiliary/util/u_cpu_detect.c | 24 +++
 src/gallium/auxiliary/util/u_cpu_detect.h |  1 +
 2 files changed, 25 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c 
b/src/gallium/auxiliary/util/u_cpu_detect.c
index 29f4ce98203..751443f06f9 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -360,20 +360,42 @@ check_os_arm_support(void)
  util_cpu_caps.has_neon = (hwcap >> 12) & 1;
  break;
   }
}
close (fd);
 }
 #endif /* PIPE_OS_LINUX */
 }
 #endif /* PIPE_ARCH_ARM */
 
+static void
+get_cpu_topology(void)
+{
+   uint32_t regs[4];
+
+   /* Default. This is correct if L3 is not present or there is only one. */
+   util_cpu_caps.cores_per_L3 = util_cpu_caps.nr_cpus;
+
+#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
+   /* AMD Zen */
+   if (util_cpu_caps.x86_cpu_type == 0x17) {
+  /* Query the L3 cache topology information. */
+  cpuid_count(0x801D, 3, regs);
+  unsigned cache_level = (regs[0] >> 5) & 0x7;
+  unsigned cores_per_cache = ((regs[0] >> 14) & 0xfff) + 1;
+
+  if (cache_level == 3)
+ util_cpu_caps.cores_per_L3 = cores_per_cache;
+   }
+#endif
+}
+
 static void
 util_cpu_detect_once(void)
 {
memset(_cpu_caps, 0, sizeof util_cpu_caps);
 
/* Count the number of CPUs in system */
 #if defined(PIPE_OS_WINDOWS)
{
   SYSTEM_INFO system_info;
   GetSystemInfo(_info);
@@ -513,20 +535,22 @@ util_cpu_detect_once(void)
 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
 
 #if defined(PIPE_ARCH_ARM)
check_os_arm_support();
 #endif
 
 #if defined(PIPE_ARCH_PPC)
check_os_altivec_support();
 #endif /* PIPE_ARCH_PPC */
 
+   get_cpu_topology();
+
 #ifdef DEBUG
if (debug_get_option_dump_cpu()) {
   debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps.nr_cpus);
 
   debug_printf("util_cpu_caps.x86_cpu_type = %u\n", 
util_cpu_caps.x86_cpu_type);
   debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps.cacheline);
 
   debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps.has_tsc);
   debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps.has_mmx);
   debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps.has_mmx2);
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.h 
b/src/gallium/auxiliary/util/u_cpu_detect.h
index 19f5567ca7b..efc910d1473 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.h
+++ b/src/gallium/auxiliary/util/u_cpu_detect.h
@@ -44,20 +44,21 @@
 extern "C" {
 #endif
 
 
 struct util_cpu_caps {
int nr_cpus;
 
/* Feature flags */
int x86_cpu_type;
unsigned cacheline;
+   unsigned cores_per_L3;
 
unsigned has_intel:1;
unsigned has_tsc:1;
unsigned has_mmx:1;
unsigned has_mmx2:1;
unsigned has_sse:1;
unsigned has_sse2:1;
unsigned has_sse3:1;
unsigned has_ssse3:1;
unsigned has_sse4_1:1;
-- 
2.17.1

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Re: [Mesa-dev] [PATCH 2/3] radeonsi/nir: Set vs_inputs_dual_locations and let NIR do the remap


On 06/09/18 13:16, Jason Ekstrand wrote:

On September 5, 2018 19:46:06 Timothy Arceri  wrote:


On 01/09/18 13:11, Jason Ekstrand wrote:

We were going out of our way to disable dual-location re-mapping in NIR
only to then do the remapping in st_glsl_to_nir.cpp.  Presumably, this
was so that double_inputs would be correct for the core state tracker.
However, now that we've it to gl_program::DualSlotInputs which is
unaffected by NIR lowering, we can let NIR lower things for us.  The one
tricky bit here is that we have to remap the inputs_read bitfield back
to the single-slot convention for the gallium state tracker to use.

Since radeonsi is the only NIR-capable gallium driver that also supports
GL_ARB_vertex_attrib_64bit, we only have to worry about radeonsi when
making core gallium state tracker changes.
---
.../nir/nir_lower_io_arrays_to_elements.c |  5 +--
src/gallium/drivers/radeonsi/si_get.c |  1 +
src/mesa/state_tracker/st_glsl_to_nir.cpp | 45 +--
3 files changed, 22 insertions(+), 29 deletions(-)

diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c 
b/src/compiler/nir/nir_lower_io_arrays_to_elements.c

index 16f6233f614..af33d153ea5 100644
--- a/src/compiler/nir/nir_lower_io_arrays_to_elements.c
+++ b/src/compiler/nir/nir_lower_io_arrays_to_elements.c
@@ -36,9 +36,6 @@ static unsigned
get_io_offset(nir_builder *b, nir_deref_instr *deref, nir_variable *var,
   unsigned *element_index, nir_ssa_def **vertex_index)
{
-   bool vs_in = (b->shader->info.stage == MESA_SHADER_VERTEX) &&
-    (var->data.mode == nir_var_shader_in);
-
nir_deref_path path;
nir_deref_path_init(, deref, NULL);

@@ -60,7 +57,7 @@ get_io_offset(nir_builder *b, nir_deref_instr 
*deref, nir_variable *var,


  assert(c); /* must not be indirect dereference */

- unsigned size = glsl_count_attribute_slots((*p)->type, vs_in);
+ unsigned size = glsl_count_attribute_slots((*p)->type, false);
  offset += size * c->u32[0];

  unsigned num_elements = glsl_type_is_array((*p)->type) ?
diff --git a/src/gallium/drivers/radeonsi/si_get.c 
b/src/gallium/drivers/radeonsi/si_get.c

index 90f62edf470..bc3d559861f 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -497,6 +497,7 @@ static const struct nir_shader_compiler_options 
nir_options = {

.lower_extract_word = true,
.max_unroll_iterations = 32,
.native_integers = true,
+    .vs_inputs_dual_locations = true,
};

static const void *
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp 
b/src/mesa/state_tracker/st_glsl_to_nir.cpp

index 0ee9bd9fef1..d0ec410ec69 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -32,6 +32,7 @@
#include "program/prog_parameter.h"
#include "program/ir_to_mesa.h"
#include "main/mtypes.h"
+#include "main/imports.h"
#include "main/errors.h"
#include "main/shaderapi.h"
#include "main/uniforms.h"
@@ -83,33 +84,18 @@ st_nir_fixup_varying_slots(struct st_context *st, 
struct exec_list *var_list)

static void
st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
{
-   unsigned attr, num_inputs = 0;
-   unsigned input_to_index[VERT_ATTRIB_MAX] = {0};
-
-   /* TODO de-duplicate w/ similar code in 
st_translate_vertex_program()? */

-   for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
-  if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
- input_to_index[attr] = num_inputs;
- num_inputs++;
- if ((prog->DualSlotInputs & BITFIELD64_BIT(attr)) != 0) {
-    /* add placeholder for second part of a double attribute */
-    num_inputs++;
- }
-  } else {
- input_to_index[attr] = ~0;
-  }
-   }
-
-   /* bit of a hack, mirroring st_translate_vertex_program */
-   input_to_index[VERT_ATTRIB_EDGEFLAG] = num_inputs;
-
nir->num_inputs = 0;
nir_foreach_variable_safe(var, >inputs) {
-  attr = var->data.location;
-  assert(attr < ARRAY_SIZE(input_to_index));
-
-  if (input_to_index[attr] != ~0u) {
- var->data.driver_location = input_to_index[attr];
+  /* NIR already assigns dual-slot inputs to two locations so 
all we have

+   * to do is compact everything down.
+   */
+  if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
+ /* bit of a hack, mirroring st_translate_vertex_program */
+ var->data.driver_location = 
_mesa_bitcount_64(nir->info.inputs_read);
+  } else if (nir->info.inputs_read & 
BITFIELD64_BIT(var->data.location)) {

+ var->data.driver_location =
+    _mesa_bitcount_64(nir->info.inputs_read &
+  BITFIELD64_MASK(var->data.location));


I'm probably missing something obvious but wont this always set
driver_location to 1?


That's BITSET_MASK, not BITSET_BIT


Right thanks.

The series seems fine to me. I couldn't test on radeonsi as piglit is 
causing issues with my setup currently but if anything is broken we

[Mesa-dev] [PATCH] mesa: enable ARB_vertex_buffer_object in core profile

This extension is required by "Wolfenstein: The Old Blood".

All the functions are just alias of the core functions so
there should be nothing more to do.
---
 src/mesa/main/extensions_table.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index f3727cdb08d..09bf923bd0e 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -182,7 +182,7 @@ EXT(ARB_vertex_array_bgra   , 
EXT_vertex_array_bgra
 EXT(ARB_vertex_array_object , dummy_true   
  , GLL, GLC,  x ,  x , 2006)
 EXT(ARB_vertex_attrib_64bit , ARB_vertex_attrib_64bit  
  ,  32, GLC,  x ,  x , 2010)
 EXT(ARB_vertex_attrib_binding   , dummy_true   
  , GLL, GLC,  x ,  x , 2012)
-EXT(ARB_vertex_buffer_object, dummy_true   
  , GLL,  x ,  x ,  x , 2003)
+EXT(ARB_vertex_buffer_object, dummy_true   
  , GLL, GLC,  x ,  x , 2003)
 EXT(ARB_vertex_program  , ARB_vertex_program   
  , GLL,  x ,  x ,  x , 2002)
 EXT(ARB_vertex_shader   , ARB_vertex_shader
  , GLL, GLC,  x ,  x , 2002)
 EXT(ARB_vertex_type_10f_11f_11f_rev , ARB_vertex_type_10f_11f_11f_rev  
  , GLL, GLC,  x ,  x , 2013)
-- 
2.17.1

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Re: [Mesa-dev] [PATCH 2/3] radeonsi/nir: Set vs_inputs_dual_locations and let NIR do the remap


On September 5, 2018 19:46:06 Timothy Arceri  wrote:


On 01/09/18 13:11, Jason Ekstrand wrote:

We were going out of our way to disable dual-location re-mapping in NIR
only to then do the remapping in st_glsl_to_nir.cpp.  Presumably, this
was so that double_inputs would be correct for the core state tracker.
However, now that we've it to gl_program::DualSlotInputs which is
unaffected by NIR lowering, we can let NIR lower things for us.  The one
tricky bit here is that we have to remap the inputs_read bitfield back
to the single-slot convention for the gallium state tracker to use.

Since radeonsi is the only NIR-capable gallium driver that also supports
GL_ARB_vertex_attrib_64bit, we only have to worry about radeonsi when
making core gallium state tracker changes.
---
.../nir/nir_lower_io_arrays_to_elements.c |  5 +--
src/gallium/drivers/radeonsi/si_get.c |  1 +
src/mesa/state_tracker/st_glsl_to_nir.cpp | 45 +--
3 files changed, 22 insertions(+), 29 deletions(-)

diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c 
b/src/compiler/nir/nir_lower_io_arrays_to_elements.c

index 16f6233f614..af33d153ea5 100644
--- a/src/compiler/nir/nir_lower_io_arrays_to_elements.c
+++ b/src/compiler/nir/nir_lower_io_arrays_to_elements.c
@@ -36,9 +36,6 @@ static unsigned
get_io_offset(nir_builder *b, nir_deref_instr *deref, nir_variable *var,
   unsigned *element_index, nir_ssa_def **vertex_index)
{
-   bool vs_in = (b->shader->info.stage == MESA_SHADER_VERTEX) &&
-(var->data.mode == nir_var_shader_in);
-
nir_deref_path path;
nir_deref_path_init(, deref, NULL);

@@ -60,7 +57,7 @@ get_io_offset(nir_builder *b, nir_deref_instr *deref, 
nir_variable *var,


  assert(c); /* must not be indirect dereference */

- unsigned size = glsl_count_attribute_slots((*p)->type, vs_in);
+ unsigned size = glsl_count_attribute_slots((*p)->type, false);
  offset += size * c->u32[0];

  unsigned num_elements = glsl_type_is_array((*p)->type) ?
diff --git a/src/gallium/drivers/radeonsi/si_get.c 
b/src/gallium/drivers/radeonsi/si_get.c

index 90f62edf470..bc3d559861f 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -497,6 +497,7 @@ static const struct nir_shader_compiler_options 
nir_options = {

.lower_extract_word = true,
.max_unroll_iterations = 32,
.native_integers = true,
+   .vs_inputs_dual_locations = true,
};

static const void *
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp 
b/src/mesa/state_tracker/st_glsl_to_nir.cpp

index 0ee9bd9fef1..d0ec410ec69 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -32,6 +32,7 @@
#include "program/prog_parameter.h"
#include "program/ir_to_mesa.h"
#include "main/mtypes.h"
+#include "main/imports.h"
#include "main/errors.h"
#include "main/shaderapi.h"
#include "main/uniforms.h"
@@ -83,33 +84,18 @@ st_nir_fixup_varying_slots(struct st_context *st, 
struct exec_list *var_list)

static void
st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
{
-   unsigned attr, num_inputs = 0;
-   unsigned input_to_index[VERT_ATTRIB_MAX] = {0};
-
-   /* TODO de-duplicate w/ similar code in st_translate_vertex_program()? */
-   for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
-  if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
- input_to_index[attr] = num_inputs;
- num_inputs++;
- if ((prog->DualSlotInputs & BITFIELD64_BIT(attr)) != 0) {
-/* add placeholder for second part of a double attribute */
-num_inputs++;
- }
-  } else {
- input_to_index[attr] = ~0;
-  }
-   }
-
-   /* bit of a hack, mirroring st_translate_vertex_program */
-   input_to_index[VERT_ATTRIB_EDGEFLAG] = num_inputs;
-
nir->num_inputs = 0;
nir_foreach_variable_safe(var, >inputs) {
-  attr = var->data.location;
-  assert(attr < ARRAY_SIZE(input_to_index));
-
-  if (input_to_index[attr] != ~0u) {
- var->data.driver_location = input_to_index[attr];
+  /* NIR already assigns dual-slot inputs to two locations so all we have
+   * to do is compact everything down.
+   */
+  if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
+ /* bit of a hack, mirroring st_translate_vertex_program */
+ var->data.driver_location = _mesa_bitcount_64(nir->info.inputs_read);
+  } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
+ var->data.driver_location =
+_mesa_bitcount_64(nir->info.inputs_read &
+  BITFIELD64_MASK(var->data.location));


I'm probably missing something obvious but wont this always set
driver_location to 1?


That's BITSET_MASK, not BITSET_BIT




  nir->num_inputs++;
} else {
  /* Move unused input variables to the globals list (with no
@@ -743,6 +729,15 @@ st_link_nir(struct gl_context *ctx,

nir_shader_gather_info(nir,

Re: [Mesa-dev] [PATCH] glsl: fixer lexer for unreachable defines


Cc: mesa-sta...@lists.freedesktop.org

On 01/09/18 23:57, Timothy Arceri wrote:

If we have something like:

#ifdef NOT_DEFINED
#define A_MACRO(x) \
if (x)
#endif

The # on the #define is not skipped but the define itself is so
this then gets recognised as #if.

Until 28a3731e3f this didn't happen because we ended up in
{NONSPACE} where BEGIN INITIAL was called stopping the
problem from happening.

This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for
if/else/endif when processing a define.

Cc: Ian Romanick 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772
---
  src/compiler/glsl/glcpp/glcpp-lex.l | 60 ++---
  src/compiler/glsl/glcpp/glcpp.h |  1 +
  2 files changed, 38 insertions(+), 23 deletions(-)

diff --git a/src/compiler/glsl/glcpp/glcpp-lex.l 
b/src/compiler/glsl/glcpp/glcpp-lex.l
index fe5845acd4e..f7003da0cc8 100644
--- a/src/compiler/glsl/glcpp/glcpp-lex.l
+++ b/src/compiler/glsl/glcpp/glcpp-lex.l
@@ -289,6 +289,7 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
   * token. */
if (parser->first_non_space_token_this_line) {
BEGIN HASH;
+   yyextra->in_define = false;
}
  
  	RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);

@@ -336,43 +337,55 @@ HEXADECIMAL_INTEGER   0[xX][0-9a-fA-F]+[uU]?
/* For the pre-processor directives, we return these tokens
 * even when we are otherwise skipping. */
  ifdef {
-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (IFDEF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (IFDEF);
+   }
  }
  
  ifndef {

-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (IFNDEF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (IFNDEF);
+   }
  }
  
  if/[^_a-zA-Z0-9] {

-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (IF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (IF);
+   }
  }
  
  elif/[^_a-zA-Z0-9] {

-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (ELIF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (ELIF);
+   }
  }
  
  else {

-   BEGIN INITIAL;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (ELSE);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (ELSE);
+   }
  }
  
  endif {

-   BEGIN INITIAL;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (ENDIF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (ENDIF);
+   }
  }
  
  error[^\r\n]* {

@@ -399,7 +412,8 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
 *and not whitespace). This will generate an error.
 */
  define{HSPACE}* {
-   if (! parser->skipping) {
+   yyextra->in_define = true;
+   if (!parser->skipping) {
BEGIN DEFINE;
yyextra->space_tokens = 0;
RETURN_TOKEN (DEFINE_TOKEN);
diff --git a/src/compiler/glsl/glcpp/glcpp.h b/src/compiler/glsl/glcpp/glcpp.h
index c7e382ed30c..e786b24b132 100644
--- a/src/compiler/glsl/glcpp/glcpp.h
+++ b/src/compiler/glsl/glcpp/glcpp.h
@@ -197,6 +197,7 @@ struct glcpp_parser {
int first_non_space_token_this_line;
int newline_as_space;
int in_control_line;
+   bool in_define;
int paren_count;
int commented_newlines;
skip_node_t *skip_stack;


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[Mesa-dev] [Bug 80185] Please do not hardcode SELinux identifiers in the code

https://bugs.freedesktop.org/show_bug.cgi?id=80185

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |WONTFIX
 Status|NEW |RESOLVED

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[Mesa-dev] [Bug 107778] 3d renders does not work at all in game, only 2d (like menus) shows up.

https://bugs.freedesktop.org/show_bug.cgi?id=107778

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |DUPLICATE
 Status|NEW |RESOLVED

--- Comment #1 from Timothy Arceri  ---


*** This bug has been marked as a duplicate of bug 107581 ***

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Re: [Mesa-dev] [PATCH 2/3] radeonsi/nir: Set vs_inputs_dual_locations and let NIR do the remap


On 01/09/18 13:11, Jason Ekstrand wrote:

We were going out of our way to disable dual-location re-mapping in NIR
only to then do the remapping in st_glsl_to_nir.cpp.  Presumably, this
was so that double_inputs would be correct for the core state tracker.
However, now that we've it to gl_program::DualSlotInputs which is
unaffected by NIR lowering, we can let NIR lower things for us.  The one
tricky bit here is that we have to remap the inputs_read bitfield back
to the single-slot convention for the gallium state tracker to use.

Since radeonsi is the only NIR-capable gallium driver that also supports
GL_ARB_vertex_attrib_64bit, we only have to worry about radeonsi when
making core gallium state tracker changes.
---
  .../nir/nir_lower_io_arrays_to_elements.c |  5 +--
  src/gallium/drivers/radeonsi/si_get.c |  1 +
  src/mesa/state_tracker/st_glsl_to_nir.cpp | 45 +--
  3 files changed, 22 insertions(+), 29 deletions(-)

diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c 
b/src/compiler/nir/nir_lower_io_arrays_to_elements.c
index 16f6233f614..af33d153ea5 100644
--- a/src/compiler/nir/nir_lower_io_arrays_to_elements.c
+++ b/src/compiler/nir/nir_lower_io_arrays_to_elements.c
@@ -36,9 +36,6 @@ static unsigned
  get_io_offset(nir_builder *b, nir_deref_instr *deref, nir_variable *var,
unsigned *element_index, nir_ssa_def **vertex_index)
  {
-   bool vs_in = (b->shader->info.stage == MESA_SHADER_VERTEX) &&
-(var->data.mode == nir_var_shader_in);
-
 nir_deref_path path;
 nir_deref_path_init(, deref, NULL);
  
@@ -60,7 +57,7 @@ get_io_offset(nir_builder *b, nir_deref_instr *deref, nir_variable *var,
  
   assert(c); /* must not be indirect dereference */
  
- unsigned size = glsl_count_attribute_slots((*p)->type, vs_in);

+ unsigned size = glsl_count_attribute_slots((*p)->type, false);
   offset += size * c->u32[0];
  
   unsigned num_elements = glsl_type_is_array((*p)->type) ?

diff --git a/src/gallium/drivers/radeonsi/si_get.c 
b/src/gallium/drivers/radeonsi/si_get.c
index 90f62edf470..bc3d559861f 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -497,6 +497,7 @@ static const struct nir_shader_compiler_options nir_options 
= {
.lower_extract_word = true,
.max_unroll_iterations = 32,
.native_integers = true,
+   .vs_inputs_dual_locations = true,
  };
  
  static const void *

diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp 
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 0ee9bd9fef1..d0ec410ec69 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -32,6 +32,7 @@
  #include "program/prog_parameter.h"
  #include "program/ir_to_mesa.h"
  #include "main/mtypes.h"
+#include "main/imports.h"
  #include "main/errors.h"
  #include "main/shaderapi.h"
  #include "main/uniforms.h"
@@ -83,33 +84,18 @@ st_nir_fixup_varying_slots(struct st_context *st, struct 
exec_list *var_list)
  static void
  st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
  {
-   unsigned attr, num_inputs = 0;
-   unsigned input_to_index[VERT_ATTRIB_MAX] = {0};
-
-   /* TODO de-duplicate w/ similar code in st_translate_vertex_program()? */
-   for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
-  if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
- input_to_index[attr] = num_inputs;
- num_inputs++;
- if ((prog->DualSlotInputs & BITFIELD64_BIT(attr)) != 0) {
-/* add placeholder for second part of a double attribute */
-num_inputs++;
- }
-  } else {
- input_to_index[attr] = ~0;
-  }
-   }
-
-   /* bit of a hack, mirroring st_translate_vertex_program */
-   input_to_index[VERT_ATTRIB_EDGEFLAG] = num_inputs;
-
 nir->num_inputs = 0;
 nir_foreach_variable_safe(var, >inputs) {
-  attr = var->data.location;
-  assert(attr < ARRAY_SIZE(input_to_index));
-
-  if (input_to_index[attr] != ~0u) {
- var->data.driver_location = input_to_index[attr];
+  /* NIR already assigns dual-slot inputs to two locations so all we have
+   * to do is compact everything down.
+   */
+  if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
+ /* bit of a hack, mirroring st_translate_vertex_program */
+ var->data.driver_location = _mesa_bitcount_64(nir->info.inputs_read);
+  } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
+ var->data.driver_location =
+_mesa_bitcount_64(nir->info.inputs_read &
+  BITFIELD64_MASK(var->data.location));


I'm probably missing something obvious but wont this always set 
driver_location to 1?




   nir->num_inputs++;
} else {
   /* Move unused input variables to the globals list (with no
@@ -743,6 +729,15 @@ st_link_nir(struct gl_context

Re: [Mesa-dev] [PATCH 5/6] mesa: remove duplicate declarations from glheader.h




On 06/09/18 02:35, Emil Velikov wrote:

From: Emil Velikov 

Remove all the desktop GL and GLX entries from the list.
Former are pulled by the gl.h and glext.h includes at the top while the
latter are not longer needed.


not -> no

Series:

Reviewed-by: Timothy Arceri 

Are you considering finishing off SWAP_EXCHANGE support by any chance?



Signed-off-by: Emil Velikov 
---
  src/mesa/main/glheader.h | 54 
  1 file changed, 54 deletions(-)

diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h
index 1a91d543126..b1f19e44008 100644
--- a/src/mesa/main/glheader.h
+++ b/src/mesa/main/glheader.h
@@ -51,12 +51,6 @@ typedef GLuint64 GLbitfield64;
  
  typedef int GLclampx;
  
-

-#ifndef GL_OES_EGL_image
-typedef void *GLeglImageOES;
-#endif
-
-
  #ifndef GL_OES_EGL_image_external
  #define GL_TEXTURE_EXTERNAL_OES 0x8D65
  #define GL_SAMPLER_EXTERNAL_OES 0x8D66
@@ -64,7 +58,6 @@ typedef void *GLeglImageOES;
  #define GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES 0x8D68
  #endif
  
-

  #ifndef GL_OES_point_size_array
  #define GL_POINT_SIZE_ARRAY_OES 0x8B9C
  #define GL_POINT_SIZE_ARRAY_TYPE_OES0x898A
@@ -84,27 +77,11 @@ typedef void *GLeglImageOES;
  #endif
  
  /* GLES 2.0 tokens */

-#ifndef GL_RGB565
-#define GL_RGB565   0x8D62
-#endif
  
  #ifndef GL_TEXTURE_GEN_STR_OES

  #define GL_TEXTURE_GEN_STR_OES  0x8D60
  #endif
  
-#ifndef GL_OES_compressed_paletted_texture

-#define GL_PALETTE4_RGB8_OES0x8B90
-#define GL_PALETTE4_RGBA8_OES   0x8B91
-#define GL_PALETTE4_R5_G6_B5_OES0x8B92
-#define GL_PALETTE4_RGBA4_OES   0x8B93
-#define GL_PALETTE4_RGB5_A1_OES 0x8B94
-#define GL_PALETTE8_RGB8_OES0x8B95
-#define GL_PALETTE8_RGBA8_OES   0x8B96
-#define GL_PALETTE8_R5_G6_B5_OES0x8B97
-#define GL_PALETTE8_RGBA4_OES   0x8B98
-#define GL_PALETTE8_RGB5_A1_OES 0x8B99
-#endif
-
  #ifndef GL_OES_texture_compression_astc
  #define GL_COMPRESSED_RGBA_ASTC_3x3x3_OES   0x93C0
  #define GL_COMPRESSED_RGBA_ASTC_4x3x3_OES   0x93C1
@@ -128,15 +105,6 @@ typedef void *GLeglImageOES;
  #define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x6_OES   0x93E9
  #endif
  
-#ifndef GL_ES_VERSION_2_0

-#define GL_SHADER_BINARY_FORMATS0x8DF8
-#define GL_NUM_SHADER_BINARY_FORMATS0x8DF9
-#define GL_SHADER_COMPILER  0x8DFA
-#define GL_MAX_VERTEX_UNIFORM_VECTORS   0x8DFB
-#define GL_MAX_VARYING_VECTORS  0x8DFC
-#define GL_MAX_FRAGMENT_UNIFORM_VECTORS 0x8DFD
-#endif
-
  #ifndef GL_ATI_texture_compression_3dc
  #define GL_ATI_texture_compression_3dc  1
  #define GL_COMPRESSED_LUMINANCE_ALPHA_3DC_ATI   0x8837
@@ -174,28 +142,6 @@ typedef void *GLeglImageOES;
  #define GL_SHADER_PROGRAM_MESA  0x
  
  
-/* Several fields of struct gl_config can take these as values.  Since

- * GLX header files may not be available everywhere they need to be used,
- * redefine them here.
- */
-#define GLX_NONE0x8000
-#define GLX_SLOW_CONFIG 0x8001
-#define GLX_TRUE_COLOR  0x8002
-#define GLX_DIRECT_COLOR0x8003
-#define GLX_PSEUDO_COLOR0x8004
-#define GLX_STATIC_COLOR0x8005
-#define GLX_GRAY_SCALE  0x8006
-#define GLX_STATIC_GRAY 0x8007
-#define GLX_TRANSPARENT_RGB 0x8008
-#define GLX_TRANSPARENT_INDEX   0x8009
-#define GLX_NON_CONFORMANT_CONFIG   0x800D
-#define GLX_SWAP_EXCHANGE_OML   0x8061
-#define GLX_SWAP_COPY_OML   0x8062
-#define GLX_SWAP_UNDEFINED_OML  0x8063
-
-#define GLX_DONT_CARE   0x
-
-
  #ifdef __cplusplus
  }
  #endif


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[Mesa-dev] [Bug 107670] Massive slowdown under specific memcpy implementations (32bit, no-SIMD, backward copy).

https://bugs.freedesktop.org/show_bug.cgi?id=107670

Timothy Arceri  changed:

   What|Removed |Added

 Status|NEEDINFO|RESOLVED
 Resolution|--- |NOTOURBUG

--- Comment #21 from Timothy Arceri  ---
(In reply to iive from comment #13)
> Slackware32, i586 and glibc. 
> Slackware tries to support as many machines as possible, since i586 is still
> supported by the kernel, Slackware compiles everything to be able to run on
> i586.
> 
> The problem is that for some reason Glibc compiled for i586 does NOT support
> multi-arch. It does not use CPUID (that is available on all i586 and some
> i486) to pick specific version for the running CPU. Glibc supports
> multi-arch only for i686 builds.
> 

I'm all for allowing old hardware to continue to be used but if you want
performance you should pick a distro that targets "modern" hardware. 

Alternatively file a bug against / submit a patch for Glibc.

Given this and comment 20 I'm going to close this as not our bug.

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Re: [Mesa-dev] [PATCH] glsl: fixer lexer for unreachable defines

2018-09-05 Thread Ian Romanick

It took me a bit to wrap my head around this, but I believe it's
correct.  It also fixes things like this (which we didn't notice were
broken):

#ifdef NOT_DEFINED
#define A_MACRO(x) \
#if 0
x
#endif
#endif

Reviewed-by: Ian Romanick 

On 09/01/2018 06:57 AM, Timothy Arceri wrote:
> If we have something like:
> 
>#ifdef NOT_DEFINED
>#define A_MACRO(x) \
>   if (x)
>#endif
> 
> The # on the #define is not skipped but the define itself is so
> this then gets recognised as #if.
> 
> Until 28a3731e3f this didn't happen because we ended up in
> {NONSPACE} where BEGIN INITIAL was called stopping the
> problem from happening.
> 
> This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for
> if/else/endif when processing a define.
> 
> Cc: Ian Romanick 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772
> ---
>  src/compiler/glsl/glcpp/glcpp-lex.l | 60 ++---
>  src/compiler/glsl/glcpp/glcpp.h |  1 +
>  2 files changed, 38 insertions(+), 23 deletions(-)
> 
> diff --git a/src/compiler/glsl/glcpp/glcpp-lex.l 
> b/src/compiler/glsl/glcpp/glcpp-lex.l
> index fe5845acd4e..f7003da0cc8 100644
> --- a/src/compiler/glsl/glcpp/glcpp-lex.l
> +++ b/src/compiler/glsl/glcpp/glcpp-lex.l
> @@ -289,6 +289,7 @@ HEXADECIMAL_INTEGER   0[xX][0-9a-fA-F]+[uU]?
>   * token. */
>   if (parser->first_non_space_token_this_line) {
>   BEGIN HASH;
> + yyextra->in_define = false;
>   }
>  
>   RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);
> @@ -336,43 +337,55 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
>   /* For the pre-processor directives, we return these tokens
>* even when we are otherwise skipping. */
>  ifdef {
> - BEGIN INITIAL;
> - yyextra->lexing_directive = 1;
> - yyextra->space_tokens = 0;
> - RETURN_TOKEN_NEVER_SKIP (IFDEF);
> + if (!yyextra->in_define) {
> + BEGIN INITIAL;
> + yyextra->lexing_directive = 1;
> + yyextra->space_tokens = 0;
> + RETURN_TOKEN_NEVER_SKIP (IFDEF);
> + }
>  }
>  
>  ifndef {
> - BEGIN INITIAL;
> - yyextra->lexing_directive = 1;
> - yyextra->space_tokens = 0;
> - RETURN_TOKEN_NEVER_SKIP (IFNDEF);
> + if (!yyextra->in_define) {
> + BEGIN INITIAL;
> + yyextra->lexing_directive = 1;
> + yyextra->space_tokens = 0;
> + RETURN_TOKEN_NEVER_SKIP (IFNDEF);
> + }
>  }
>  
>  if/[^_a-zA-Z0-9] {
> - BEGIN INITIAL;
> - yyextra->lexing_directive = 1;
> - yyextra->space_tokens = 0;
> - RETURN_TOKEN_NEVER_SKIP (IF);
> + if (!yyextra->in_define) {
> + BEGIN INITIAL;
> + yyextra->lexing_directive = 1;
> + yyextra->space_tokens = 0;
> + RETURN_TOKEN_NEVER_SKIP (IF);
> + }
>  }
>  
>  elif/[^_a-zA-Z0-9] {
> - BEGIN INITIAL;
> - yyextra->lexing_directive = 1;
> - yyextra->space_tokens = 0;
> - RETURN_TOKEN_NEVER_SKIP (ELIF);
> + if (!yyextra->in_define) {
> + BEGIN INITIAL;
> + yyextra->lexing_directive = 1;
> + yyextra->space_tokens = 0;
> + RETURN_TOKEN_NEVER_SKIP (ELIF);
> + }
>  }
>  
>  else {
> - BEGIN INITIAL;
> - yyextra->space_tokens = 0;
> - RETURN_TOKEN_NEVER_SKIP (ELSE);
> + if (!yyextra->in_define) {
> + BEGIN INITIAL;
> + yyextra->space_tokens = 0;
> + RETURN_TOKEN_NEVER_SKIP (ELSE);
> + }
>  }
>  
>  endif {
> - BEGIN INITIAL;
> - yyextra->space_tokens = 0;
> - RETURN_TOKEN_NEVER_SKIP (ENDIF);
> + if (!yyextra->in_define) {
> + BEGIN INITIAL;
> + yyextra->space_tokens = 0;
> + RETURN_TOKEN_NEVER_SKIP (ENDIF);
> + }
>  }
>  
>  error[^\r\n]* {
> @@ -399,7 +412,8 @@ HEXADECIMAL_INTEGER   0[xX][0-9a-fA-F]+[uU]?
>*and not whitespace). This will generate an error.
>*/
>  define{HSPACE}* {
> - if (! parser->skipping) {
> + yyextra->in_define = true;
> + if (!parser->skipping) {
>   BEGIN DEFINE;
>   yyextra->space_tokens = 0;
>   RETURN_TOKEN (DEFINE_TOKEN);
> diff --git a/src/compiler/glsl/glcpp/glcpp.h b/src/compiler/glsl/glcpp/glcpp.h
> index c7e382ed30c..e786b24b132 100644
> --- a/src/compiler/glsl/glcpp/glcpp.h
> +++ b/src/compiler/glsl/glcpp/glcpp.h
> @@ -197,6 +197,7 @@ struct glcpp_parser {
>   int first_non_space_token_this_line;
>   int newline_as_space;
>   int in_control_line;
> + bool in_define;
>   int paren_count;
>   int commented_newlines;
>   skip_node_t *skip_stack;
> 

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Re: [Mesa-dev] [PATCH] glsl: fixer lexer for unreachable defines


Ping!

If I don't have any other feedback by tomorrow I'll push this with the 
Tested-by.


Thanks.

On 01/09/18 23:57, Timothy Arceri wrote:

If we have something like:

#ifdef NOT_DEFINED
#define A_MACRO(x) \
if (x)
#endif

The # on the #define is not skipped but the define itself is so
this then gets recognised as #if.

Until 28a3731e3f this didn't happen because we ended up in
{NONSPACE} where BEGIN INITIAL was called stopping the
problem from happening.

This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for
if/else/endif when processing a define.

Cc: Ian Romanick 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772
---
  src/compiler/glsl/glcpp/glcpp-lex.l | 60 ++---
  src/compiler/glsl/glcpp/glcpp.h |  1 +
  2 files changed, 38 insertions(+), 23 deletions(-)

diff --git a/src/compiler/glsl/glcpp/glcpp-lex.l 
b/src/compiler/glsl/glcpp/glcpp-lex.l
index fe5845acd4e..f7003da0cc8 100644
--- a/src/compiler/glsl/glcpp/glcpp-lex.l
+++ b/src/compiler/glsl/glcpp/glcpp-lex.l
@@ -289,6 +289,7 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
   * token. */
if (parser->first_non_space_token_this_line) {
BEGIN HASH;
+   yyextra->in_define = false;
}
  
  	RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);

@@ -336,43 +337,55 @@ HEXADECIMAL_INTEGER   0[xX][0-9a-fA-F]+[uU]?
/* For the pre-processor directives, we return these tokens
 * even when we are otherwise skipping. */
  ifdef {
-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (IFDEF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (IFDEF);
+   }
  }
  
  ifndef {

-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (IFNDEF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (IFNDEF);
+   }
  }
  
  if/[^_a-zA-Z0-9] {

-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (IF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (IF);
+   }
  }
  
  elif/[^_a-zA-Z0-9] {

-   BEGIN INITIAL;
-   yyextra->lexing_directive = 1;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (ELIF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->lexing_directive = 1;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (ELIF);
+   }
  }
  
  else {

-   BEGIN INITIAL;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (ELSE);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (ELSE);
+   }
  }
  
  endif {

-   BEGIN INITIAL;
-   yyextra->space_tokens = 0;
-   RETURN_TOKEN_NEVER_SKIP (ENDIF);
+   if (!yyextra->in_define) {
+   BEGIN INITIAL;
+   yyextra->space_tokens = 0;
+   RETURN_TOKEN_NEVER_SKIP (ENDIF);
+   }
  }
  
  error[^\r\n]* {

@@ -399,7 +412,8 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
 *and not whitespace). This will generate an error.
 */
  define{HSPACE}* {
-   if (! parser->skipping) {
+   yyextra->in_define = true;
+   if (!parser->skipping) {
BEGIN DEFINE;
yyextra->space_tokens = 0;
RETURN_TOKEN (DEFINE_TOKEN);
diff --git a/src/compiler/glsl/glcpp/glcpp.h b/src/compiler/glsl/glcpp/glcpp.h
index c7e382ed30c..e786b24b132 100644
--- a/src/compiler/glsl/glcpp/glcpp.h
+++ b/src/compiler/glsl/glcpp/glcpp.h
@@ -197,6 +197,7 @@ struct glcpp_parser {
int first_non_space_token_this_line;
int newline_as_space;
int in_control_line;
+   bool in_define;
int paren_count;
int commented_newlines;
skip_node_t *skip_stack;


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[Mesa-dev] [announce] mesa 18.1.8 notice

Hi List,

This email is to announce that barring a major bug or a critically nominated
patch, that 18.1.8 will be released this Friday, September 7th at or about 10am
PDT. 
https://gitlab.freedesktop.org/mesa/mesa/commit/01967a97bf48f8254c5c834c69c7e8e06c2a5713
will be used as the revision for the release. If there is anything that is
missing or should be removed please let me know by mailing mesa-stable and
cc'ing me.

Currently we plan to have one more release after this (18.1.9 on September
21st), previously 18.1.8 was planned to be the last release of the 18.1.x
series.

Dylan


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[Mesa-dev] [Bug 97516] GLX_OML_swap_method not fully supported

https://bugs.freedesktop.org/show_bug.cgi?id=97516

Timothy Arceri  changed:

   What|Removed |Added

 CC||t_arc...@yahoo.com.au

--- Comment #2 from Timothy Arceri  ---
GLX_SWAP_COPY_OML should be working Thomas Hellstrom added support for it
towards the end of 2017. Partial support was also added for
GLX_SWAP_EXCHANGE_OML below is a direct copy of Thomas's reply when I asked him
what remained to properly expose GLX_SWAP_EXCHANGE_OML [1].

"You need to get the X server AIGLX to advertize it, because the 
available features are the intersection of the X server AIGLX features 
and the dri driver features, even if this is purely implemented in the 
dri client. The reason GLX works this way is that after you've choosen 
your config you can either choose to select a direct or indirect 
context. That was a poor design.

Now the problem is that AIGLX isn't able to support it, because it uses 
the dri driver dri2 path rather than the dri3 path, and I never got to 
modifying AIGLX to use the dri3 path. Didn't think it was worth the 
extra work.

In any case, you can hack-enable GLX_SWAP_EXCHANGE_OML if the client is 
using dri3 by adding __DRI_ATTRIB_SWAP_EXCHANGE to back_buffer_modes[] 
in src/gallium/state_trackers/dri/dri_screen.c, recompile and make sure 
the X server also picks up the recompiled driver. That is if you have a 
gallium driver. This worked fine with vmwgfx at the time I pushed the 
patch as tested by the corresponding piglit test.

For the other dri drivers there should be a similar way to set the 
back_buffer_modes[]."

[1] https://lists.freedesktop.org/archives/mesa-dev/2018-September/204407.html

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Re: [Mesa-dev] [PATCH] gallium: Set the default GL_SUBPIXEL_BITS to 4.

2018-09-05 Thread Roland Scheidegger

I really think it makes no sense to hack some more around this.

GLES (even 3.2) doesn't even support non-integer viewports.
As I mentioned before, it's incorrect to report more than 0 bits for
viewport subpixels if a driver only supports integer viewports.
To fix this for real really 2 caps would be needed, one for subpixel
bits (which can have a default of 4), and one for viewport subpixel bits
(which should be default 0), so the state tracker doesn't use the same
setting for both queries.

Roland


Am 05.09.2018 um 16:56 schrieb Eric Anholt:
> This is the minimum value for GLES2, and 0 certainly wouldn't be valid.
> Fixes dEQP-GLES2.functional.state_query.integers.subpixel_bits_getfloat
> and friends.
> ---
>  src/gallium/auxiliary/util/u_screen.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/src/gallium/auxiliary/util/u_screen.c 
> b/src/gallium/auxiliary/util/u_screen.c
> index d19d604e0c51..3ac2f15a5356 100644
> --- a/src/gallium/auxiliary/util/u_screen.c
> +++ b/src/gallium/auxiliary/util/u_screen.c
> @@ -246,7 +246,11 @@ u_pipe_screen_get_param_defaults(struct pipe_screen 
> *pscreen,
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES: /* Enables EXT_window_rectangles */
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> +  return 0;
> +
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> +  return 4; /* GLES 2.0 minimum maximum value. */
> +
> case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> 

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Re: [Mesa-dev] [PATCH v2 2/2] Replace uses of _mesa_bitcount with util_bitcount

2018-09-05 Thread Ian Romanick

After this patch, is 'grep -r _mesa_bitcount' empty?

On 09/05/2018 02:55 PM, Dylan Baker wrote:
> and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem
> in nir for platforms that don't have popcount or popcountll, such as
> 32bit msvc.
> 
> v2: - Fix additional uses of _mesa_bitcount added after this was
>   originally written
> ---
>  src/compiler/glsl/ir_constant_expression.cpp  |  2 +-
>  src/compiler/glsl/ir_expression_operation.py  |  2 +-
>  src/compiler/glsl/link_varyings.cpp   |  5 ++-
>  src/compiler/glsl/linker.cpp  |  9 +++--
>  src/compiler/nir/nir.c|  6 +--
>  src/compiler/nir/nir_split_vars.c |  6 +--
>  src/gallium/state_trackers/glx/xlib/glx_api.c |  7 ++--
>  src/gallium/state_trackers/glx/xlib/xm_api.c  | 11 +++---
>  src/gallium/targets/libgl-xlib/Makefile.am|  1 +
>  src/intel/blorp/blorp_blit.c  |  5 ++-
>  src/intel/compiler/brw_fs.cpp |  3 +-
>  src/intel/compiler/brw_fs_nir.cpp |  3 +-
>  src/intel/compiler/brw_nir.c  |  5 ++-
>  src/intel/compiler/brw_vec4.cpp   |  3 +-
>  src/intel/compiler/brw_vec4_visitor.cpp   |  3 +-
>  src/intel/vulkan/anv_blorp.c  |  2 +-
>  src/intel/vulkan/anv_image.c  |  9 +++--
>  src/intel/vulkan/anv_nir_lower_multiview.c|  8 ++--
>  src/intel/vulkan/anv_pipeline.c   |  2 +-
>  src/intel/vulkan/anv_private.h|  7 ++--
>  src/intel/vulkan/genX_cmd_buffer.c|  4 +-
>  src/intel/vulkan/genX_query.c | 14 +++
>  src/mesa/drivers/common/meta.c|  5 ++-
>  src/mesa/drivers/dri/i965/brw_curbe.c |  3 +-
>  src/mesa/drivers/dri/i965/brw_draw_upload.c   |  3 +-
>  .../drivers/dri/i965/brw_performance_query.c  |  5 ++-
>  src/mesa/drivers/dri/i965/brw_wm.c|  7 ++--
>  src/mesa/drivers/x11/Makefile.am  |  1 +
>  src/mesa/drivers/x11/fakeglx.c|  7 ++--
>  src/mesa/drivers/x11/meson.build  |  2 +-
>  src/mesa/drivers/x11/xm_api.c | 17 +
>  src/mesa/main/arrayobj.c  |  5 ++-
>  src/mesa/main/buffers.c   |  7 ++--
>  src/mesa/main/imports.c   | 38 ---
>  src/mesa/main/imports.h   | 15 
>  src/mesa/program/program_parse.y  |  4 +-
>  36 files changed, 104 insertions(+), 132 deletions(-)
> 
> diff --git a/src/compiler/glsl/ir_constant_expression.cpp 
> b/src/compiler/glsl/ir_constant_expression.cpp
> index c9788c70535..bfc22c0011a 100644
> --- a/src/compiler/glsl/ir_constant_expression.cpp
> +++ b/src/compiler/glsl/ir_constant_expression.cpp
> @@ -39,7 +39,7 @@
>  #include "ir.h"
>  #include "compiler/glsl_types.h"
>  #include "util/hash_table.h"
> -#include "main/imports.h"
> +#include "util/u_math.h"
>  
>  static float
>  dot_f(ir_constant *op0, ir_constant *op1)
> diff --git a/src/compiler/glsl/ir_expression_operation.py 
> b/src/compiler/glsl/ir_expression_operation.py
> index 16b98690a6d..306fc35f605 100644
> --- a/src/compiler/glsl/ir_expression_operation.py
> +++ b/src/compiler/glsl/ir_expression_operation.py
> @@ -535,7 +535,7 @@ ir_expression_operation = [
>  
> # Bit operations, part of ARB_gpu_shader5.
> operation("bitfield_reverse", 1, source_types=(uint_type, int_type), 
> c_expression="bitfield_reverse({src0})"),
> -   operation("bit_count", 1, source_types=(uint_type, int_type), 
> dest_type=int_type, c_expression="_mesa_bitcount({src0})"),
> +   operation("bit_count", 1, source_types=(uint_type, int_type), 
> dest_type=int_type, c_expression="util_bitcount({src0})"),
> operation("find_msb", 1, source_types=(uint_type, int_type), 
> dest_type=int_type, c_expression={'u': "find_msb_uint({src0})", 'i': 
> "find_msb_int({src0})"}),
> operation("find_lsb", 1, source_types=(uint_type, int_type), 
> dest_type=int_type, c_expression="find_msb_uint({src0} & -{src0})"),
>  
> diff --git a/src/compiler/glsl/link_varyings.cpp 
> b/src/compiler/glsl/link_varyings.cpp
> index 211633d9ee3..52e493cb599 100644
> --- a/src/compiler/glsl/link_varyings.cpp
> +++ b/src/compiler/glsl/link_varyings.cpp
> @@ -38,6 +38,7 @@
>  #include "link_varyings.h"
>  #include "main/macros.h"
>  #include "util/hash_table.h"
> +#include "util/u_math.h"
>  #include "program.h"
>  
>  
> @@ -2879,13 +2880,13 @@ link_varyings(struct gl_shader_program *prog, 
> unsigned first, unsigned last,
>  
>  /* This must be done after all dead varyings are eliminated. */
>  if (sh_i != NULL) {
> -   unsigned slots_used = _mesa_bitcount_64(reserved_out_slots);
> +   unsigned slots_used = util_bitcount64(reserved_out_slots);
> if (!check_against_output_limit(ctx, prog, sh_i, slots_used)) 
> {
>return false;
> }
>  }
>

Re: [Mesa-dev] [PATCH v2 1/2] move u_math to src/util

2018-09-05 Thread Ian Romanick

After this patch, are

grep -r '"u_math.h"'

and

grep -r 'auxiliary/util/u_math.h'

empty?

On 09/05/2018 02:55 PM, Dylan Baker wrote:
> Currently we have two sets of functions for bit counts, one in gallium
> and one in core mesa. The ones in core mesa are header only in many
> cases, since they reduce to "#define _mesa_bitcount popcount", but they
> provide a fallback implementation. This is important because 32bit msvc
> doesn't have popcountll, just popcount; so when nir (for example)
> includes the core mesa header it doesn't (and shouldn't) link with core
> mesa. To fix this we'll promote the version out of gallium util, then
> replace the core mesa uses with the util version, since nir (and other
> non-core mesa users) can and do link with mesautils.
> ---
>  src/broadcom/cle/v3d_packet_helpers.h   | 2 +-
>  src/gallium/auxiliary/Makefile.sources  | 2 --
>  src/gallium/auxiliary/meson.build   | 2 --
>  src/gallium/auxiliary/util/u_format.c   | 2 +-
>  src/gallium/auxiliary/util/u_format_bptc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_latc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_other.c | 2 +-
>  src/gallium/auxiliary/util/u_format_pack.py | 2 +-
>  src/gallium/auxiliary/util/u_format_rgtc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_s3tc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_yuv.h   | 2 +-
>  src/gallium/auxiliary/util/u_format_zs.c| 2 +-
>  src/util/Makefile.sources   | 2 ++
>  src/util/meson.build| 2 ++
>  src/{gallium/auxiliary => }/util/u_math.c   | 0
>  src/{gallium/auxiliary => }/util/u_math.h   | 2 +-
>  16 files changed, 15 insertions(+), 15 deletions(-)
>  rename src/{gallium/auxiliary => }/util/u_math.c (100%)
>  rename src/{gallium/auxiliary => }/util/u_math.h (99%)
> 
> diff --git a/src/broadcom/cle/v3d_packet_helpers.h 
> b/src/broadcom/cle/v3d_packet_helpers.h
> index f340b790697..c46089a0e60 100644
> --- a/src/broadcom/cle/v3d_packet_helpers.h
> +++ b/src/broadcom/cle/v3d_packet_helpers.h
> @@ -26,7 +26,7 @@
>  #include 
>  #include 
>  #include 
> -#include 
> +#include "util/u_math.h"
>  
>  #ifdef HAVE_VALGRIND
>  #include 
> diff --git a/src/gallium/auxiliary/Makefile.sources 
> b/src/gallium/auxiliary/Makefile.sources
> index d66fa85f798..33d58dedf28 100644
> --- a/src/gallium/auxiliary/Makefile.sources
> +++ b/src/gallium/auxiliary/Makefile.sources
> @@ -294,8 +294,6 @@ C_SOURCES := \
>   util/u_linear.h \
>   util/u_log.c \
>   util/u_log.h \
> - util/u_math.c \
> - util/u_math.h \
>   util/u_memory.h \
>   util/u_mm.c \
>   util/u_mm.h \
> diff --git a/src/gallium/auxiliary/meson.build 
> b/src/gallium/auxiliary/meson.build
> index be558e07b27..9e3673a53c0 100644
> --- a/src/gallium/auxiliary/meson.build
> +++ b/src/gallium/auxiliary/meson.build
> @@ -314,8 +314,6 @@ files_libgallium = files(
>'util/u_linear.h',
>'util/u_log.c',
>'util/u_log.h',
> -  'util/u_math.c',
> -  'util/u_math.h',
>'util/u_memory.h',
>'util/u_mm.c',
>'util/u_mm.h',
> diff --git a/src/gallium/auxiliary/util/u_format.c 
> b/src/gallium/auxiliary/util/u_format.c
> index 1dd724d9b84..6445f2647cf 100644
> --- a/src/gallium/auxiliary/util/u_format.c
> +++ b/src/gallium/auxiliary/util/u_format.c
> @@ -32,11 +32,11 @@
>   * @author Jose Fonseca 
>   */
>  
> -#include "u_math.h"
>  #include "u_memory.h"
>  #include "u_format.h"
>  #include "u_format_s3tc.h"
>  #include "u_surface.h"
> +#include "util/u_math.h"
>  
>  #include "pipe/p_defines.h"
>  
> diff --git a/src/gallium/auxiliary/util/u_format_bptc.c 
> b/src/gallium/auxiliary/util/u_format_bptc.c
> index 87ec4139e09..519a541e380 100644
> --- a/src/gallium/auxiliary/util/u_format_bptc.c
> +++ b/src/gallium/auxiliary/util/u_format_bptc.c
> @@ -23,10 +23,10 @@
>   *
>   **/
>  
> -#include "u_math.h"
>  #include "u_format.h"
>  #include "u_format_bptc.h"
>  #include "util/format_srgb.h"
> +#include "util/u_math.h"
>  
>  #define BPTC_BLOCK_DECODE
>  #include "../../../mesa/main/texcompress_bptc_tmp.h"
> diff --git a/src/gallium/auxiliary/util/u_format_latc.c 
> b/src/gallium/auxiliary/util/u_format_latc.c
> index 7b2bb00693f..f145081d56d 100644
> --- a/src/gallium/auxiliary/util/u_format_latc.c
> +++ b/src/gallium/auxiliary/util/u_format_latc.c
> @@ -23,11 +23,11 @@
>   **/
>  
>  #include 
> -#include "u_math.h"
>  #include "u_format.h"
>  #include "u_format_rgtc.h"
>  #include "u_format_latc.h"
>  #include "util/rgtc.h"
> +#include "util/u_math.h"
>  
>  void
>  util_format_latc1_unorm_fetch_rgba_8unorm(uint8_t *dst, const uint8_t *src, 
> unsigned i, unsigned j)
> diff --git a/src/gallium/auxiliary/util/u_format_other.c 
> b/src/gallium/auxiliary/util/u_format_other.c
> index 025e096a95c..213cb9fd941 100644
> ---

Re: [Mesa-dev] [PATCH] gallium: Set the default GL_SUBPIXEL_BITS to 4.

Reviewed-by: Marek Olšák 

Marek

On Wed, Sep 5, 2018 at 10:56 AM, Eric Anholt  wrote:
> This is the minimum value for GLES2, and 0 certainly wouldn't be valid.
> Fixes dEQP-GLES2.functional.state_query.integers.subpixel_bits_getfloat
> and friends.
> ---
>  src/gallium/auxiliary/util/u_screen.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/src/gallium/auxiliary/util/u_screen.c 
> b/src/gallium/auxiliary/util/u_screen.c
> index d19d604e0c51..3ac2f15a5356 100644
> --- a/src/gallium/auxiliary/util/u_screen.c
> +++ b/src/gallium/auxiliary/util/u_screen.c
> @@ -246,7 +246,11 @@ u_pipe_screen_get_param_defaults(struct pipe_screen 
> *pscreen,
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES: /* Enables EXT_window_rectangles */
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> +  return 0;
> +
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> +  return 4; /* GLES 2.0 minimum maximum value. */
> +
> case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> --
> 2.18.0
>
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[Mesa-dev] [ANNOUNCE] mesa 18.2.0-rc6

2018-09-05 Thread Andres Gomez

Hello list,

The sixth release candidate for the Mesa 18.2.0 is now available. This
is the final planned RC.

Currently we have:
- 32 queued.
- 2 nominated (outstanding).
- and 1 rejected patch.

We have in the queue:

The GLSL compiler has received a couple of fixes, including one that
solves a linker error. NIR has also gotten a couple of fixes in some
conversions.

Mesa's state tracker has gotten a patch to fix the stencil border color
for GL_DEPTH_STENCIL textures.

Intel's drivers have received several fixes, including one to correct
an important drop of performance in gen9+.

AMD's drivers have also received multiple fixes. Particularly, radv has
seen fixed a crash with GTA V and DXVK and has gotten VEGA20 support
switched on.

The Tegra driver has also gotten a leak plugged.

Gallium utils have seen another leak plugged too.

Finally, the EGL driver has gotten a leak fixed for the Wayland
platform.

Take a look at section "Mesa stable queue" for more information.

Testing reports/general approval

Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.

Promotion to Mesa 18.2.0 (final) will happen next Friday (2018/09/07),
around or shortly after 18:00 EEST. Only crucial fixes will be accepted
at this point.

If you have any questions or suggestions - be that about the current
patch queue or otherwise, please go ahead.

Trivial merge conflicts
---

No merge conflicts.

Br,
Andres

Mesa stable queue
-

Nominated (2)
=

Dylan Baker (1):
bf34d8a15ab meson: Print a message about why a libdrm version was selected

Gert Wollny (1):
928f031d2dc winsys/virgl: correct resource and handle allocation (v2)

Queued (32)
===

Andres Gomez (4):
cherry-ignore: mesa: allow GL_UNSIGNED_BYTE type for SNORM reads
cherry-ignore: radeonsi: fix regression in indirect input swizzles.
cherry-ignore: anv/blorp: Fix a comment as per Nanley's review feedback
Update version to 18.2.0-rc6

Andrii Simiklit (1):
i965/gen6/xfb: handle case where transform feedback is not active

Bas Nieuwenhuizen (4):
radv: Add missing checks in radv_get_image_format_properties.
radv: Add VEGA20 support.
radv: Use a lower max offchip buffer count.
radv: Fix CMASK dimensions.

Christian Gmeiner (1):
tegra: fix memory leak

Dave Airlie (1):
ac/radeonsi: fix CIK copy max size

Ernestas Kulik (1):
u_vbuf: Fix leak

Ian Romanick (2):
i965/vec4: Correctly handle uniform sources in
generate_tes_add_indirect_urb_offset
i965/vec4: Clamp indirect tes input array reads with 0x0fff

Jason Ekstrand (9):
vulkan/alloc: Add a vk_strdup helper
anv: Copy the appliation info into the instance
Squashed with commit:
anv: Free the app and engine name
anv: Claim to support depthBounds for ID games
nir/algebraic: Be more careful converting ushr to extract_u8/16
nir/format_convert: Fix a bitmask in unpack_11f11f10f
egl/dri2: Add a helper for the number of planes for a FOURCC format
egl/dri2: Guard against invalid fourcc formats
Squashed with commit:
st/dri: Don't expose sRGB formats to clients
i965/screen: Allow modifiers on sRGB formats
anv/blorp: Do more flushing around HiZ clears

Juan A. Suarez Romero (1):
egl/wayland: do not leak wl_buffer when it is locked

Lionel Landwerlin (1):
anv: blorp: support multiple aspect blits

Marek Olšák (2):
ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on
SI/CI/VI
st/mesa: help fix stencil border color for GL_DEPTH_STENCIL textures

Mauro Rossi (1):
egl/android: do not indent HAVE_DRM_GRALLOC preprocessor directive

Nanley Chery (1):
i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9

Samuel Pitoiset (1):
radv: fix passing clip/cull distances from VS to PS

Timothy Arceri (1):
glsl: skip stringification in preprocessor if in unreachable branch

vadym.shovkoplias (1):
glsl/linker: Link all out vars from a shader objects on a single stage

Rejected (1)

Tapani Pälli (1):
a72dbc461bd mesa: allow GL_UNSIGNED_BYTE type for SNORM reads

Reason: The commit addresses a regression introduced by previous
commit fa9e6c235da, which didn't make it for 18.2.

git tag: mesa-18.2.0-rc6

https://mesa.freedesktop.org/archive/mesa-18.2.0-rc6.tar.gz
MD5: e38335dbc5b2687bd647eacb064d2963 mesa-18.2.0-rc6.tar.gz
SHA1: e699392c052f9328a0b808f1a87f954d2c4c1abb mesa-18.2.0-rc6.tar.gz
SHA256: 60f4262bffd2054e298d930b544ab95b83a7e1dce36fe2c50c4b40722c3841c5
mesa-18.2.0-rc6.tar.gz
SHA512:
e30cad4309ba35ed189dfb50daa586819d9c9726c0cf7bcaee6a81e94d4675b4cab0cdfc035a242c31dbcb25d19e978256b6f9666d486d35fa11ce14cfbd515d
mesa-18.2.0-rc6.tar.gz
PGP:

[Mesa-dev] [PATCH v2 2/2] Replace uses of _mesa_bitcount with util_bitcount

and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem
in nir for platforms that don't have popcount or popcountll, such as
32bit msvc.

v2: - Fix additional uses of _mesa_bitcount added after this was
  originally written
---
 src/compiler/glsl/ir_constant_expression.cpp  |  2 +-
 src/compiler/glsl/ir_expression_operation.py  |  2 +-
 src/compiler/glsl/link_varyings.cpp   |  5 ++-
 src/compiler/glsl/linker.cpp  |  9 +++--
 src/compiler/nir/nir.c|  6 +--
 src/compiler/nir/nir_split_vars.c |  6 +--
 src/gallium/state_trackers/glx/xlib/glx_api.c |  7 ++--
 src/gallium/state_trackers/glx/xlib/xm_api.c  | 11 +++---
 src/gallium/targets/libgl-xlib/Makefile.am|  1 +
 src/intel/blorp/blorp_blit.c  |  5 ++-
 src/intel/compiler/brw_fs.cpp |  3 +-
 src/intel/compiler/brw_fs_nir.cpp |  3 +-
 src/intel/compiler/brw_nir.c  |  5 ++-
 src/intel/compiler/brw_vec4.cpp   |  3 +-
 src/intel/compiler/brw_vec4_visitor.cpp   |  3 +-
 src/intel/vulkan/anv_blorp.c  |  2 +-
 src/intel/vulkan/anv_image.c  |  9 +++--
 src/intel/vulkan/anv_nir_lower_multiview.c|  8 ++--
 src/intel/vulkan/anv_pipeline.c   |  2 +-
 src/intel/vulkan/anv_private.h|  7 ++--
 src/intel/vulkan/genX_cmd_buffer.c|  4 +-
 src/intel/vulkan/genX_query.c | 14 +++
 src/mesa/drivers/common/meta.c|  5 ++-
 src/mesa/drivers/dri/i965/brw_curbe.c |  3 +-
 src/mesa/drivers/dri/i965/brw_draw_upload.c   |  3 +-
 .../drivers/dri/i965/brw_performance_query.c  |  5 ++-
 src/mesa/drivers/dri/i965/brw_wm.c|  7 ++--
 src/mesa/drivers/x11/Makefile.am  |  1 +
 src/mesa/drivers/x11/fakeglx.c|  7 ++--
 src/mesa/drivers/x11/meson.build  |  2 +-
 src/mesa/drivers/x11/xm_api.c | 17 +
 src/mesa/main/arrayobj.c  |  5 ++-
 src/mesa/main/buffers.c   |  7 ++--
 src/mesa/main/imports.c   | 38 ---
 src/mesa/main/imports.h   | 15 
 src/mesa/program/program_parse.y  |  4 +-
 36 files changed, 104 insertions(+), 132 deletions(-)

diff --git a/src/compiler/glsl/ir_constant_expression.cpp 
b/src/compiler/glsl/ir_constant_expression.cpp
index c9788c70535..bfc22c0011a 100644
--- a/src/compiler/glsl/ir_constant_expression.cpp
+++ b/src/compiler/glsl/ir_constant_expression.cpp
@@ -39,7 +39,7 @@
 #include "ir.h"
 #include "compiler/glsl_types.h"
 #include "util/hash_table.h"
-#include "main/imports.h"
+#include "util/u_math.h"
 
 static float
 dot_f(ir_constant *op0, ir_constant *op1)
diff --git a/src/compiler/glsl/ir_expression_operation.py 
b/src/compiler/glsl/ir_expression_operation.py
index 16b98690a6d..306fc35f605 100644
--- a/src/compiler/glsl/ir_expression_operation.py
+++ b/src/compiler/glsl/ir_expression_operation.py
@@ -535,7 +535,7 @@ ir_expression_operation = [
 
# Bit operations, part of ARB_gpu_shader5.
operation("bitfield_reverse", 1, source_types=(uint_type, int_type), 
c_expression="bitfield_reverse({src0})"),
-   operation("bit_count", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression="_mesa_bitcount({src0})"),
+   operation("bit_count", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression="util_bitcount({src0})"),
operation("find_msb", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression={'u': "find_msb_uint({src0})", 'i': 
"find_msb_int({src0})"}),
operation("find_lsb", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression="find_msb_uint({src0} & -{src0})"),
 
diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 211633d9ee3..52e493cb599 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -38,6 +38,7 @@
 #include "link_varyings.h"
 #include "main/macros.h"
 #include "util/hash_table.h"
+#include "util/u_math.h"
 #include "program.h"
 
 
@@ -2879,13 +2880,13 @@ link_varyings(struct gl_shader_program *prog, unsigned 
first, unsigned last,
 
 /* This must be done after all dead varyings are eliminated. */
 if (sh_i != NULL) {
-   unsigned slots_used = _mesa_bitcount_64(reserved_out_slots);
+   unsigned slots_used = util_bitcount64(reserved_out_slots);
if (!check_against_output_limit(ctx, prog, sh_i, slots_used)) {
   return false;
}
 }
 
-unsigned slots_used = _mesa_bitcount_64(reserved_in_slots);
+unsigned slots_used = util_bitcount64(reserved_in_slots);
 if (!check_against_input_limit(ctx, prog, sh_next, slots_used))
return false;
 
diff --git a/src/compiler/glsl/linker.cpp

[Mesa-dev] [PATCH v2 1/2] move u_math to src/util

Currently we have two sets of functions for bit counts, one in gallium
and one in core mesa. The ones in core mesa are header only in many
cases, since they reduce to "#define _mesa_bitcount popcount", but they
provide a fallback implementation. This is important because 32bit msvc
doesn't have popcountll, just popcount; so when nir (for example)
includes the core mesa header it doesn't (and shouldn't) link with core
mesa. To fix this we'll promote the version out of gallium util, then
replace the core mesa uses with the util version, since nir (and other
non-core mesa users) can and do link with mesautils.
---
 src/broadcom/cle/v3d_packet_helpers.h   | 2 +-
 src/gallium/auxiliary/Makefile.sources  | 2 --
 src/gallium/auxiliary/meson.build   | 2 --
 src/gallium/auxiliary/util/u_format.c   | 2 +-
 src/gallium/auxiliary/util/u_format_bptc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_latc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_other.c | 2 +-
 src/gallium/auxiliary/util/u_format_pack.py | 2 +-
 src/gallium/auxiliary/util/u_format_rgtc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_s3tc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_yuv.h   | 2 +-
 src/gallium/auxiliary/util/u_format_zs.c| 2 +-
 src/util/Makefile.sources   | 2 ++
 src/util/meson.build| 2 ++
 src/{gallium/auxiliary => }/util/u_math.c   | 0
 src/{gallium/auxiliary => }/util/u_math.h   | 2 +-
 16 files changed, 15 insertions(+), 15 deletions(-)
 rename src/{gallium/auxiliary => }/util/u_math.c (100%)
 rename src/{gallium/auxiliary => }/util/u_math.h (99%)

diff --git a/src/broadcom/cle/v3d_packet_helpers.h 
b/src/broadcom/cle/v3d_packet_helpers.h
index f340b790697..c46089a0e60 100644
--- a/src/broadcom/cle/v3d_packet_helpers.h
+++ b/src/broadcom/cle/v3d_packet_helpers.h
@@ -26,7 +26,7 @@
 #include 
 #include 
 #include 
-#include 
+#include "util/u_math.h"
 
 #ifdef HAVE_VALGRIND
 #include 
diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index d66fa85f798..33d58dedf28 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -294,8 +294,6 @@ C_SOURCES := \
util/u_linear.h \
util/u_log.c \
util/u_log.h \
-   util/u_math.c \
-   util/u_math.h \
util/u_memory.h \
util/u_mm.c \
util/u_mm.h \
diff --git a/src/gallium/auxiliary/meson.build 
b/src/gallium/auxiliary/meson.build
index be558e07b27..9e3673a53c0 100644
--- a/src/gallium/auxiliary/meson.build
+++ b/src/gallium/auxiliary/meson.build
@@ -314,8 +314,6 @@ files_libgallium = files(
   'util/u_linear.h',
   'util/u_log.c',
   'util/u_log.h',
-  'util/u_math.c',
-  'util/u_math.h',
   'util/u_memory.h',
   'util/u_mm.c',
   'util/u_mm.h',
diff --git a/src/gallium/auxiliary/util/u_format.c 
b/src/gallium/auxiliary/util/u_format.c
index 1dd724d9b84..6445f2647cf 100644
--- a/src/gallium/auxiliary/util/u_format.c
+++ b/src/gallium/auxiliary/util/u_format.c
@@ -32,11 +32,11 @@
  * @author Jose Fonseca 
  */
 
-#include "u_math.h"
 #include "u_memory.h"
 #include "u_format.h"
 #include "u_format_s3tc.h"
 #include "u_surface.h"
+#include "util/u_math.h"
 
 #include "pipe/p_defines.h"
 
diff --git a/src/gallium/auxiliary/util/u_format_bptc.c 
b/src/gallium/auxiliary/util/u_format_bptc.c
index 87ec4139e09..519a541e380 100644
--- a/src/gallium/auxiliary/util/u_format_bptc.c
+++ b/src/gallium/auxiliary/util/u_format_bptc.c
@@ -23,10 +23,10 @@
  *
  **/
 
-#include "u_math.h"
 #include "u_format.h"
 #include "u_format_bptc.h"
 #include "util/format_srgb.h"
+#include "util/u_math.h"
 
 #define BPTC_BLOCK_DECODE
 #include "../../../mesa/main/texcompress_bptc_tmp.h"
diff --git a/src/gallium/auxiliary/util/u_format_latc.c 
b/src/gallium/auxiliary/util/u_format_latc.c
index 7b2bb00693f..f145081d56d 100644
--- a/src/gallium/auxiliary/util/u_format_latc.c
+++ b/src/gallium/auxiliary/util/u_format_latc.c
@@ -23,11 +23,11 @@
  **/
 
 #include 
-#include "u_math.h"
 #include "u_format.h"
 #include "u_format_rgtc.h"
 #include "u_format_latc.h"
 #include "util/rgtc.h"
+#include "util/u_math.h"
 
 void
 util_format_latc1_unorm_fetch_rgba_8unorm(uint8_t *dst, const uint8_t *src, 
unsigned i, unsigned j)
diff --git a/src/gallium/auxiliary/util/u_format_other.c 
b/src/gallium/auxiliary/util/u_format_other.c
index 025e096a95c..213cb9fd941 100644
--- a/src/gallium/auxiliary/util/u_format_other.c
+++ b/src/gallium/auxiliary/util/u_format_other.c
@@ -26,8 +26,8 @@
  **/
 
 
-#include "u_math.h"
 #include "u_format_other.h"
+#include "util/u_math.h"
 #include "util/format_rgb9e5.h"
 #include "util/format_r11g11b10f.h"
 
diff --git a/src/gallium/auxiliary/util/u_format_pack.py

Re: [Mesa-dev] [PATCH 3/4] gallium/u_inlines: improve pipe_reference_described perf for debug builds

On Tue, Sep 4, 2018 at 2:35 PM, Marek Olšák  wrote:
> On Mon, Sep 3, 2018 at 6:08 AM, Michel Dänzer  wrote:
>> On 2018-09-01 8:54 a.m., Marek Olšák wrote:
>>> From: Marek Olšák 
>>>
>>> +41% performance in debug builds
>>> (testing piglit/drawoverhead + u_threaded_context)
>>
>> Nice, but please include ministat output.
>
> I don't use ministat.

What I meant is that ministat isn't useful with drawoverhead, because
drawoverhead repeats testing if results are volatile until it finds a
good average.

Marek
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Re: [Mesa-dev] [PATCH 0/2] Promote u_math to src/util

Quoting Dylan Baker (2018-09-05 11:51:48)
> This is out of my series to add meson support for non-cygwin windows. Since
> that's been kinda slow to review and this seems like a good cleanup in 
> general,
> I thought I'd send this out separately.
> 
> Dylan Baker (2):
>   move u_math to src/util
>   Replace uses of _mesa_bitcount with util_bitcount
> 
>  src/broadcom/cle/v3d_packet_helpers.h |  2 +-
>  src/compiler/glsl/ir_constant_expression.cpp  |  2 +-
>  src/compiler/glsl/ir_expression_operation.py  |  2 +-
>  src/compiler/glsl/link_varyings.cpp   |  5 ++-
>  src/compiler/glsl/linker.cpp  |  9 +++--
>  src/compiler/nir/nir.c|  6 +--
>  src/gallium/auxiliary/Makefile.sources|  2 -
>  src/gallium/auxiliary/meson.build |  2 -
>  src/gallium/auxiliary/util/u_format.c |  2 +-
>  src/gallium/auxiliary/util/u_format_bptc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_latc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_other.c   |  2 +-
>  src/gallium/auxiliary/util/u_format_pack.py   |  2 +-
>  src/gallium/auxiliary/util/u_format_rgtc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_s3tc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_yuv.h |  2 +-
>  src/gallium/auxiliary/util/u_format_zs.c  |  2 +-
>  src/gallium/state_trackers/glx/xlib/glx_api.c |  7 ++--
>  src/gallium/state_trackers/glx/xlib/xm_api.c  | 11 +++---
>  src/gallium/targets/libgl-xlib/Makefile.am|  1 +
>  src/intel/blorp/blorp_blit.c  |  5 ++-
>  src/intel/compiler/brw_fs.cpp |  3 +-
>  src/intel/compiler/brw_fs_nir.cpp |  3 +-
>  src/intel/compiler/brw_nir.c  |  5 ++-
>  src/intel/compiler/brw_vec4.cpp   |  3 +-
>  src/intel/compiler/brw_vec4_visitor.cpp   |  3 +-
>  src/intel/vulkan/anv_blorp.c  |  2 +-
>  src/intel/vulkan/anv_image.c  |  9 +++--
>  src/intel/vulkan/anv_nir_lower_multiview.c|  8 ++--
>  src/intel/vulkan/anv_pipeline.c   |  2 +-
>  src/intel/vulkan/anv_private.h|  7 ++--
>  src/intel/vulkan/genX_cmd_buffer.c|  4 +-
>  src/intel/vulkan/genX_query.c | 14 +++
>  src/mesa/drivers/common/meta.c|  5 ++-
>  src/mesa/drivers/dri/i965/brw_curbe.c |  3 +-
>  src/mesa/drivers/dri/i965/brw_draw_upload.c   |  3 +-
>  .../drivers/dri/i965/brw_performance_query.c  |  5 ++-
>  src/mesa/drivers/dri/i965/brw_wm.c|  7 ++--
>  src/mesa/drivers/x11/Makefile.am  |  1 +
>  src/mesa/drivers/x11/fakeglx.c|  7 ++--
>  src/mesa/drivers/x11/meson.build  |  2 +-
>  src/mesa/drivers/x11/xm_api.c | 17 +
>  src/mesa/main/arrayobj.c  |  5 ++-
>  src/mesa/main/buffers.c   |  7 ++--
>  src/mesa/main/imports.c   | 38 ---
>  src/mesa/main/imports.h   | 15 
>  src/mesa/program/program_parse.y  |  4 +-
>  src/util/Makefile.sources |  2 +
>  src/util/meson.build  |  2 +
>  src/{gallium/auxiliary => }/util/u_math.c |  0
>  src/{gallium/auxiliary => }/util/u_math.h |  2 +-
>  51 files changed, 116 insertions(+), 144 deletions(-)
>  rename src/{gallium/auxiliary => }/util/u_math.c (100%)
>  rename src/{gallium/auxiliary => }/util/u_math.h (99%)
> 
> -- 
> 2.18.0
> 

Apparently I had some rebasing errors. I'll send a v2 shortly.


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[Mesa-dev] [PATCH] intel/isl: Add a _B suffix to some struct fields

I was about to make the claim to someone that every field in isl_surf
is either an enum or has explicit units.  Then I looked at isl_surf and
discovered this claim was wrong.  We should fix that.

Cc: Chad Versace 
---
 src/intel/blorp/blorp_blit.c  |   4 +-
 src/intel/blorp/blorp_clear.c |   4 +-
 src/intel/isl/isl.c   | 108 +-
 src/intel/isl/isl.h   |  38 +++---
 src/intel/isl/isl_emit_depth_stencil.c|   6 +-
 src/intel/isl/isl_storage_image.c |   2 +-
 src/intel/isl/isl_surface_state.c |  14 +--
 src/intel/vulkan/anv_blorp.c  |   2 +-
 src/intel/vulkan/anv_device.c |   6 +-
 src/intel/vulkan/anv_image.c  |  57 -
 src/intel/vulkan/anv_private.h|   4 +-
 src/intel/vulkan/genX_cmd_buffer.c|   4 +-
 src/mesa/drivers/dri/i965/brw_misc_state.c|   2 +-
 .../drivers/dri/i965/brw_wm_surface_state.c   |   6 +-
 src/mesa/drivers/dri/i965/intel_blit.c|  10 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c |  66 +--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |   2 +-
 .../drivers/dri/i965/intel_pixel_bitmap.c |   2 +-
 src/mesa/drivers/dri/i965/intel_pixel_read.c  |   2 +-
 src/mesa/drivers/dri/i965/intel_screen.c  |  28 ++---
 src/mesa/drivers/dri/i965/intel_tex_image.c   |   8 +-
 21 files changed, 188 insertions(+), 187 deletions(-)

diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 60cb32641d6..efa2cb08964 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -2108,7 +2108,7 @@ shrink_surface_params(const struct isl_device *dev,
x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa;
y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa;
isl_tiling_get_intratile_offset_sa(info->surf.tiling,
-  info->surf.format, info->surf.row_pitch,
+  info->surf.format, 
info->surf.row_pitch_B,
   x_offset_sa, y_offset_sa,
   _offset,
   >tile_x_sa, >tile_y_sa);
@@ -2708,7 +2708,7 @@ do_buffer_copy(struct blorp_batch *batch,
   .levels = 1,
   .array_len = 1,
   .samples = 1,
-  .row_pitch = width * block_size,
+  .row_pitch_B = width * block_size,
   .usage = ISL_SURF_USAGE_TEXTURE_BIT |
ISL_SURF_USAGE_RENDER_TARGET_BIT,
   .tiling_flags = ISL_TILING_LINEAR_BIT);
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index b4c744020d9..5b575dccc22 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -1089,7 +1089,7 @@ blorp_ccs_ambiguate(struct blorp_batch *batch,
isl_surf_get_image_offset_el(surf->aux_surf, level, layer, z,
 _offset_el, _offset_el);
isl_tiling_get_intratile_offset_el(surf->aux_surf->tiling, aux_fmtl->bpb,
-  surf->aux_surf->row_pitch,
+  surf->aux_surf->row_pitch_B,
   x_offset_el, y_offset_el,
   _B, _offset_el, _offset_el);
params.dst.addr.offset += offset_B;
@@ -1178,7 +1178,7 @@ blorp_ccs_ambiguate(struct blorp_batch *batch,
 .levels = 1,
 .array_len = 1,
 .samples = 1,
-.row_pitch = surf->aux_surf->row_pitch,
+.row_pitch_B = surf->aux_surf->row_pitch_B,
 .usage = ISL_SURF_USAGE_RENDER_TARGET_BIT,
 .tiling_flags = ISL_TILING_Y0_BIT);
assert(ok);
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index f39d8a79995..359293cfcb2 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1261,12 +1261,12 @@ static uint32_t
 isl_calc_linear_min_row_pitch(const struct isl_device *dev,
   const struct isl_surf_init_info *info,
   const struct isl_extent2d *phys_total_el,
-  uint32_t alignment)
+  uint32_t alignment_B)
 {
const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
const uint32_t bs = fmtl->bpb / 8;
 
-   return isl_align_npot(bs * phys_total_el->w, alignment);
+   return isl_align_npot(bs * phys_total_el->w, alignment_B);
 }
 
 static uint32_t
@@ -1274,7 +1274,7 @@ isl_calc_tiled_min_row_pitch(const struct isl_device *dev,
  const struct isl_surf_init_info *surf_info,
  const struct isl_tile_info *tile_info,
  const struct

Re: [Mesa-dev] [PATCH 0/2] Promote u_math to src/util

On Wednesday, 2018-09-05 11:51:48 -0700, Dylan Baker wrote:
> This is out of my series to add meson support for non-cygwin windows. Since
> that's been kinda slow to review and this seems like a good cleanup in 
> general,
> I thought I'd send this out separately.

Sounds reasonable, and I glanced through and didn't see any glaring
mistake, but that's not a full review, so a simple:
Acked-by: Eric Engestrom 

> 
> Dylan Baker (2):
>   move u_math to src/util
>   Replace uses of _mesa_bitcount with util_bitcount
> 
>  src/broadcom/cle/v3d_packet_helpers.h |  2 +-
>  src/compiler/glsl/ir_constant_expression.cpp  |  2 +-
>  src/compiler/glsl/ir_expression_operation.py  |  2 +-
>  src/compiler/glsl/link_varyings.cpp   |  5 ++-
>  src/compiler/glsl/linker.cpp  |  9 +++--
>  src/compiler/nir/nir.c|  6 +--
>  src/gallium/auxiliary/Makefile.sources|  2 -
>  src/gallium/auxiliary/meson.build |  2 -
>  src/gallium/auxiliary/util/u_format.c |  2 +-
>  src/gallium/auxiliary/util/u_format_bptc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_latc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_other.c   |  2 +-
>  src/gallium/auxiliary/util/u_format_pack.py   |  2 +-
>  src/gallium/auxiliary/util/u_format_rgtc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_s3tc.c|  2 +-
>  src/gallium/auxiliary/util/u_format_yuv.h |  2 +-
>  src/gallium/auxiliary/util/u_format_zs.c  |  2 +-
>  src/gallium/state_trackers/glx/xlib/glx_api.c |  7 ++--
>  src/gallium/state_trackers/glx/xlib/xm_api.c  | 11 +++---
>  src/gallium/targets/libgl-xlib/Makefile.am|  1 +
>  src/intel/blorp/blorp_blit.c  |  5 ++-
>  src/intel/compiler/brw_fs.cpp |  3 +-
>  src/intel/compiler/brw_fs_nir.cpp |  3 +-
>  src/intel/compiler/brw_nir.c  |  5 ++-
>  src/intel/compiler/brw_vec4.cpp   |  3 +-
>  src/intel/compiler/brw_vec4_visitor.cpp   |  3 +-
>  src/intel/vulkan/anv_blorp.c  |  2 +-
>  src/intel/vulkan/anv_image.c  |  9 +++--
>  src/intel/vulkan/anv_nir_lower_multiview.c|  8 ++--
>  src/intel/vulkan/anv_pipeline.c   |  2 +-
>  src/intel/vulkan/anv_private.h|  7 ++--
>  src/intel/vulkan/genX_cmd_buffer.c|  4 +-
>  src/intel/vulkan/genX_query.c | 14 +++
>  src/mesa/drivers/common/meta.c|  5 ++-
>  src/mesa/drivers/dri/i965/brw_curbe.c |  3 +-
>  src/mesa/drivers/dri/i965/brw_draw_upload.c   |  3 +-
>  .../drivers/dri/i965/brw_performance_query.c  |  5 ++-
>  src/mesa/drivers/dri/i965/brw_wm.c|  7 ++--
>  src/mesa/drivers/x11/Makefile.am  |  1 +
>  src/mesa/drivers/x11/fakeglx.c|  7 ++--
>  src/mesa/drivers/x11/meson.build  |  2 +-
>  src/mesa/drivers/x11/xm_api.c | 17 +
>  src/mesa/main/arrayobj.c  |  5 ++-
>  src/mesa/main/buffers.c   |  7 ++--
>  src/mesa/main/imports.c   | 38 ---
>  src/mesa/main/imports.h   | 15 
>  src/mesa/program/program_parse.y  |  4 +-
>  src/util/Makefile.sources |  2 +
>  src/util/meson.build  |  2 +
>  src/{gallium/auxiliary => }/util/u_math.c |  0
>  src/{gallium/auxiliary => }/util/u_math.h |  2 +-
>  51 files changed, 116 insertions(+), 144 deletions(-)
>  rename src/{gallium/auxiliary => }/util/u_math.c (100%)
>  rename src/{gallium/auxiliary => }/util/u_math.h (99%)
> 
> -- 
> 2.18.0
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Re: [Mesa-dev] [PATCH mesa] meson: vc4 requires libdrm too

Quoting Eric Engestrom (2018-09-05 11:44:30)
> On Wednesday, 2018-09-05 11:38:30 -0700, Dylan Baker wrote:
> > Quoting Eric Engestrom (2018-09-05 11:19:43)
> > > On Wednesday, 2018-09-05 10:26:14 -0700, Dylan Baker wrote:
> > > > Quoting Eric Anholt (2018-09-05 10:05:15)
> > > > > Eric Engestrom  writes:
> > > > > 
> > > > > > Anccording to 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm 
> > > > > > requirement",
> > > > > > vc4 is a special case here as it does not use its libdrm_vc4, but 
> > > > > > only depends
> > > > > > on core libdrm.
> > > > > >
> > > > > > The way the version check was added however means that the core 
> > > > > > libdrm
> > > > > > dependency() needs to be explicitly required if vc4 is being built.
> > > > > >
> > > > > > Fixes: 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement"
> > > > > > Cc: Eric Anholt 
> > > > > > Signed-off-by: Eric Engestrom 
> > > > > > ---
> > > > > >  meson.build | 2 +-
> > > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/meson.build b/meson.build
> > > > > > index 55416020402620a2565e..474d8692a956b0151b5c 100644
> > > > > > --- a/meson.build
> > > > > > +++ b/meson.build
> > > > > > @@ -1140,7 +1140,7 @@ endforeach
> > > > > >  with_gallium_drisw_kms = false
> > > > > >  dep_libdrm = dependency(
> > > > > >'libdrm', version : '>=' + _drm_ver,
> > > > > > -  required : with_dri2 or with_dri3
> > > > > > +  required : with_dri2 or with_dri3 or with_gallium_vc4
> > > > > 
> > > > > vc4 without with_dri2 or with_dri3?  I'm confused.
> > > > 
> > > > I guess it is theoretically possible to hit this case, if you were to 
> > > > build vc4
> > > > with the gallium xlib base glx and no egl then I guess you could hit 
> > > > this?
> > > > Maybe?
> > > 
> > > Yeah, I didn't check but this felt like it was possible.
> > > At best, this fixes a possible build issue.
> > > At worst, this is an explicit check that turns out to be redundant.
> > 
> > Well, my theory is bust. I uninstalled libdrm then ran:
> > meson build -Dglx=gallium-xlib -Dgallium-drivers=swrast,vc4 -Ddri-drivers= 
> > -Dvulkan-drivers=
> > ninja -C build
> > 
> > And it compiled and linked fine. I'm out of cases where we could run into a 
> > case
> > where we need libdrm but don't enforce it.
> 
> OK then, dropping it I guess. Sorry for the noise :]

No worries, better to look at it and decide it's fine than not look at it until
there's a bug.

Dylan


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Re: [Mesa-dev] [PATCH 0/9] dri2: Swapbuffer update v3.

2018-09-05 Thread Thomas Hellstrom

On 09/05/2018 04:30 PM, Timothy Arceri wrote:

On 05/09/18 23:36, Thomas Hellstrom wrote:

On 09/05/2018 02:36 PM, Timothy Arceri wrote:

On 05/09/18 22:09, Thomas Hellstrom wrote:

On 09/05/2018 01:45 PM, Timothy Arceri wrote:

On 16/08/17 04:31, Thomas Hellstrom wrote:

Implement back-to-fake-front flips,
Fix EGL_BUFFER_PRESERVED path.
Implement dri3 support for GLX_SWAP_EXCHANGE_OML and
GLX_SWAP_COPY_OML.

The back-to-fake-front flips will save a full buffer copy in the
case of a

fake front being enabled and GLX_SWAP_UNDEFINED_OML.

Support for EGL_BUFFER_PRESERVED and GLX_SWAP_X_OML are mostly
useful for
things like glretrace if traces are capured with applications
relying on a

specific swapbuffer behavior.

The EGL_BUFFER_PRESERVED path previously made sure the present
was done as

a copy, but there was nothing making sure that after the present,
the same back buffer was chosen.
This has now been changed so that if the previous back buffer is
idle, we reuse it. Otherwise we grab a new and copy the contents and
buffer age from the previous back buffer. Server side flips are
allowed.

GLX_SWAP_COPY_OML will behave like EGL_BUFFER_PRESERVED.

GLX_SWAP_EXCHANGE_OML will behave similarly, except that we try
to reuse the
previous fake front as the new back buffer if it's idle. If not,
we grab
a new back buffer and copy the contents and buffer age from the
old fake front.

v2:
- Split the original patch,
- Make sure we have a context for blitImage even if we don't have a
current context.
- Make sure the delayed backbuffer allocation is performed before
glXSwapBuffers, glXCopyBuffers and querying buffer age.
v3:
- squash three patches related to the same change.
- Address review comments by Michel Dänzer.

Testing done:
piglit tests/quick without regressions on svga.
A modified piglit glx-swap-exchange posted for review on the
piglit list.
That test required modifying the dri2 state tracke to advertise
unconditional

support for GLX_SWAP_EXCHANGE_OML

What exactly do I need to do to force this to be advertised? A
bigger question is what more is required to expose
GLX_SWAP_EXCHANGE_OML more generally?

It seems this is required for a few games running on wine [1].

[1]
https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugs.freedesktop.org%2Fshow_bug.cgi%3Fid%3D97516data=02%7C01%7Cthellstrom%40vmware.com%7Cbf80baf0e82c4d4339e708d6133c25d7%7Cb39138ca3cee4b4aa4d6cd83d9dd62f0%7C1%7C0%7C636717546404445044sdata=RhyyM9A45NftarY5SsJbUz8pMaRTnIbx%2Fp4P2ZRcS64%3Dreserved=0

You need to get the X server AIGLX to advertize it, because the
available features are the intersection of the X server AIGLX
features and the dri driver features, even if this is purely
implemented in the dri client. The reason GLX works this way is
that after you've choosen your config you can either choose to
select a direct or indirect context. That was a poor design.

Now the problem is that AIGLX isn't able to support it, because it
uses the dri driver dri2 path rather than the dri3 path, and I
never got to modifying AIGLX to use the dri3 path. Didn't think it
was worth the extra work.

Hmm ... thanks for the info. I should at least add some of this to
the bug report.

In any case, you can hack-enable GLX_SWAP_EXCHANGE_OML if the
client is using dri3 by adding __DRI_ATTRIB_SWAP_EXCHANGE to
back_buffer_modes[] in src/gallium/state_trackers/dri/dri_screen.c,
recompile and make sure the X server also picks up the recompiled
driver. That is if you have a gallium driver. This worked fine with
vmwgfx at the time I pushed the patch as tested by the
corresponding piglit test.

I did try this already with radeonsi but it didn't seem to work. I
even restarted my PC to make sure the correct driver was selected.

How did you test? I'll give it a test on vmwgfx + piglit.
/Thomas

I just tried running the glx-swap-exchange piglit test. I was still
getting:

Couldn't get a GLX_SWAP_EXCHANGE_OML, RGBA, double-buffered fbconfig
PIGLIT: {"result": "skip" }

It works fine here, piglit test is passing. Didn't work at first, but I
got the dri driver installation directory wrong, once that was resolved
and the X server really picked up the correct driver it worked fine.
What distro are you on?

/Thomas

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Re: [Mesa-dev] [PATCH v4 12/49] meson: don't build glx or dri by default on windows

Quoting Brian Paul (2018-09-05 11:50:36)
> On 09/05/2018 11:57 AM, Dylan Baker wrote:
> > Quoting Eric Engestrom (2018-08-23 10:13:17)
> >> On Wednesday, 2018-08-22 10:04:35 -0700, Dylan Baker wrote:
> >>> Signed-off-by: Dylan Baker 
> >>> Reviewed-by: Eric Anholt 
> >>> ---
> >>>   meson.build | 8 ++--
> >>>   1 file changed, 6 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/meson.build b/meson.build
> >>> index 1af610573d5..5102ffe0c7c 100644
> >>> --- a/meson.build
> >>> +++ b/meson.build
> >>> @@ -264,8 +264,12 @@ if with_glx == 'auto'
> >>> elif with_platform_haiku
> >>>   with_glx = 'disabled'
> >>
> >> How about simply adding it here, before the with_gallium check?
> >>
> >>+  elif host_machine.system() == 'windows'
> >>+with_glx = 'disabled'
> 
> Is host_machine where the compiler's running?  If so, this won't work if 
> using MinGW to build a Windows driver on Linux.

build_machine is where the compiler is running, host_machine is where the
compiled binaries will run. meson has a target_machine, but that's only useful
for doing a Canadian Cross, ie, where the output of the binaries will run.

Dylan

> 
> The logic should be something like "if target_system == windows, then 
> disable DRI/GLX".
> 
> -Brian
> 
> 
> 
> >>
> >> Otherwise this opens the door to a weird `(gallium + x11 + gl - vk) on
> >> windows` bug here.
> >>
> >> With that:
> >> Reviewed-by: Eric Engestrom 
> >>
> >>> elif with_gallium
> >>> -# Even when building just gallium drivers the user probably wants dri
> >>> -with_glx = 'dri'
> >>> +if host_machine.system() == 'windows'
> >>> +  with_glx = 'disabled'
> >>> +else
> >>> +  # Even when building just gallium drivers the user probably wants 
> >>> dri
> >>> +  with_glx = 'dri'
> >>> +endif
> >>> elif with_platform_x11 and with_any_opengl and not with_any_vk
> >>>   # The automatic behavior should not be to turn on xlib based glx 
> >>> when
> >>>   # building only vulkan drivers
> >>> -- 
> >>> 2.18.0
> >>>
> >>> ___
> >>> mesa-dev mailing list
> >>> mesa-dev@lists.freedesktop.org
> >>> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Fmesa-devdata=02%7C01%7Cbrianp%40vmware.com%7C95cc38b18998418b9f5b08d6135938a3%7Cb39138ca3cee4b4aa4d6cd83d9dd62f0%7C1%7C0%7C636717671257955683sdata=aVyR3XVXpuv9oWNQukAglwMrNXcIMzHvX6pGZNervbQ%3Dreserved=0
> > 
> > ping
> > 
> > 
> > 
> > ___
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> > 
> 


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[Mesa-dev] [PATCH 1/2] move u_math to src/util

Currently we have two sets of functions for bit counts, one in gallium
and one in core mesa. The ones in core mesa are header only in many
cases, since they reduce to "#define _mesa_bitcount popcount", but they
provide a fallback implementation. This is important because 32bit msvc
doesn't have popcountll, just popcount; so when nir (for example)
includes the core mesa header it doesn't (and shouldn't) link with core
mesa. To fix this we'll promote the version out of gallium util, then
replace the core mesa uses with the util version, since nir (and other
non-core mesa users) can and do link with mesautils.
---
 src/broadcom/cle/v3d_packet_helpers.h   | 2 +-
 src/gallium/auxiliary/Makefile.sources  | 2 --
 src/gallium/auxiliary/meson.build   | 2 --
 src/gallium/auxiliary/util/u_format.c   | 2 +-
 src/gallium/auxiliary/util/u_format_bptc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_latc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_other.c | 2 +-
 src/gallium/auxiliary/util/u_format_pack.py | 2 +-
 src/gallium/auxiliary/util/u_format_rgtc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_s3tc.c  | 2 +-
 src/gallium/auxiliary/util/u_format_yuv.h   | 2 +-
 src/gallium/auxiliary/util/u_format_zs.c| 2 +-
 src/util/Makefile.sources   | 2 ++
 src/util/meson.build| 2 ++
 src/{gallium/auxiliary => }/util/u_math.c   | 0
 src/{gallium/auxiliary => }/util/u_math.h   | 2 +-
 16 files changed, 15 insertions(+), 15 deletions(-)
 rename src/{gallium/auxiliary => }/util/u_math.c (100%)
 rename src/{gallium/auxiliary => }/util/u_math.h (99%)

diff --git a/src/broadcom/cle/v3d_packet_helpers.h 
b/src/broadcom/cle/v3d_packet_helpers.h
index f340b790697..c46089a0e60 100644
--- a/src/broadcom/cle/v3d_packet_helpers.h
+++ b/src/broadcom/cle/v3d_packet_helpers.h
@@ -26,7 +26,7 @@
 #include 
 #include 
 #include 
-#include 
+#include "util/u_math.h"
 
 #ifdef HAVE_VALGRIND
 #include 
diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index d66fa85f798..33d58dedf28 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -294,8 +294,6 @@ C_SOURCES := \
util/u_linear.h \
util/u_log.c \
util/u_log.h \
-   util/u_math.c \
-   util/u_math.h \
util/u_memory.h \
util/u_mm.c \
util/u_mm.h \
diff --git a/src/gallium/auxiliary/meson.build 
b/src/gallium/auxiliary/meson.build
index be558e07b27..9e3673a53c0 100644
--- a/src/gallium/auxiliary/meson.build
+++ b/src/gallium/auxiliary/meson.build
@@ -314,8 +314,6 @@ files_libgallium = files(
   'util/u_linear.h',
   'util/u_log.c',
   'util/u_log.h',
-  'util/u_math.c',
-  'util/u_math.h',
   'util/u_memory.h',
   'util/u_mm.c',
   'util/u_mm.h',
diff --git a/src/gallium/auxiliary/util/u_format.c 
b/src/gallium/auxiliary/util/u_format.c
index 1dd724d9b84..6445f2647cf 100644
--- a/src/gallium/auxiliary/util/u_format.c
+++ b/src/gallium/auxiliary/util/u_format.c
@@ -32,11 +32,11 @@
  * @author Jose Fonseca 
  */
 
-#include "u_math.h"
 #include "u_memory.h"
 #include "u_format.h"
 #include "u_format_s3tc.h"
 #include "u_surface.h"
+#include "util/u_math.h"
 
 #include "pipe/p_defines.h"
 
diff --git a/src/gallium/auxiliary/util/u_format_bptc.c 
b/src/gallium/auxiliary/util/u_format_bptc.c
index 87ec4139e09..519a541e380 100644
--- a/src/gallium/auxiliary/util/u_format_bptc.c
+++ b/src/gallium/auxiliary/util/u_format_bptc.c
@@ -23,10 +23,10 @@
  *
  **/
 
-#include "u_math.h"
 #include "u_format.h"
 #include "u_format_bptc.h"
 #include "util/format_srgb.h"
+#include "util/u_math.h"
 
 #define BPTC_BLOCK_DECODE
 #include "../../../mesa/main/texcompress_bptc_tmp.h"
diff --git a/src/gallium/auxiliary/util/u_format_latc.c 
b/src/gallium/auxiliary/util/u_format_latc.c
index 7b2bb00693f..f145081d56d 100644
--- a/src/gallium/auxiliary/util/u_format_latc.c
+++ b/src/gallium/auxiliary/util/u_format_latc.c
@@ -23,11 +23,11 @@
  **/
 
 #include 
-#include "u_math.h"
 #include "u_format.h"
 #include "u_format_rgtc.h"
 #include "u_format_latc.h"
 #include "util/rgtc.h"
+#include "util/u_math.h"
 
 void
 util_format_latc1_unorm_fetch_rgba_8unorm(uint8_t *dst, const uint8_t *src, 
unsigned i, unsigned j)
diff --git a/src/gallium/auxiliary/util/u_format_other.c 
b/src/gallium/auxiliary/util/u_format_other.c
index 025e096a95c..213cb9fd941 100644
--- a/src/gallium/auxiliary/util/u_format_other.c
+++ b/src/gallium/auxiliary/util/u_format_other.c
@@ -26,8 +26,8 @@
  **/
 
 
-#include "u_math.h"
 #include "u_format_other.h"
+#include "util/u_math.h"
 #include "util/format_rgb9e5.h"
 #include "util/format_r11g11b10f.h"
 
diff --git a/src/gallium/auxiliary/util/u_format_pack.py

[Mesa-dev] [PATCH 2/2] Replace uses of _mesa_bitcount with util_bitcount

and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem
in nir for platforms that don't have popcount or popcountll, such as
32bit msvc.
---
 src/compiler/glsl/ir_constant_expression.cpp  |  2 +-
 src/compiler/glsl/ir_expression_operation.py  |  2 +-
 src/compiler/glsl/link_varyings.cpp   |  5 ++-
 src/compiler/glsl/linker.cpp  |  9 +++--
 src/compiler/nir/nir.c|  6 +--
 src/gallium/state_trackers/glx/xlib/glx_api.c |  7 ++--
 src/gallium/state_trackers/glx/xlib/xm_api.c  | 11 +++---
 src/gallium/targets/libgl-xlib/Makefile.am|  1 +
 src/intel/blorp/blorp_blit.c  |  5 ++-
 src/intel/compiler/brw_fs.cpp |  3 +-
 src/intel/compiler/brw_fs_nir.cpp |  3 +-
 src/intel/compiler/brw_nir.c  |  5 ++-
 src/intel/compiler/brw_vec4.cpp   |  3 +-
 src/intel/compiler/brw_vec4_visitor.cpp   |  3 +-
 src/intel/vulkan/anv_blorp.c  |  2 +-
 src/intel/vulkan/anv_image.c  |  9 +++--
 src/intel/vulkan/anv_nir_lower_multiview.c|  8 ++--
 src/intel/vulkan/anv_pipeline.c   |  2 +-
 src/intel/vulkan/anv_private.h|  7 ++--
 src/intel/vulkan/genX_cmd_buffer.c|  4 +-
 src/intel/vulkan/genX_query.c | 14 +++
 src/mesa/drivers/common/meta.c|  5 ++-
 src/mesa/drivers/dri/i965/brw_curbe.c |  3 +-
 src/mesa/drivers/dri/i965/brw_draw_upload.c   |  3 +-
 .../drivers/dri/i965/brw_performance_query.c  |  5 ++-
 src/mesa/drivers/dri/i965/brw_wm.c|  7 ++--
 src/mesa/drivers/x11/Makefile.am  |  1 +
 src/mesa/drivers/x11/fakeglx.c|  7 ++--
 src/mesa/drivers/x11/meson.build  |  2 +-
 src/mesa/drivers/x11/xm_api.c | 17 +
 src/mesa/main/arrayobj.c  |  5 ++-
 src/mesa/main/buffers.c   |  7 ++--
 src/mesa/main/imports.c   | 38 ---
 src/mesa/main/imports.h   | 15 
 src/mesa/program/program_parse.y  |  4 +-
 35 files changed, 101 insertions(+), 129 deletions(-)

diff --git a/src/compiler/glsl/ir_constant_expression.cpp 
b/src/compiler/glsl/ir_constant_expression.cpp
index c9788c70535..bfc22c0011a 100644
--- a/src/compiler/glsl/ir_constant_expression.cpp
+++ b/src/compiler/glsl/ir_constant_expression.cpp
@@ -39,7 +39,7 @@
 #include "ir.h"
 #include "compiler/glsl_types.h"
 #include "util/hash_table.h"
-#include "main/imports.h"
+#include "util/u_math.h"
 
 static float
 dot_f(ir_constant *op0, ir_constant *op1)
diff --git a/src/compiler/glsl/ir_expression_operation.py 
b/src/compiler/glsl/ir_expression_operation.py
index 16b98690a6d..306fc35f605 100644
--- a/src/compiler/glsl/ir_expression_operation.py
+++ b/src/compiler/glsl/ir_expression_operation.py
@@ -535,7 +535,7 @@ ir_expression_operation = [
 
# Bit operations, part of ARB_gpu_shader5.
operation("bitfield_reverse", 1, source_types=(uint_type, int_type), 
c_expression="bitfield_reverse({src0})"),
-   operation("bit_count", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression="_mesa_bitcount({src0})"),
+   operation("bit_count", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression="util_bitcount({src0})"),
operation("find_msb", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression={'u': "find_msb_uint({src0})", 'i': 
"find_msb_int({src0})"}),
operation("find_lsb", 1, source_types=(uint_type, int_type), 
dest_type=int_type, c_expression="find_msb_uint({src0} & -{src0})"),
 
diff --git a/src/compiler/glsl/link_varyings.cpp 
b/src/compiler/glsl/link_varyings.cpp
index 211633d9ee3..52e493cb599 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -38,6 +38,7 @@
 #include "link_varyings.h"
 #include "main/macros.h"
 #include "util/hash_table.h"
+#include "util/u_math.h"
 #include "program.h"
 
 
@@ -2879,13 +2880,13 @@ link_varyings(struct gl_shader_program *prog, unsigned 
first, unsigned last,
 
 /* This must be done after all dead varyings are eliminated. */
 if (sh_i != NULL) {
-   unsigned slots_used = _mesa_bitcount_64(reserved_out_slots);
+   unsigned slots_used = util_bitcount64(reserved_out_slots);
if (!check_against_output_limit(ctx, prog, sh_i, slots_used)) {
   return false;
}
 }
 
-unsigned slots_used = _mesa_bitcount_64(reserved_in_slots);
+unsigned slots_used = util_bitcount64(reserved_in_slots);
 if (!check_against_input_limit(ctx, prog, sh_next, slots_used))
return false;
 
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index f08971d7803..57cf7eb2a8c 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -84,6 +84,7 @@

[Mesa-dev] [PATCH 0/2] Promote u_math to src/util

This is out of my series to add meson support for non-cygwin windows. Since
that's been kinda slow to review and this seems like a good cleanup in general,
I thought I'd send this out separately.

Dylan Baker (2):
  move u_math to src/util
  Replace uses of _mesa_bitcount with util_bitcount

 src/broadcom/cle/v3d_packet_helpers.h |  2 +-
 src/compiler/glsl/ir_constant_expression.cpp  |  2 +-
 src/compiler/glsl/ir_expression_operation.py  |  2 +-
 src/compiler/glsl/link_varyings.cpp   |  5 ++-
 src/compiler/glsl/linker.cpp  |  9 +++--
 src/compiler/nir/nir.c|  6 +--
 src/gallium/auxiliary/Makefile.sources|  2 -
 src/gallium/auxiliary/meson.build |  2 -
 src/gallium/auxiliary/util/u_format.c |  2 +-
 src/gallium/auxiliary/util/u_format_bptc.c|  2 +-
 src/gallium/auxiliary/util/u_format_latc.c|  2 +-
 src/gallium/auxiliary/util/u_format_other.c   |  2 +-
 src/gallium/auxiliary/util/u_format_pack.py   |  2 +-
 src/gallium/auxiliary/util/u_format_rgtc.c|  2 +-
 src/gallium/auxiliary/util/u_format_s3tc.c|  2 +-
 src/gallium/auxiliary/util/u_format_yuv.h |  2 +-
 src/gallium/auxiliary/util/u_format_zs.c  |  2 +-
 src/gallium/state_trackers/glx/xlib/glx_api.c |  7 ++--
 src/gallium/state_trackers/glx/xlib/xm_api.c  | 11 +++---
 src/gallium/targets/libgl-xlib/Makefile.am|  1 +
 src/intel/blorp/blorp_blit.c  |  5 ++-
 src/intel/compiler/brw_fs.cpp |  3 +-
 src/intel/compiler/brw_fs_nir.cpp |  3 +-
 src/intel/compiler/brw_nir.c  |  5 ++-
 src/intel/compiler/brw_vec4.cpp   |  3 +-
 src/intel/compiler/brw_vec4_visitor.cpp   |  3 +-
 src/intel/vulkan/anv_blorp.c  |  2 +-
 src/intel/vulkan/anv_image.c  |  9 +++--
 src/intel/vulkan/anv_nir_lower_multiview.c|  8 ++--
 src/intel/vulkan/anv_pipeline.c   |  2 +-
 src/intel/vulkan/anv_private.h|  7 ++--
 src/intel/vulkan/genX_cmd_buffer.c|  4 +-
 src/intel/vulkan/genX_query.c | 14 +++
 src/mesa/drivers/common/meta.c|  5 ++-
 src/mesa/drivers/dri/i965/brw_curbe.c |  3 +-
 src/mesa/drivers/dri/i965/brw_draw_upload.c   |  3 +-
 .../drivers/dri/i965/brw_performance_query.c  |  5 ++-
 src/mesa/drivers/dri/i965/brw_wm.c|  7 ++--
 src/mesa/drivers/x11/Makefile.am  |  1 +
 src/mesa/drivers/x11/fakeglx.c|  7 ++--
 src/mesa/drivers/x11/meson.build  |  2 +-
 src/mesa/drivers/x11/xm_api.c | 17 +
 src/mesa/main/arrayobj.c  |  5 ++-
 src/mesa/main/buffers.c   |  7 ++--
 src/mesa/main/imports.c   | 38 ---
 src/mesa/main/imports.h   | 15 
 src/mesa/program/program_parse.y  |  4 +-
 src/util/Makefile.sources |  2 +
 src/util/meson.build  |  2 +
 src/{gallium/auxiliary => }/util/u_math.c |  0
 src/{gallium/auxiliary => }/util/u_math.h |  2 +-
 51 files changed, 116 insertions(+), 144 deletions(-)
 rename src/{gallium/auxiliary => }/util/u_math.c (100%)
 rename src/{gallium/auxiliary => }/util/u_math.h (99%)

-- 
2.18.0

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Re: [Mesa-dev] [PATCH v4 12/49] meson: don't build glx or dri by default on windows

2018-09-05 Thread Brian Paul


On 09/05/2018 11:57 AM, Dylan Baker wrote:

Quoting Eric Engestrom (2018-08-23 10:13:17)

On Wednesday, 2018-08-22 10:04:35 -0700, Dylan Baker wrote:

Signed-off-by: Dylan Baker 
Reviewed-by: Eric Anholt 
---
  meson.build | 8 ++--
  1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/meson.build b/meson.build
index 1af610573d5..5102ffe0c7c 100644
--- a/meson.build
+++ b/meson.build
@@ -264,8 +264,12 @@ if with_glx == 'auto'
elif with_platform_haiku
  with_glx = 'disabled'


How about simply adding it here, before the with_gallium check?

   +  elif host_machine.system() == 'windows'
   +with_glx = 'disabled'


Is host_machine where the compiler's running?  If so, this won't work if 
using MinGW to build a Windows driver on Linux.


The logic should be something like "if target_system == windows, then 
disable DRI/GLX".


-Brian





Otherwise this opens the door to a weird `(gallium + x11 + gl - vk) on
windows` bug here.

With that:
Reviewed-by: Eric Engestrom 


elif with_gallium
-# Even when building just gallium drivers the user probably wants dri
-with_glx = 'dri'
+if host_machine.system() == 'windows'
+  with_glx = 'disabled'
+else
+  # Even when building just gallium drivers the user probably wants dri
+  with_glx = 'dri'
+endif
elif with_platform_x11 and with_any_opengl and not with_any_vk
  # The automatic behavior should not be to turn on xlib based glx when
  # building only vulkan drivers
--
2.18.0

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Re: [Mesa-dev] [PATCH v4 12/49] meson: don't build glx or dri by default on windows

Quoting Eric Engestrom (2018-09-05 11:16:28)
> On Thursday, 2018-08-23 10:27:17 -0700, Dylan Baker wrote:
> > Quoting Eric Engestrom (2018-08-23 10:13:17)
> > > On Wednesday, 2018-08-22 10:04:35 -0700, Dylan Baker wrote:
> > > > Signed-off-by: Dylan Baker 
> > > > Reviewed-by: Eric Anholt 
> > > > ---
> > > >  meson.build | 8 ++--
> > > >  1 file changed, 6 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/meson.build b/meson.build
> > > > index 1af610573d5..5102ffe0c7c 100644
> > > > --- a/meson.build
> > > > +++ b/meson.build
> > > > @@ -264,8 +264,12 @@ if with_glx == 'auto'
> > > >elif with_platform_haiku
> > > >  with_glx = 'disabled'
> > > 
> > > How about simply adding it here, before the with_gallium check?
> > > 
> > >   +  elif host_machine.system() == 'windows'
> > >   +with_glx = 'disabled'
> > > 
> > > Otherwise this opens the door to a weird `(gallium + x11 + gl - vk) on
> > > windows` bug here.
> > 
> > I'm trying to understand the bug, if you build with windows dri you'll get
> > glx? It seems like then really we should have the first option be "if
> > with_dri and with_dri_platform == 'drm'" (or should it be "with_dri and not
> > ['windows', 'apple'].contains(with_dri_platform)"?) and instead of simply
> > with_dri, or am I missing something?
> 
> I just meant that it would be more robust to write it in that order, so
> that if that combination ever becomes possible in the build system, this
> doesn't cause any weird bugs.

Ahhh, okay, I can change that then.

> That said, you can just ignore this, it wasn't really worth mentioning.
> 
> (and sorry for forgetting to reply)

No worries, it's a big series and not that interesting unless you care about
windows.

Dylan


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Re: [Mesa-dev] [PATCH mesa] meson: vc4 requires libdrm too

On Wednesday, 2018-09-05 11:38:30 -0700, Dylan Baker wrote:
> Quoting Eric Engestrom (2018-09-05 11:19:43)
> > On Wednesday, 2018-09-05 10:26:14 -0700, Dylan Baker wrote:
> > > Quoting Eric Anholt (2018-09-05 10:05:15)
> > > > Eric Engestrom  writes:
> > > > 
> > > > > Anccording to 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm 
> > > > > requirement",
> > > > > vc4 is a special case here as it does not use its libdrm_vc4, but 
> > > > > only depends
> > > > > on core libdrm.
> > > > >
> > > > > The way the version check was added however means that the core libdrm
> > > > > dependency() needs to be explicitly required if vc4 is being built.
> > > > >
> > > > > Fixes: 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement"
> > > > > Cc: Eric Anholt 
> > > > > Signed-off-by: Eric Engestrom 
> > > > > ---
> > > > >  meson.build | 2 +-
> > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/meson.build b/meson.build
> > > > > index 55416020402620a2565e..474d8692a956b0151b5c 100644
> > > > > --- a/meson.build
> > > > > +++ b/meson.build
> > > > > @@ -1140,7 +1140,7 @@ endforeach
> > > > >  with_gallium_drisw_kms = false
> > > > >  dep_libdrm = dependency(
> > > > >'libdrm', version : '>=' + _drm_ver,
> > > > > -  required : with_dri2 or with_dri3
> > > > > +  required : with_dri2 or with_dri3 or with_gallium_vc4
> > > > 
> > > > vc4 without with_dri2 or with_dri3?  I'm confused.
> > > 
> > > I guess it is theoretically possible to hit this case, if you were to 
> > > build vc4
> > > with the gallium xlib base glx and no egl then I guess you could hit this?
> > > Maybe?
> > 
> > Yeah, I didn't check but this felt like it was possible.
> > At best, this fixes a possible build issue.
> > At worst, this is an explicit check that turns out to be redundant.
> 
> Well, my theory is bust. I uninstalled libdrm then ran:
> meson build -Dglx=gallium-xlib -Dgallium-drivers=swrast,vc4 -Ddri-drivers= 
> -Dvulkan-drivers=
> ninja -C build
> 
> And it compiled and linked fine. I'm out of cases where we could run into a 
> case
> where we need libdrm but don't enforce it.

OK then, dropping it I guess. Sorry for the noise :]

> 
> Dylan
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Re: [Mesa-dev] [PATCH mesa] meson: vc4 requires libdrm too

Quoting Eric Engestrom (2018-09-05 11:19:43)
> On Wednesday, 2018-09-05 10:26:14 -0700, Dylan Baker wrote:
> > Quoting Eric Anholt (2018-09-05 10:05:15)
> > > Eric Engestrom  writes:
> > > 
> > > > Anccording to 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm 
> > > > requirement",
> > > > vc4 is a special case here as it does not use its libdrm_vc4, but only 
> > > > depends
> > > > on core libdrm.
> > > >
> > > > The way the version check was added however means that the core libdrm
> > > > dependency() needs to be explicitly required if vc4 is being built.
> > > >
> > > > Fixes: 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement"
> > > > Cc: Eric Anholt 
> > > > Signed-off-by: Eric Engestrom 
> > > > ---
> > > >  meson.build | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/meson.build b/meson.build
> > > > index 55416020402620a2565e..474d8692a956b0151b5c 100644
> > > > --- a/meson.build
> > > > +++ b/meson.build
> > > > @@ -1140,7 +1140,7 @@ endforeach
> > > >  with_gallium_drisw_kms = false
> > > >  dep_libdrm = dependency(
> > > >'libdrm', version : '>=' + _drm_ver,
> > > > -  required : with_dri2 or with_dri3
> > > > +  required : with_dri2 or with_dri3 or with_gallium_vc4
> > > 
> > > vc4 without with_dri2 or with_dri3?  I'm confused.
> > 
> > I guess it is theoretically possible to hit this case, if you were to build 
> > vc4
> > with the gallium xlib base glx and no egl then I guess you could hit this?
> > Maybe?
> 
> Yeah, I didn't check but this felt like it was possible.
> At best, this fixes a possible build issue.
> At worst, this is an explicit check that turns out to be redundant.

Well, my theory is bust. I uninstalled libdrm then ran:
meson build -Dglx=gallium-xlib -Dgallium-drivers=swrast,vc4 -Ddri-drivers= 
-Dvulkan-drivers=
ninja -C build

And it compiled and linked fine. I'm out of cases where we could run into a case
where we need libdrm but don't enforce it.

Dylan


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Re: [Mesa-dev] [PATCH 2/4] intel/decoder: Avoid freeing invalid pointer


On 09/05/2018 11:06 AM, Lionel Landwerlin wrote:
> On 05/09/2018 19:02, Sagar Ghuge wrote:
>> Hi Lionel,
>>
>> Thanks for reviewing patches and comments.
>>
>> On 09/05/2018 10:29 AM, Lionel Landwerlin wrote:
>>> On 05/09/2018 18:19, Sagar Ghuge wrote:
 Signed-off-by: Sagar Ghuge 
 ---
    src/intel/common/gen_decoder.c | 4 
    1 file changed, 4 deletions(-)

 diff --git a/src/intel/common/gen_decoder.c 
 b/src/intel/common/gen_decoder.c
 index dbd060d53c..c44b8f060d 100644
 --- a/src/intel/common/gen_decoder.c
 +++ b/src/intel/common/gen_decoder.c
 @@ -662,8 +662,6 @@ gen_spec_load_from_path(const struct gen_device_info 
 *devinfo,
  len = fread(buf, 1, XML_BUFFER_SIZE, input);
  if (len == 0) {
     fprintf(stderr, "fread: %m\n");
 - free(ctx.spec);
 - ctx.spec = NULL;
     goto end;
  }
  if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) {
 @@ -672,8 +670,6 @@ gen_spec_load_from_path(const struct gen_device_info 
 *devinfo,
     XML_GetCurrentLineNumber(ctx.parser),
     XML_GetCurrentColumnNumber(ctx.parser),
     XML_ErrorString(XML_GetErrorCode(ctx.parser)));
 - free(ctx.spec);
 - ctx.spec = NULL;
     goto end;
  }
   } while (len > 0);
>>> Looks good but we're still missing a ralloc_free(ctx.spec) after the end 
>>> label.
>> In patch 4, I am freeing up gen_batch_decode_ctx instance using 
>> gen_batch_decode_ctx_finish() which is also responsible for destroying spec.
> 
> 
> I see. But I assumed that would be only in the case this function succeeded.
> 
> If we didn't manage to parse the genxml, is there much of a point trying to 
> decode anything?
> 
ohh. I got it. My bad, I was trying to fix wrong problem I guess. fread does 
not distinguish between end-of-file and error, so according to that I will free 
up spec. 
> 
> 
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Re: [Mesa-dev] [PATCH mesa] meson: vc4 requires libdrm too

On Wednesday, 2018-09-05 10:26:14 -0700, Dylan Baker wrote:
> Quoting Eric Anholt (2018-09-05 10:05:15)
> > Eric Engestrom  writes:
> > 
> > > According to 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm 
> > > requirement",
> > > vc4 is a special case here as it does not use its libdrm_vc4, but only 
> > > depends
> > > on core libdrm.
> > >
> > > The way the version check was added however means that the core libdrm
> > > dependency() needs to be explicitly required if vc4 is being built.
> > >
> > > Fixes: 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement"
> > > Cc: Eric Anholt 
> > > Signed-off-by: Eric Engestrom 
> > > ---
> > >  meson.build | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/meson.build b/meson.build
> > > index 55416020402620a2565e..474d8692a956b0151b5c 100644
> > > --- a/meson.build
> > > +++ b/meson.build
> > > @@ -1140,7 +1140,7 @@ endforeach
> > >  with_gallium_drisw_kms = false
> > >  dep_libdrm = dependency(
> > >'libdrm', version : '>=' + _drm_ver,
> > > -  required : with_dri2 or with_dri3
> > > +  required : with_dri2 or with_dri3 or with_gallium_vc4
> > 
> > vc4 without with_dri2 or with_dri3?  I'm confused.
> 
> I guess it is theoretically possible to hit this case, if you were to build 
> vc4
> with the gallium xlib base glx and no egl then I guess you could hit this?
> Maybe?

Yeah, I didn't check but this felt like it was possible.
At best, this fixes a possible build issue.
At worst, this is an explicit check that turns out to be redundant.

> 
> Dylan
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Re: [Mesa-dev] [PATCH v4 12/49] meson: don't build glx or dri by default on windows

On Thursday, 2018-08-23 10:27:17 -0700, Dylan Baker wrote:
> Quoting Eric Engestrom (2018-08-23 10:13:17)
> > On Wednesday, 2018-08-22 10:04:35 -0700, Dylan Baker wrote:
> > > Signed-off-by: Dylan Baker 
> > > Reviewed-by: Eric Anholt 
> > > ---
> > >  meson.build | 8 ++--
> > >  1 file changed, 6 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/meson.build b/meson.build
> > > index 1af610573d5..5102ffe0c7c 100644
> > > --- a/meson.build
> > > +++ b/meson.build
> > > @@ -264,8 +264,12 @@ if with_glx == 'auto'
> > >elif with_platform_haiku
> > >  with_glx = 'disabled'
> > 
> > How about simply adding it here, before the with_gallium check?
> > 
> >   +  elif host_machine.system() == 'windows'
> >   +with_glx = 'disabled'
> > 
> > Otherwise this opens the door to a weird `(gallium + x11 + gl - vk) on
> > windows` bug here.
> 
> I'm trying to understand the bug, if you build with windows dri you'll get
> glx? It seems like then really we should have the first option be "if
> with_dri and with_dri_platform == 'drm'" (or should it be "with_dri and not
> ['windows', 'apple'].contains(with_dri_platform)"?) and instead of simply
> with_dri, or am I missing something?

I just meant that it would be more robust to write it in that order, so
that if that combination ever becomes possible in the build system, this
doesn't cause any weird bugs.

That said, you can just ignore this, it wasn't really worth mentioning.

(and sorry for forgetting to reply)

> 
> Dylan
> 
> > With that:
> > Reviewed-by: Eric Engestrom 
> > 
> > >elif with_gallium
> > > -# Even when building just gallium drivers the user probably wants dri
> > > -with_glx = 'dri'
> > > +if host_machine.system() == 'windows'
> > > +  with_glx = 'disabled'
> > > +else
> > > +  # Even when building just gallium drivers the user probably wants 
> > > dri
> > > +  with_glx = 'dri'
> > > +endif
> > >elif with_platform_x11 and with_any_opengl and not with_any_vk
> > >  # The automatic behavior should not be to turn on xlib based glx when
> > >  # building only vulkan drivers
> > > -- 
> > > 2.18.0
> > > 
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Re: [Mesa-dev] [PATCH 2/4] intel/decoder: Avoid freeing invalid pointer


On 05/09/2018 19:02, Sagar Ghuge wrote:

Hi Lionel,

Thanks for reviewing patches and comments.

On 09/05/2018 10:29 AM, Lionel Landwerlin wrote:

On 05/09/2018 18:19, Sagar Ghuge wrote:

Signed-off-by: Sagar Ghuge 
---
   src/intel/common/gen_decoder.c | 4 
   1 file changed, 4 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index dbd060d53c..c44b8f060d 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -662,8 +662,6 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
     len = fread(buf, 1, XML_BUFFER_SIZE, input);
     if (len == 0) {
    fprintf(stderr, "fread: %m\n");
- free(ctx.spec);
- ctx.spec = NULL;
    goto end;
     }
     if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) {
@@ -672,8 +670,6 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
    XML_GetCurrentLineNumber(ctx.parser),
    XML_GetCurrentColumnNumber(ctx.parser),
    XML_ErrorString(XML_GetErrorCode(ctx.parser)));
- free(ctx.spec);
- ctx.spec = NULL;
    goto end;
     }
  } while (len > 0);

Looks good but we're still missing a ralloc_free(ctx.spec) after the end label.

In patch 4, I am freeing up gen_batch_decode_ctx instance using 
gen_batch_decode_ctx_finish() which is also responsible for destroying spec.



I see. But I assumed that would be only in the case this function succeeded.

If we didn't manage to parse the genxml, is there much of a point trying 
to decode anything?




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Re: [Mesa-dev] [PATCH 2/4] intel/decoder: Avoid freeing invalid pointer

Hi Lionel,

Thanks for reviewing patches and comments. 

On 09/05/2018 10:29 AM, Lionel Landwerlin wrote:
> On 05/09/2018 18:19, Sagar Ghuge wrote:
>> Signed-off-by: Sagar Ghuge 
>> ---
>>   src/intel/common/gen_decoder.c | 4 
>>   1 file changed, 4 deletions(-)
>>
>> diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
>> index dbd060d53c..c44b8f060d 100644
>> --- a/src/intel/common/gen_decoder.c
>> +++ b/src/intel/common/gen_decoder.c
>> @@ -662,8 +662,6 @@ gen_spec_load_from_path(const struct gen_device_info 
>> *devinfo,
>>     len = fread(buf, 1, XML_BUFFER_SIZE, input);
>>     if (len == 0) {
>>    fprintf(stderr, "fread: %m\n");
>> - free(ctx.spec);
>> - ctx.spec = NULL;
>>    goto end;
>>     }
>>     if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) {
>> @@ -672,8 +670,6 @@ gen_spec_load_from_path(const struct gen_device_info 
>> *devinfo,
>>    XML_GetCurrentLineNumber(ctx.parser),
>>    XML_GetCurrentColumnNumber(ctx.parser),
>>    XML_ErrorString(XML_GetErrorCode(ctx.parser)));
>> - free(ctx.spec);
>> - ctx.spec = NULL;
>>    goto end;
>>     }
>>  } while (len > 0);
> 
> Looks good but we're still missing a ralloc_free(ctx.spec) after the end 
> label.

In patch 4, I am freeing up gen_batch_decode_ctx instance using 
gen_batch_decode_ctx_finish() which is also responsible for destroying spec. 
> 
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Re: [Mesa-dev] [PATCH] anv/pipeline: Only consider double elements which actually exist


On 05/09/2018 13:19, Jason Ekstrand wrote:
On September 5, 2018 05:35:40 Lionel Landwerlin 
 wrote:



On 05/09/2018 11:24, Lionel Landwerlin wrote:

On 05/09/2018 00:04, Jason Ekstrand wrote:

The brw_vs_prog_data::double_inputs_read field comes directly from
shader_info::double_inputs which may contain inputs which are not
actually read.  Instead of using it directly, AND it with inputs_read
which is only things which are read.  Otherwise, we may end up
subtracting too many elements when computing elem_count.

Cc: mesa-sta...@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241



Reviewed-by: Lionel Landwerlin 



Actually, I would like to take that back for a minute.

As far as I can tell, the content of inputs_read & double_inputs_read
are copied directly from what gets computed in NIR.
For VS stage, both variable seems to be set a set in lock step in
src/compiler/nir/nir_gather_info.c
So I would expect the following assertion to be true :
(vs_prog_data->double_inputs_read & vs_prog_data->inputs_read) ==
vs_prog_data->double_inputs_read

Isn't the problem here that inputs_read get compacted in
src/compiler/nir/nir_linking_helpers.c and double_inputs_read isn't
updated accordingly.
If that's case, this change might not actually fix the bug.


No, the problem, as stated in the commit message, is that it comes 
from double_inputs, not double_inputs_read.  But shouldn't I just 
change that?  Ok, fair enough, but unfortunately doing so would break 
i965. My 64-bit attribute detangling series will help with that 
problem and I've got another patch it two in the works which will make 
prog_data sensible again.


--Jason



Thanks for confirming on IRC.


Reviewed-by: Lionel Landwerlin 






-
Lionel






---
 src/intel/vulkan/genX_pipeline.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_pipeline.c
b/src/intel/vulkan/genX_pipeline.c
index b531205508c..297e9455b51 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -91,7 +91,8 @@ emit_vertex_input(struct anv_pipeline *pipeline,
  /* Pull inputs_read out of the VS prog data */
    const uint64_t inputs_read = vs_prog_data->inputs_read;
-   const uint64_t double_inputs_read =
vs_prog_data->double_inputs_read;
+   const uint64_t double_inputs_read =
+  vs_prog_data->double_inputs_read & inputs_read;
    assert((inputs_read & ((1 << VERT_ATTRIB_GENERIC0) - 1)) == 0);
    const uint32_t elements = inputs_read >> VERT_ATTRIB_GENERIC0;
    const uint32_t elements_double = double_inputs_read >>
VERT_ATTRIB_GENERIC0;



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Re: [Mesa-dev] [PATCH v4 12/49] meson: don't build glx or dri by default on windows

Quoting Eric Engestrom (2018-08-23 10:13:17)
> On Wednesday, 2018-08-22 10:04:35 -0700, Dylan Baker wrote:
> > Signed-off-by: Dylan Baker 
> > Reviewed-by: Eric Anholt 
> > ---
> >  meson.build | 8 ++--
> >  1 file changed, 6 insertions(+), 2 deletions(-)
> > 
> > diff --git a/meson.build b/meson.build
> > index 1af610573d5..5102ffe0c7c 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -264,8 +264,12 @@ if with_glx == 'auto'
> >elif with_platform_haiku
> >  with_glx = 'disabled'
> 
> How about simply adding it here, before the with_gallium check?
> 
>   +  elif host_machine.system() == 'windows'
>   +with_glx = 'disabled'
> 
> Otherwise this opens the door to a weird `(gallium + x11 + gl - vk) on
> windows` bug here.
> 
> With that:
> Reviewed-by: Eric Engestrom 
> 
> >elif with_gallium
> > -# Even when building just gallium drivers the user probably wants dri
> > -with_glx = 'dri'
> > +if host_machine.system() == 'windows'
> > +  with_glx = 'disabled'
> > +else
> > +  # Even when building just gallium drivers the user probably wants dri
> > +  with_glx = 'dri'
> > +endif
> >elif with_platform_x11 and with_any_opengl and not with_any_vk
> >  # The automatic behavior should not be to turn on xlib based glx when
> >  # building only vulkan drivers
> > -- 
> > 2.18.0
> > 
> > ___
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> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev

ping


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Re: [Mesa-dev] [PATCH] gallium: Correctly handle no config context creation

2018-09-05 Thread Ilia Mirkin

On Wed, Sep 5, 2018 at 1:04 PM, Elie Tournier  wrote:
> This patch fixes the following Piglit test:
> spec@egl_mesa_configless_context@basic
> It also fixes few test in a virgl guest.
>
> Suggested-by: Emil Velikov 
> Signed-off-by: Elie Tournier 
> ---
> I cc'ed some Gallium driver people.
> Can you check if this patch doesn't introduce any bug on your HW?
> Sorry for the spam.
> Cheers.
>  src/gallium/include/state_tracker/st_api.h  | 2 ++
>  src/gallium/state_trackers/dri/dri_screen.c | 4 +++-
>  src/mesa/state_tracker/st_manager.c | 9 -
>  3 files changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/include/state_tracker/st_api.h 
> b/src/gallium/include/state_tracker/st_api.h
> index 61152e3546..2b63b8a3d2 100644
> --- a/src/gallium/include/state_tracker/st_api.h
> +++ b/src/gallium/include/state_tracker/st_api.h
> @@ -190,6 +190,8 @@ struct st_egl_image
>   */
>  struct st_visual
>  {
> +   bool no_config;
> +
> /**
>  * Available buffers.  Bitfield of ST_ATTACHMENT_*_MASK bits.
>  */
> diff --git a/src/gallium/state_trackers/dri/dri_screen.c 
> b/src/gallium/state_trackers/dri/dri_screen.c
> index 027e85024f..308e23685e 100644
> --- a/src/gallium/state_trackers/dri/dri_screen.c
> +++ b/src/gallium/state_trackers/dri/dri_screen.c
> @@ -308,8 +308,10 @@ dri_fill_st_visual(struct st_visual *stvis,
>  {
> memset(stvis, 0, sizeof(*stvis));
>
> -   if (!mode)
> +   if (!mode) {
> +  stvis->no_config = true;
>return;
> +   }
>
> /* Deduce the color format. */
> switch (mode->redMask) {
> diff --git a/src/mesa/state_tracker/st_manager.c 
> b/src/mesa/state_tracker/st_manager.c
> index 69286b5791..c1e647b30e 100644
> --- a/src/mesa/state_tracker/st_manager.c
> +++ b/src/mesa/state_tracker/st_manager.c
> @@ -834,6 +834,7 @@ st_api_create_context(struct st_api *stapi, struct 
> st_manager *smapi,
> struct st_context *shared_ctx = (struct st_context *) shared_stctxi;
> struct st_context *st;
> struct pipe_context *pipe;
> +   struct gl_config* mode_ptr;
> struct gl_config mode;
> gl_api api;
> bool no_error = false;
> @@ -893,7 +894,13 @@ st_api_create_context(struct st_api *stapi, struct 
> st_manager *smapi,
> }
>
> st_visual_to_context_mode(>visual, );
> -   st = st_create_context(api, pipe, , shared_ctx,
> +
> +   if (>visual.no_config)

Did you mean attribs->visual.no_config? Otherwise this will be always-true..

> +  mode_ptr = NULL;
> +   else
> +  mode_ptr = 
> +
> +   st = st_create_context(api, pipe, mode_ptr, shared_ctx,
>>options, no_error);
> if (!st) {
>*error = ST_CONTEXT_ERROR_NO_MEMORY;
> --
> 2.18.0
>
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Re: [Mesa-dev] [PATCH] st/dri: use the FREE wrapper for the dri screen

On 30 August 2018 at 14:52, Brian Paul  wrote:
> On 08/30/2018 07:32 AM, Eric Engestrom wrote:
>>
>> On Thursday, 2018-08-30 11:12:11 +0100, Emil Velikov wrote:
>>>
>>> From: Emil Velikov 
>>>
>>> The memory is allocated with the uppercase wrapper. Tear down should
>>> match that.
>>
>>
>> You're right, in dri2_init_screen() / dri_kms_init_screen(), but looking
>> at the history this used to be FREE() and Brian replaced a bunch of them
>> with free() in fe72a069d1fcce943f315 "mesa: s/FREE/free/".
>>
>> Cc'ing him to check if going back is the right thing, or if maybe instead
>> it's the CALLOC() in dri2.c that should be replaced with calloc()?
>
>
> Unfortunately, there's two different definitions of CALLOC_STRUCT:
>
> src/gallium/auxiliary/util/u_memory.h:58:#define CALLOC_STRUCT(T) (struct T
> *) CALLOC(1, sizeof(struct T))
> src/mesa/main/imports.h:58:#define CALLOC_STRUCT(T)   (struct T *) calloc(1,
> sizeof(struct T))
>
> (by amazing coincidence they're on the same line number!)
>
> The former calls CALLOC() which wraps os_calloc() while the later calls
> calloc().
>
> You just have to be sure to use free/FREE which matches the underlying
> CALLOC().  After only a quick look it's not obvious to me which is correct
> here but I'm sure you can figure it out.
>
Thanks Brian.

Had a quick look - dri2.c includes u_memory.h, while dri_screen.c uses
imports.h, transitively via utils.h (the one in dri/common).
The last header will always pull imports.h one way or another.

Simplest solution is to (re)move CALLOC_STRUCT from imports.h - where,
how, etc will end up more time consuming that what I have atm :-\

Anyone willing to sort that, please go ahead; personally I'd worry
when it becomes an obvious issue.

HTH
Emil
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Re: [Mesa-dev] [Mesa-stable] [PATCH v4] i965: compiler option msse2 and mstackrealign

Quoting Sergii Romantsov (2018-09-05 04:40:37)
> Seems in case of 32-bit library, usage of msse2 makes
> some stack corruption or incorrect instructions.
> Usage with mstackrealign fixes that case.
> 
> v2: Fixed meson.
> 
> v3: Definition of c_sse2_args moved on the top (L.Landwerlin).
> Added mstackrealign for Android's mks where msee4.1 is used.
> 
> v4: Added for Vulkan also.
> 
> CC: 
> Fixes: 6b05c080f202 (i965: Compile with -msse3)
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779
> Signed-off-by: Sergii Romantsov 
> ---
>  src/intel/Makefile.vulkan.am  | 2 +-
>  src/intel/meson.build | 1 +
>  src/intel/vulkan/meson.build  | 4 ++--
>  src/mesa/Android.libmesa_dricore.mk   | 2 +-
>  src/mesa/Android.libmesa_sse41.mk | 2 +-
>  src/mesa/drivers/dri/i965/Makefile.am | 2 +-
>  src/mesa/drivers/dri/i965/meson.build | 6 +++---
>  7 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/src/intel/Makefile.vulkan.am b/src/intel/Makefile.vulkan.am
> index 9555d98..d511263 100644
> --- a/src/intel/Makefile.vulkan.am
> +++ b/src/intel/Makefile.vulkan.am
> @@ -104,7 +104,7 @@ noinst_LTLIBRARIES += $(VULKAN_PER_GEN_LIBS)
>  
>  VULKAN_CFLAGS = \
> $(AM_CFLAGS) \
> -   -msse2
> +   -msse2 -mstackrealign
>  
>  VULKAN_CPPFLAGS = \
> -I$(top_srcdir)/src/compiler \
> diff --git a/src/intel/meson.build b/src/intel/meson.build
> index b3dcbdc..3c57e79 100644
> --- a/src/intel/meson.build
> +++ b/src/intel/meson.build
> @@ -18,6 +18,7 @@
>  # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
> THE
>  # SOFTWARE.
>  
> +c_sse2_args = ['-msse2', '-mstackrealign']
>  inc_intel = include_directories('.')
>  
>  subdir('blorp')
> diff --git a/src/intel/vulkan/meson.build b/src/intel/vulkan/meson.build
> index e11bcb0..f1beb1d 100644
> --- a/src/intel/vulkan/meson.build
> +++ b/src/intel/vulkan/meson.build
> @@ -102,7 +102,7 @@ foreach g : [['70', ['gen7_cmd_buffer.c']], ['75', 
> ['gen7_cmd_buffer.c']],
>inc_vulkan_wsi,
>  ],
>  c_args : [
> -  c_vis_args, no_override_init_args, '-msse2',
> +  c_vis_args, no_override_init_args, c_sse2_args,
>'-DGEN_VERSIONx10=@0@'.format(_gen),
>  ],
>  dependencies : [dep_libdrm, dep_valgrind, idep_nir_headers],
> @@ -146,7 +146,7 @@ anv_deps = [
>  anv_flags = [
>c_vis_args,
>no_override_init_args,
> -  '-msse2',
> +  c_sse2_args,
>  ]
>  
>  if with_platform_x11
> diff --git a/src/mesa/Android.libmesa_dricore.mk 
> b/src/mesa/Android.libmesa_dricore.mk
> index 34fd858..7921177 100644
> --- a/src/mesa/Android.libmesa_dricore.mk
> +++ b/src/mesa/Android.libmesa_dricore.mk
> @@ -49,7 +49,7 @@ ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
>  LOCAL_WHOLE_STATIC_LIBRARIES := \
> libmesa_sse41
>  LOCAL_CFLAGS := \
> -   -msse4.1 \
> +   -msse4.1 -mstackrealign \
> -DUSE_SSE41
>  endif
>  
> diff --git a/src/mesa/Android.libmesa_sse41.mk 
> b/src/mesa/Android.libmesa_sse41.mk
> index da40f43..de19a1f 100644
> --- a/src/mesa/Android.libmesa_sse41.mk
> +++ b/src/mesa/Android.libmesa_sse41.mk
> @@ -34,7 +34,7 @@ LOCAL_SRC_FILES += \
> $(X86_SSE41_FILES)
>  
>  LOCAL_CFLAGS := \
> -   -msse4.1
> +   -msse4.1 -mstackrealign
>  
>  LOCAL_C_INCLUDES := \
> $(MESA_TOP)/src/mapi \
> diff --git a/src/mesa/drivers/dri/i965/Makefile.am 
> b/src/mesa/drivers/dri/i965/Makefile.am
> index 889d4c6..0afa7a2 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.am
> +++ b/src/mesa/drivers/dri/i965/Makefile.am
> @@ -44,7 +44,7 @@ AM_CFLAGS = \
> $(WNO_OVERRIDE_INIT) \
> $(LIBDRM_CFLAGS) \
> $(VALGRIND_CFLAGS) \
> -   -msse2
> +   -msse2 -mstackrealign
>  
>  AM_CXXFLAGS = $(AM_CFLAGS)
>  
> diff --git a/src/mesa/drivers/dri/i965/meson.build 
> b/src/mesa/drivers/dri/i965/meson.build
> index 6c94f4a..b95e2d7 100644
> --- a/src/mesa/drivers/dri/i965/meson.build
> +++ b/src/mesa/drivers/dri/i965/meson.build
> @@ -142,7 +142,7 @@ foreach v : ['40', '45', '50', '60', '70', '75', '80', 
> '90', '100', '110']
>  ['genX_blorp_exec.c', 'genX_state_upload.c', gen_xml_pack],
>  include_directories : [inc_common, inc_intel, inc_dri_common],
>  c_args : [
> -  c_vis_args, no_override_init_args, '-msse2',
> +  c_vis_args, no_override_init_args, c_sse2_args,
>'-DGEN_VERSIONx10=@0@'.format(v),
>  ],
>  dependencies : [dep_libdrm, idep_nir_headers],
> @@ -183,8 +183,8 @@ libi965 = static_library(
>include_directories : [
>  inc_common, inc_intel, inc_dri_common, inc_util, inc_drm_uapi,
>],
> -  c_args : [c_vis_args, no_override_init_args, '-msse2'],
> -  cpp_args : [cpp_vis_args, '-msse2'],
> +  c_args : [c_vis_args, no_override_init_args, c_sse2_args],
> +  cpp_args : [cpp_vis_args, c_sse2_args],
>link_with : [
>  i965_gen_libs, libintel_common, libintel_dev, libisl, libintel_compiler,
>  libblorp,
> -- 
> 2.7.4
> 

Looks good to me, thanks for

Re: [Mesa-dev] [PATCH] meson: Print a message about why a libdrm version was selected

Quoting Emil Velikov (2018-09-05 03:25:06)
> On 4 September 2018 at 22:47, Dylan Baker  wrote:
> > We require a single version of libdrm for all of our libdrm
> > dependencies (core and driver), but the way this is structured can make
> > the error message less than helpful, as one driver might be the one
> > setting the libdrm requirement, while another might be the one that
> > generates the version failure.
> >
> > This adds a simple message to the output announcing which libdrm module
> > set the version, which might be more helpful.
> >
> Recently when libdrm_amdgpu was bumped, I noticed that it's version
> was still imposed, even though I was building only classic i965.
> Both gallium and vulkan drivers were explicitly disabled.
> 
> Can you please look into that, if you haven't already.
> 
> Thanks
> Emil

I can't reproduce this. I set the amdgpu version to 2.4.1000 (to ensure that I
couldn't fulfill it), then ran:
meson build -Dgallium-drivers= -Dvulkan-drivers= -Ddri-drivers=i965

Things worked fine. You didn't happen to have radv enabled did you? That
also pulls in libdrm_amdgpu.

Dylan


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Re: [Mesa-dev] [PATCH 4/4] intel: aubinator: Fix memory leaks


On 05/09/2018 18:19, Sagar Ghuge wrote:

Signed-off-by: Sagar Ghuge 



Reviewed-by: Lionel Landwerlin 



---
  src/intel/tools/aubinator.c | 25 +
  1 file changed, 25 insertions(+)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 55672fa073..ef0f7650b1 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -95,6 +95,18 @@ aubinator_init(void *user_data, int aub_pci_id, const char 
*app_name)
  
 gen_batch_decode_ctx_init(_ctx, , outfile, batch_flags,

   xml_path, NULL, NULL, NULL);
+
+   /* Check for valid spec instance, if wrong xml_path is passed then spec
+* instance is not initialized properly
+*/
+   if (!batch_ctx.spec) {
+  fprintf(stderr, "Failed to initialize gen_batch_decode_ctx "
+  "spec instance\n");
+  free(xml_path);
+  gen_batch_decode_ctx_finish(_ctx);
+  exit(EXIT_FAILURE);
+   }
+
 batch_ctx.max_vbo_decoded_lines = max_vbo_lines;
  
 char *color = GREEN_HEADER, *reset_color = NORMAL;

@@ -178,14 +190,19 @@ aub_file_open(const char *filename)
 int fd;
  
 file = calloc(1, sizeof *file);

+   if (file == NULL)
+  return NULL;
+
 fd = open(filename, O_RDONLY);
 if (fd == -1) {
fprintf(stderr, "open %s failed: %s\n", filename, strerror(errno));
+  free(file);
exit(EXIT_FAILURE);
 }
  
 if (fstat(fd, ) == -1) {

fprintf(stderr, "stat failed: %s\n", strerror(errno));
+  free(file);
exit(EXIT_FAILURE);
 }
  
@@ -193,6 +210,7 @@ aub_file_open(const char *filename)

  PROT_READ, MAP_SHARED, fd, 0);
 if (file->map == MAP_FAILED) {
fprintf(stderr, "mmap failed: %s\n", strerror(errno));
+  free(file);
exit(EXIT_FAILURE);
 }
  
@@ -333,6 +351,11 @@ int main(int argc, char *argv[])

 }
  
 file = aub_file_open(input_file);

+   if (!file) {
+  fprintf(stderr, "Unable to allocate buffer to open aub file\n");
+  free(xml_path);
+  exit(EXIT_FAILURE);
+   }
  
 struct aub_read aub_read = {

.user_data = ,
@@ -359,9 +382,11 @@ int main(int argc, char *argv[])
 fflush(stdout);
 /* close the stdout which is opened to write the output */
 close(1);
+   free(file);
 free(xml_path);
  
 wait(NULL);

+   gen_batch_decode_ctx_finish(_ctx);
  
 return EXIT_SUCCESS;

  }



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Re: [Mesa-dev] [PATCH 3/4] intel/decoder: construct correct xml filename


On 05/09/2018 18:19, Sagar Ghuge wrote:

construct correct gen xml filename when we try to load hardware xml
description from a given path

Signed-off-by: Sagar Ghuge 



Reviewed-by: Lionel Landwerlin 



---
  src/intel/common/gen_decoder.c | 18 --
  1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index c44b8f060d..e2509cbd87 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -463,12 +463,18 @@ character_data(void *data, const XML_Char *s, int len)
  }
  
  static int

-devinfo_to_gen(const struct gen_device_info *devinfo)
+devinfo_to_gen(const struct gen_device_info *devinfo, bool x10)
  {
-   int value = 10 * devinfo->gen;
+   int value = devinfo->gen;
  
-   if (devinfo->is_baytrail || devinfo->is_haswell)

-  value += 5;
+   if (x10)
+  value  = 10 * devinfo->gen;
+
+   if (devinfo->is_baytrail || devinfo->is_haswell) {
+ if (!x10)
+value *= 10;
+ value += 5;
+   }
  
 return value;

  }
@@ -558,7 +564,7 @@ gen_spec_load(const struct gen_device_info *devinfo)
 uint8_t *text_data = NULL;
 uint32_t text_offset = 0, text_length = 0;
 MAYBE_UNUSED uint32_t total_length;
-   uint32_t gen_10 = devinfo_to_gen(devinfo);
+   uint32_t gen_10 = devinfo_to_gen(devinfo, true);
  
 for (int i = 0; i < ARRAY_SIZE(genxml_files_table); i++) {

if (genxml_files_table[i].gen_10 == gen_10) {
@@ -627,7 +633,7 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
 FILE *input;
  
 len = snprintf(filename, filename_len, "%s/gen%i.xml",

-  path, devinfo_to_gen(devinfo));
+  path, devinfo_to_gen(devinfo, false));
 assert(len < filename_len);
  
 input = fopen(filename, "r");



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Re: [Mesa-dev] [PATCH] meson: Print a message about why a libdrm version was selected

Quoting Eric Engestrom (2018-09-05 02:14:47)
> On Tuesday, 2018-09-04 14:47:01 -0700, Dylan Baker wrote:
> > We require a single version of libdrm for all of our libdrm
> > dependencies (core and driver), but the way this is structured can make
> > the error message less than helpful, as one driver might be the one
> > setting the libdrm requirement, while another might be the one that
> > generates the version failure.
> > 
> > This adds a simple message to the output announcing which libdrm module
> > set the version, which might be more helpful.
> > 
> > Fixes: c445b1d56f47922206de55e557444aadb62e11f6
> >("meson: Use the same version for all libdrm checks")
> > ---
> >  meson.build | 5 +
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/meson.build b/meson.build
> > index 7f6f128e0b2..d85f92fd087 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -1121,12 +1121,17 @@ endif
> >  
> >  # Loop over the enables versions and get the highest libdrm requirement 
> > for all
> >  # active drivers.
> > +_drm_blame = ''
> >  foreach d : _libdrm_checks
> >ver = get_variable('_drm_@0@_ver'.format(d[0]))
> >if d[1] and ver.version_compare('>' + _drm_ver)
> >  _drm_ver = ver
> > +_drm_blame = d[0]
> >endif
> >  endforeach
> > +if _drm_blame != ''
> > +  message('libdrm requirment set to @0@ because of @1@'.format(_drm_ver, 
> > _drm_blame))
>   ^ typo
> 
> I would phrase it a bit differently:
>   message('libdrm @0@ needed because @1@ has the highest 
> requirement'.format(_drm_ver, _drm_blame))

I don't really care either way, so I used your message.

> 
> But I fully agree with printing that message, so:
> Reviewed-by: Eric Engestrom 
> 
> > +endif
> >  
> >  # Then get each libdrm module
> >  foreach d : _libdrm_checks
> > -- 
> > 2.18.0
> > 
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev


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Re: [Mesa-dev] [PATCH 2/4] intel/decoder: Avoid freeing invalid pointer


On 05/09/2018 18:19, Sagar Ghuge wrote:

Signed-off-by: Sagar Ghuge 
---
  src/intel/common/gen_decoder.c | 4 
  1 file changed, 4 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index dbd060d53c..c44b8f060d 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -662,8 +662,6 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
len = fread(buf, 1, XML_BUFFER_SIZE, input);
if (len == 0) {
   fprintf(stderr, "fread: %m\n");
- free(ctx.spec);
- ctx.spec = NULL;
   goto end;
}
if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) {
@@ -672,8 +670,6 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
   XML_GetCurrentLineNumber(ctx.parser),
   XML_GetCurrentColumnNumber(ctx.parser),
   XML_ErrorString(XML_GetErrorCode(ctx.parser)));
- free(ctx.spec);
- ctx.spec = NULL;
   goto end;
}
 } while (len > 0);


Looks good but we're still missing a ralloc_free(ctx.spec) after the end 
label.


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Re: [Mesa-dev] [PATCH 1/4] intel/decoder: add gen_spec_init method


On 05/09/2018 18:19, Sagar Ghuge wrote:

Initialize gen_spec instance properly when loading hardware xml
description from specifc directory to avoid segmentation fault.

Signed-off-by: Sagar Ghuge 
---
  src/intel/common/gen_decoder.c | 51 +++---
  1 file changed, 35 insertions(+), 16 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index c6c213fcd1..dbd060d53c 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -526,6 +526,30 @@ static uint32_t _hash_uint32(const void *key)
 return (uint32_t) (uintptr_t) key;
  }
  
+static struct gen_spec *

+gen_spec_init()



I think in C, you would write : gen_spec_init(void)


With that fixed :


Reviewed-by: Lionel Landwerlin 



+{
+   struct gen_spec *spec;
+   spec = rzalloc(NULL, struct gen_spec);
+   if (spec == NULL)
+  return NULL;
+
+   spec->commands =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->structs =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->registers_by_name =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->registers_by_offset =
+  _mesa_hash_table_create(spec, _hash_uint32, _mesa_key_pointer_equal);
+   spec->enums =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->access_cache =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+
+   return spec;
+}
+
  struct gen_spec *
  gen_spec_load(const struct gen_device_info *devinfo)
  {
@@ -560,21 +584,11 @@ gen_spec_load(const struct gen_device_info *devinfo)
 XML_SetElementHandler(ctx.parser, start_element, end_element);
 XML_SetCharacterDataHandler(ctx.parser, character_data);
  
-   ctx.spec = rzalloc(NULL, struct gen_spec);

-
-   ctx.spec->commands =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->structs =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->registers_by_name =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->registers_by_offset =
-  _mesa_hash_table_create(ctx.spec, _hash_uint32, _mesa_key_pointer_equal);
-   ctx.spec->enums =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-
-   ctx.spec->access_cache =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
+   ctx.spec = gen_spec_init();
+   if (ctx.spec == NULL) {
+  fprintf(stderr, "Failed to create gen_spec\n");
+  return NULL;
+   }
  
 total_length = zlib_inflate(compress_genxmls,

 sizeof(compress_genxmls),
@@ -636,7 +650,12 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
 XML_SetElementHandler(ctx.parser, start_element, end_element);
 XML_SetCharacterDataHandler(ctx.parser, character_data);
 ctx.loc.filename = filename;
-   ctx.spec = rzalloc(NULL, struct gen_spec);
+
+   ctx.spec = gen_spec_init();
+   if (ctx.spec == NULL) {
+  fprintf(stderr, "Failed to create gen_spec\n");
+  return NULL;
+   }
  
 do {

buf = XML_GetBuffer(ctx.parser, XML_BUFFER_SIZE);



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Re: [Mesa-dev] [PATCH mesa] meson: vc4 requires libdrm too

Quoting Eric Anholt (2018-09-05 10:05:15)
> Eric Engestrom  writes:
> 
> > According to 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement",
> > vc4 is a special case here as it does not use its libdrm_vc4, but only 
> > depends
> > on core libdrm.
> >
> > The way the version check was added however means that the core libdrm
> > dependency() needs to be explicitly required if vc4 is being built.
> >
> > Fixes: 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement"
> > Cc: Eric Anholt 
> > Signed-off-by: Eric Engestrom 
> > ---
> >  meson.build | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/meson.build b/meson.build
> > index 55416020402620a2565e..474d8692a956b0151b5c 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -1140,7 +1140,7 @@ endforeach
> >  with_gallium_drisw_kms = false
> >  dep_libdrm = dependency(
> >'libdrm', version : '>=' + _drm_ver,
> > -  required : with_dri2 or with_dri3
> > +  required : with_dri2 or with_dri3 or with_gallium_vc4
> 
> vc4 without with_dri2 or with_dri3?  I'm confused.

I guess it is theoretically possible to hit this case, if you were to build vc4
with the gallium xlib base glx and no egl then I guess you could hit this?
Maybe?

Dylan


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[Mesa-dev] [PATCH 2/4] intel/decoder: Avoid freeing invalid pointer

Signed-off-by: Sagar Ghuge 
---
 src/intel/common/gen_decoder.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index dbd060d53c..c44b8f060d 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -662,8 +662,6 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
   len = fread(buf, 1, XML_BUFFER_SIZE, input);
   if (len == 0) {
  fprintf(stderr, "fread: %m\n");
- free(ctx.spec);
- ctx.spec = NULL;
  goto end;
   }
   if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) {
@@ -672,8 +670,6 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
  XML_GetCurrentLineNumber(ctx.parser),
  XML_GetCurrentColumnNumber(ctx.parser),
  XML_ErrorString(XML_GetErrorCode(ctx.parser)));
- free(ctx.spec);
- ctx.spec = NULL;
  goto end;
   }
} while (len > 0);
-- 
2.17.1

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[Mesa-dev] [PATCH 3/4] intel/decoder: construct correct xml filename

construct correct gen xml filename when we try to load hardware xml
description from a given path

Signed-off-by: Sagar Ghuge 
---
 src/intel/common/gen_decoder.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index c44b8f060d..e2509cbd87 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -463,12 +463,18 @@ character_data(void *data, const XML_Char *s, int len)
 }
 
 static int
-devinfo_to_gen(const struct gen_device_info *devinfo)
+devinfo_to_gen(const struct gen_device_info *devinfo, bool x10)
 {
-   int value = 10 * devinfo->gen;
+   int value = devinfo->gen;
 
-   if (devinfo->is_baytrail || devinfo->is_haswell)
-  value += 5;
+   if (x10)
+  value  = 10 * devinfo->gen;
+
+   if (devinfo->is_baytrail || devinfo->is_haswell) {
+ if (!x10)
+value *= 10;
+ value += 5;
+   }
 
return value;
 }
@@ -558,7 +564,7 @@ gen_spec_load(const struct gen_device_info *devinfo)
uint8_t *text_data = NULL;
uint32_t text_offset = 0, text_length = 0;
MAYBE_UNUSED uint32_t total_length;
-   uint32_t gen_10 = devinfo_to_gen(devinfo);
+   uint32_t gen_10 = devinfo_to_gen(devinfo, true);
 
for (int i = 0; i < ARRAY_SIZE(genxml_files_table); i++) {
   if (genxml_files_table[i].gen_10 == gen_10) {
@@ -627,7 +633,7 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
FILE *input;
 
len = snprintf(filename, filename_len, "%s/gen%i.xml",
-  path, devinfo_to_gen(devinfo));
+  path, devinfo_to_gen(devinfo, false));
assert(len < filename_len);
 
input = fopen(filename, "r");
-- 
2.17.1

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[Mesa-dev] [PATCH 4/4] intel: aubinator: Fix memory leaks

Signed-off-by: Sagar Ghuge 
---
 src/intel/tools/aubinator.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 55672fa073..ef0f7650b1 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -95,6 +95,18 @@ aubinator_init(void *user_data, int aub_pci_id, const char 
*app_name)
 
gen_batch_decode_ctx_init(_ctx, , outfile, batch_flags,
  xml_path, NULL, NULL, NULL);
+
+   /* Check for valid spec instance, if wrong xml_path is passed then spec
+* instance is not initialized properly
+*/
+   if (!batch_ctx.spec) {
+  fprintf(stderr, "Failed to initialize gen_batch_decode_ctx "
+  "spec instance\n");
+  free(xml_path);
+  gen_batch_decode_ctx_finish(_ctx);
+  exit(EXIT_FAILURE);
+   }
+
batch_ctx.max_vbo_decoded_lines = max_vbo_lines;
 
char *color = GREEN_HEADER, *reset_color = NORMAL;
@@ -178,14 +190,19 @@ aub_file_open(const char *filename)
int fd;
 
file = calloc(1, sizeof *file);
+   if (file == NULL)
+  return NULL;
+
fd = open(filename, O_RDONLY);
if (fd == -1) {
   fprintf(stderr, "open %s failed: %s\n", filename, strerror(errno));
+  free(file);
   exit(EXIT_FAILURE);
}
 
if (fstat(fd, ) == -1) {
   fprintf(stderr, "stat failed: %s\n", strerror(errno));
+  free(file);
   exit(EXIT_FAILURE);
}
 
@@ -193,6 +210,7 @@ aub_file_open(const char *filename)
 PROT_READ, MAP_SHARED, fd, 0);
if (file->map == MAP_FAILED) {
   fprintf(stderr, "mmap failed: %s\n", strerror(errno));
+  free(file);
   exit(EXIT_FAILURE);
}
 
@@ -333,6 +351,11 @@ int main(int argc, char *argv[])
}
 
file = aub_file_open(input_file);
+   if (!file) {
+  fprintf(stderr, "Unable to allocate buffer to open aub file\n");
+  free(xml_path);
+  exit(EXIT_FAILURE);
+   }
 
struct aub_read aub_read = {
   .user_data = ,
@@ -359,9 +382,11 @@ int main(int argc, char *argv[])
fflush(stdout);
/* close the stdout which is opened to write the output */
close(1);
+   free(file);
free(xml_path);
 
wait(NULL);
+   gen_batch_decode_ctx_finish(_ctx);
 
return EXIT_SUCCESS;
 }
-- 
2.17.1

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[Mesa-dev] [PATCH 0/4] aubinator: construct correct genxml

I was just playing around with aubinator and I found out that it's
constructing incorrect gen xml filename when xml option is specified.
For e.g it's trying to locate Gen90.xml instead of Gen9.xml

This patch series fix memory leaks and construct correct gen xml
filename with/without xml option. 

I am still getting familar with tool so please let me know if I
misunderstood things while fixing the problem. 

Sagar Ghuge (4):
  intel/decoder: add gen_spec_init method
  intel/decoder: Avoid freeing invalid pointer
  intel/decoder: construct correct xml filename
  intel: aubinator: Fix memory leaks

 src/intel/common/gen_decoder.c | 73 ++
 src/intel/tools/aubinator.c| 25 
 2 files changed, 72 insertions(+), 26 deletions(-)

-- 
2.17.1

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[Mesa-dev] [PATCH 1/4] intel/decoder: add gen_spec_init method

Initialize gen_spec instance properly when loading hardware xml
description from specifc directory to avoid segmentation fault.

Signed-off-by: Sagar Ghuge 
---
 src/intel/common/gen_decoder.c | 51 +++---
 1 file changed, 35 insertions(+), 16 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index c6c213fcd1..dbd060d53c 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -526,6 +526,30 @@ static uint32_t _hash_uint32(const void *key)
return (uint32_t) (uintptr_t) key;
 }
 
+static struct gen_spec *
+gen_spec_init()
+{
+   struct gen_spec *spec;
+   spec = rzalloc(NULL, struct gen_spec);
+   if (spec == NULL)
+  return NULL;
+
+   spec->commands =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->structs =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->registers_by_name =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->registers_by_offset =
+  _mesa_hash_table_create(spec, _hash_uint32, _mesa_key_pointer_equal);
+   spec->enums =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+   spec->access_cache =
+  _mesa_hash_table_create(spec, _mesa_hash_string, _mesa_key_string_equal);
+
+   return spec;
+}
+
 struct gen_spec *
 gen_spec_load(const struct gen_device_info *devinfo)
 {
@@ -560,21 +584,11 @@ gen_spec_load(const struct gen_device_info *devinfo)
XML_SetElementHandler(ctx.parser, start_element, end_element);
XML_SetCharacterDataHandler(ctx.parser, character_data);
 
-   ctx.spec = rzalloc(NULL, struct gen_spec);
-
-   ctx.spec->commands =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->structs =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->registers_by_name =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-   ctx.spec->registers_by_offset =
-  _mesa_hash_table_create(ctx.spec, _hash_uint32, _mesa_key_pointer_equal);
-   ctx.spec->enums =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
-
-   ctx.spec->access_cache =
-  _mesa_hash_table_create(ctx.spec, _mesa_hash_string, 
_mesa_key_string_equal);
+   ctx.spec = gen_spec_init();
+   if (ctx.spec == NULL) {
+  fprintf(stderr, "Failed to create gen_spec\n");
+  return NULL;
+   }
 
total_length = zlib_inflate(compress_genxmls,
sizeof(compress_genxmls),
@@ -636,7 +650,12 @@ gen_spec_load_from_path(const struct gen_device_info 
*devinfo,
XML_SetElementHandler(ctx.parser, start_element, end_element);
XML_SetCharacterDataHandler(ctx.parser, character_data);
ctx.loc.filename = filename;
-   ctx.spec = rzalloc(NULL, struct gen_spec);
+
+   ctx.spec = gen_spec_init();
+   if (ctx.spec == NULL) {
+  fprintf(stderr, "Failed to create gen_spec\n");
+  return NULL;
+   }
 
do {
   buf = XML_GetBuffer(ctx.parser, XML_BUFFER_SIZE);
-- 
2.17.1

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Re: [Mesa-dev] [PATCH v2 1/8] egl: add base EGL_EXT_device_base implementation

On Wednesday, 2018-09-05 15:09:19 +0100, Emil Velikov wrote:
> On 4 September 2018 at 20:34, Eric Engestrom  wrote:
> > On Tuesday, 2018-09-04 20:33:33 +0100, Eric Engestrom wrote:
> >> On Tuesday, 2018-09-04 19:32:58 +0100, Emil Velikov wrote:
> >> > From: Emil Velikov 
> >> >
> >> > Introduce the API for device query and enumeration. Those at the moment
> >> > produce nothing useful since zero devices are actually available.
> >> >
> >> > That contradicts with the spec, so the extension isn't advertised just
> >> > yet.
> >> >
> >> > With later commits we'll add support for software (always) and hardware
> >> > devices. Each one exposing the respective extension string.
> >> >
> >> > v2:
> >> >  - fold API boilerplate into this patch
> >> >  - move _eglAddDevice, _eglDeviceSupports, _eglRefreshDeviceList to this
> >> > patch (Eric, Mathias)
> >> >  - make _eglFiniDevice the one called last
> >> >
> >> > Signed-off-by: Emil Velikov 
> >> > ---
> >> >  src/egl/Makefile.sources |   2 +
> >> >  src/egl/main/eglapi.c|  64 +
> >> >  src/egl/main/egldevice.c | 179 +++
> >> >  src/egl/main/egldevice.h |  83 
> >> >  src/egl/main/egldisplay.h|   1 +
> >> >  src/egl/main/eglentrypoint.h |   4 +
> >> >  src/egl/main/eglglobals.c|   8 +-
> >> >  src/egl/main/eglglobals.h|   2 +
> >> >  src/egl/main/egltypedefs.h   |   2 +
> >> >  src/egl/meson.build  |   2 +
> >> >  10 files changed, 344 insertions(+), 3 deletions(-)
> >> >  create mode 100644 src/egl/main/egldevice.c
> >> >  create mode 100644 src/egl/main/egldevice.h
> >> >
> >> > diff --git a/src/egl/Makefile.sources b/src/egl/Makefile.sources
> >> > index 82f13ad3cbd..0cc5f1bbfef 100644
> >> > --- a/src/egl/Makefile.sources
> >> > +++ b/src/egl/Makefile.sources
> >> > @@ -10,6 +10,8 @@ LIBEGL_C_FILES := \
> >> > main/eglcurrent.c \
> >> > main/eglcurrent.h \
> >> > main/egldefines.h \
> >> > +   main/egldevice.c \
> >> > +   main/egldevice.h \
> >> > main/egldisplay.c \
> >> > main/egldisplay.h \
> >> > main/egldriver.c \
> >> > diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
> >> > index c8c6a50f6ad..6df5e841463 100644
> >> > --- a/src/egl/main/eglapi.c
> >> > +++ b/src/egl/main/eglapi.c
> >> > @@ -95,6 +95,7 @@
> >> >  #include "egldisplay.h"
> >> >  #include "egltypedefs.h"
> >> >  #include "eglcurrent.h"
> >> > +#include "egldevice.h"
> >> >  #include "egldriver.h"
> >> >  #include "eglsurface.h"
> >> >  #include "eglconfig.h"
> >> > @@ -2575,6 +2576,69 @@ eglSetBlobCacheFuncsANDROID(EGLDisplay *dpy, 
> >> > EGLSetBlobFuncANDROID set,
> >> > _eglUnlockDisplay(disp);
> >> >  }
> >> >
> >> > +static EGLBoolean EGLAPIENTRY
> >> > +eglQueryDeviceAttribEXT(EGLDeviceEXT device,
> >> > +EGLint attribute,
> >> > +EGLAttrib *value)
> >> > +{
> >> > +   _EGLDevice *dev = _eglLookupDevice(device);
> >> > +   EGLBoolean ret;
> >> > +
> >> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
> >> > +   if (!dev)
> >> > +  RETURN_EGL_ERROR(NULL, EGL_BAD_DEVICE_EXT, EGL_FALSE);
> >> > +
> >> > +   ret = _eglQueryDeviceAttribEXT(dev, attribute, value);
> >> > +   RETURN_EGL_EVAL(NULL, ret);
> >> > +}
> >> > +
> >> > +static const char * EGLAPIENTRY
> >> > +eglQueryDeviceStringEXT(EGLDeviceEXT device,
> >> > +EGLint name)
> >> > +{
> >> > +   _EGLDevice *dev = _eglLookupDevice(device);
> >> > +
> >> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, NULL);
> >> > +   if (!dev)
> >> > +  RETURN_EGL_ERROR(NULL, EGL_BAD_DEVICE_EXT, NULL);
> >> > +
> >> > +   RETURN_EGL_EVAL(NULL, _eglQueryDeviceStringEXT(dev, name));
> >> > +}
> >> > +
> >> > +static EGLBoolean EGLAPIENTRY
> >> > +eglQueryDevicesEXT(EGLint max_devices,
> >> > +   EGLDeviceEXT *devices,
> >> > +   EGLint *num_devices)
> >> > +{
> >> > +   EGLBoolean ret;
> >> > +
> >> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
> >> > +   ret = _eglQueryDevicesEXT(max_devices, (_EGLDevice **) devices,
> >> > + num_devices);
> >> > +   RETURN_EGL_EVAL(NULL, ret);
> >> > +}
> >> > +
> >> > +static EGLBoolean EGLAPIENTRY
> >> > +eglQueryDisplayAttribEXT(EGLDisplay dpy,
> >> > + EGLint attribute,
> >> > + EGLAttrib *value)
> >> > +{
> >> > +   _EGLDisplay *disp = _eglLockDisplay(dpy);
> >> > +   _EGLDriver *drv;
> >> > +
> >> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
> >> > +   _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv);
> >> > +
> >> > +   switch (attribute) {
> >> > +   case EGL_DEVICE_EXT:
> >> > +  *value = (EGLAttrib) disp->Device;
> >> > +  break;
> >> > +   default:
> >> > +  RETURN_EGL_ERROR(disp, EGL_BAD_ATTRIBUTE, EGL_FALSE);
> >> > +   }
> >> > +   RETURN_EGL_SUCCESS(disp, EGL_TRUE);
> >> > +}
> >> > +
> >> >  __eglMustCastToProperFunctionPointerType EGLAPIENTRY
> >> >

Re: [Mesa-dev] [PATCH mesa] meson: vc4 requires libdrm too

2018-09-05 Thread Eric Anholt

Eric Engestrom  writes:

> According to 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement",
> vc4 is a special case here as it does not use its libdrm_vc4, but only depends
> on core libdrm.
>
> The way the version check was added however means that the core libdrm
> dependency() needs to be explicitly required if vc4 is being built.
>
> Fixes: 4fc0ebdff55419965919e "broadcom/vc4: Bump libdrm requirement"
> Cc: Eric Anholt 
> Signed-off-by: Eric Engestrom 
> ---
>  meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/meson.build b/meson.build
> index 55416020402620a2565e..474d8692a956b0151b5c 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -1140,7 +1140,7 @@ endforeach
>  with_gallium_drisw_kms = false
>  dep_libdrm = dependency(
>'libdrm', version : '>=' + _drm_ver,
> -  required : with_dri2 or with_dri3
> +  required : with_dri2 or with_dri3 or with_gallium_vc4

vc4 without with_dri2 or with_dri3?  I'm confused.


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[Mesa-dev] [PATCH] gallium: Correctly handle no config context creation

2018-09-05 Thread Elie Tournier

This patch fixes the following Piglit test:
spec@egl_mesa_configless_context@basic
It also fixes few test in a virgl guest.

Suggested-by: Emil Velikov 
Signed-off-by: Elie Tournier 
---
I cc'ed some Gallium driver people.
Can you check if this patch doesn't introduce any bug on your HW?
Sorry for the spam.
Cheers.
 src/gallium/include/state_tracker/st_api.h  | 2 ++
 src/gallium/state_trackers/dri/dri_screen.c | 4 +++-
 src/mesa/state_tracker/st_manager.c | 9 -
 3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/src/gallium/include/state_tracker/st_api.h 
b/src/gallium/include/state_tracker/st_api.h
index 61152e3546..2b63b8a3d2 100644
--- a/src/gallium/include/state_tracker/st_api.h
+++ b/src/gallium/include/state_tracker/st_api.h
@@ -190,6 +190,8 @@ struct st_egl_image
  */
 struct st_visual
 {
+   bool no_config;
+
/**
 * Available buffers.  Bitfield of ST_ATTACHMENT_*_MASK bits.
 */
diff --git a/src/gallium/state_trackers/dri/dri_screen.c 
b/src/gallium/state_trackers/dri/dri_screen.c
index 027e85024f..308e23685e 100644
--- a/src/gallium/state_trackers/dri/dri_screen.c
+++ b/src/gallium/state_trackers/dri/dri_screen.c
@@ -308,8 +308,10 @@ dri_fill_st_visual(struct st_visual *stvis,
 {
memset(stvis, 0, sizeof(*stvis));
 
-   if (!mode)
+   if (!mode) {
+  stvis->no_config = true;
   return;
+   }
 
/* Deduce the color format. */
switch (mode->redMask) {
diff --git a/src/mesa/state_tracker/st_manager.c 
b/src/mesa/state_tracker/st_manager.c
index 69286b5791..c1e647b30e 100644
--- a/src/mesa/state_tracker/st_manager.c
+++ b/src/mesa/state_tracker/st_manager.c
@@ -834,6 +834,7 @@ st_api_create_context(struct st_api *stapi, struct 
st_manager *smapi,
struct st_context *shared_ctx = (struct st_context *) shared_stctxi;
struct st_context *st;
struct pipe_context *pipe;
+   struct gl_config* mode_ptr;
struct gl_config mode;
gl_api api;
bool no_error = false;
@@ -893,7 +894,13 @@ st_api_create_context(struct st_api *stapi, struct 
st_manager *smapi,
}
 
st_visual_to_context_mode(>visual, );
-   st = st_create_context(api, pipe, , shared_ctx,
+
+   if (>visual.no_config)
+  mode_ptr = NULL;
+   else
+  mode_ptr = 
+
+   st = st_create_context(api, pipe, mode_ptr, shared_ctx,
   >options, no_error);
if (!st) {
   *error = ST_CONTEXT_ERROR_NO_MEMORY;
-- 
2.18.0

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Re: [Mesa-dev] [PATCH] st/dri: implement the __DRI_DRIVER_VTABLE extension

2018-09-05 Thread Eric Anholt

Emil Velikov  writes:

> Hi Eric,
>
> On 24 August 2018 at 14:11, Emil Velikov  wrote:
>> From: Emil Velikov 
>>
>> As the comment above globalDriverAPI (in dri_util.c) says, if the loader
>> is unaware of createNewScreen2 there is a race condition.
>>
>> In which globalDriverAPI, will be set in the driver driDriverGetExtensions*
>> function and used in createNewScreen(). If we call another drivers'
>> driDriverGetExtensions, the createNewScreen will use the latter's API
>> instead of the former.
>>
>> To make it more convoluting, the driver _must_ also expose
>> __DRI_DRIVER_VTABLE, as that one exposes the correct API.
>>
>> The race also occurs, for loaders which use the pre megadrivers
>> driDriverGetExtensions entrypoint.
>>
>> Cc: mesa-sta...@lists.freedesktop.org
>> Signed-off-by: Emil Velikov 
>> ---
>>  src/gallium/state_trackers/dri/dri2.c   | 21 +
>>  src/gallium/state_trackers/dri/dri_screen.h |  1 +
>>  src/gallium/state_trackers/dri/drisw.c  |  6 ++
>>  src/gallium/targets/dri/target.c|  2 +-
>>  4 files changed, 29 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/state_trackers/dri/dri2.c 
>> b/src/gallium/state_trackers/dri/dri2.c
>> index 3cbca4e5dc3..b21e6815796 100644
>> --- a/src/gallium/state_trackers/dri/dri2.c
>> +++ b/src/gallium/state_trackers/dri/dri2.c
>> @@ -2318,11 +2318,32 @@ const struct __DriverAPIRec dri_kms_driver_api = {
>> .ReleaseBuffer  = dri2_release_buffer,
>>  };
>>
>> +static const struct __DRIDriverVtableExtensionRec gallium_drm_vtable = {
>> +   .base = { __DRI_DRIVER_VTABLE, 1 },
>> +   .vtable = _driver_api,
>> +};
>> +
>> +static const struct __DRIDriverVtableExtensionRec dri_kms_vtable = {
>> +   .base = { __DRI_DRIVER_VTABLE, 1 },
>> +   .vtable = _kms_driver_api,
>> +};
>> +
>>  /* This is the table of extensions that the loader will dlsym() for. */
>>  const __DRIextension *galliumdrm_driver_extensions[] = {
>>  ,
>>  ,
>>  ,
>> +_drm_vtable.base,
>> +_config_options.base,
>> +NULL
>> +};
>> +
>> +/* This is the table of extensions that the loader will dlsym() for. */
>> +const __DRIextension *dri_kms_driver_extensions[] = {
>> +,
>> +,
>> +,
>> +_kms_vtable.base,
>>  _config_options.base,
>>  NULL
>>  };
>> diff --git a/src/gallium/state_trackers/dri/dri_screen.h 
>> b/src/gallium/state_trackers/dri/dri_screen.h
>> index 8d2d9c02892..fde3b4088a7 100644
>> --- a/src/gallium/state_trackers/dri/dri_screen.h
>> +++ b/src/gallium/state_trackers/dri/dri_screen.h
>> @@ -147,6 +147,7 @@ void
>>  dri_destroy_screen(__DRIscreen * sPriv);
>>
>>  extern const struct __DriverAPIRec dri_kms_driver_api;
>> +extern const __DRIextension *dri_kms_driver_extensions[];
>>
>>  extern const struct __DriverAPIRec galliumdrm_driver_api;
>>  extern const __DRIextension *galliumdrm_driver_extensions[];
>> diff --git a/src/gallium/state_trackers/dri/drisw.c 
>> b/src/gallium/state_trackers/dri/drisw.c
>> index 1fba71bdd97..76a06b36664 100644
>> --- a/src/gallium/state_trackers/dri/drisw.c
>> +++ b/src/gallium/state_trackers/dri/drisw.c
>> @@ -513,11 +513,17 @@ const struct __DriverAPIRec galliumsw_driver_api = {
>> .CopySubBuffer = drisw_copy_sub_buffer,
>>  };
>>
>> +static const struct __DRIDriverVtableExtensionRec galliumsw_vtable = {
>> +   .base = { __DRI_DRIVER_VTABLE, 1 },
>> +   .vtable = _driver_api,
>> +};
>> +
>>  /* This is the table of extensions that the loader will dlsym() for. */
>>  const __DRIextension *galliumsw_driver_extensions[] = {
>>  ,
>>  ,
>>  ,
>> +_vtable.base,
>>  _config_options.base,
>>  NULL
>>  };
>> diff --git a/src/gallium/targets/dri/target.c 
>> b/src/gallium/targets/dri/target.c
>> index 835d125f21e..e943cae6a16 100644
>> --- a/src/gallium/targets/dri/target.c
>> +++ b/src/gallium/targets/dri/target.c
>> @@ -28,7 +28,7 @@ const __DRIextension 
>> **__driDriverGetExtensions_kms_swrast(void);
>>  PUBLIC const __DRIextension **__driDriverGetExtensions_kms_swrast(void)
>>  {
>> globalDriverAPI = _kms_driver_api;
>> -   return galliumdrm_driver_extensions;
>> +   return dri_kms_driver_extensions;
>>  }
>>
> Can you please skim through the above?
>
> Seems like I forgot to implement this while making the gallium mega-drivers.
> I did not notice any issues in practise, but with EGLDevice this will
> become more likely to hit.

With having a new baby, I'm getting maybe an hour a day for software
stuff.  I won't have time to review this.


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Re: [Mesa-dev] [PATCH v2] i965: clearify map_gtt cases

2018-09-05 Thread Kenneth Graunke

On Tuesday, September 4, 2018 3:30:42 AM PDT Lionel Landwerlin wrote:
> Both brw_bo_map_cpu() & brw_bo_map_wc() assert if mapping the
> underlying BO fails. Failing back to brw_bo_map_gtt() doesn't seem to
> make any sense for that reason.
> 
> We also only call brw_bo_map_gtt() for tiled buffers which as far as
> we know are never mapped coherent (coherent is a parameter reserved
> for buffer objects which are always allocated linear). So explicitly
> assert if we ever run into this case.
> 
> This makes checking the kernel about whether GTT maps are actually
> coherent unnecessary.
> 
> v2: Add some explanation (Chris/Lionel)
> 
> Signed-off-by: Lionel Landwerlin 
> ---
>  src/mesa/drivers/dri/i965/brw_bufmgr.c | 34 --
>  1 file changed, 15 insertions(+), 19 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c 
> b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> index f1675b191c1..95c5439a521 100644
> --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
> +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> @@ -1095,6 +1095,21 @@ brw_bo_map_gtt(struct brw_context *brw, struct brw_bo 
> *bo, unsigned flags)
>  {
> struct brw_bufmgr *bufmgr = bo->bufmgr;
>  
> +   /* It was recently discovered that some platforms cannot do coherent GTT
> +* mappings. The kernel API previously assumed that they were. To deal 
> with
> +* what is effectively a change in ABI, the kernel introduced a
> +* I915_PARAM_MMAP_GTT_COHERENT getparam to let userspace know whether the
> +* underlying platform is capable of coherent GTT mappings.
> +*
> +* Some digging in the i965 codebase revealed that we don't actually do
> +* coherent GTT mappings. Coherent mappings are only used for buffer
> +* objects which are allocated linear and we only call this function for
> +* non linear buffers. The couple of asserts below are a reminder of the
> +* cases where we should use GTT maps.
> +*/
> +   assert(bo->tiling_mode != I915_TILING_NONE);
> +   assert((flags & MAP_COHERENT) == 0);
> +
> /* Get a mapping of the buffer if we haven't before. */
> if (bo->map_gtt == NULL) {
>DBG("bo_map_gtt: mmap %d (%s)\n", bo->gem_handle, bo->name);
> @@ -1186,25 +1201,6 @@ brw_bo_map(struct brw_context *brw, struct brw_bo *bo, 
> unsigned flags)
> else
>map = brw_bo_map_wc(brw, bo, flags);
>  
> -   /* Allow the attempt to fail by falling back to the GTT where necessary.
> -*
> -* Not every buffer can be mmaped directly using the CPU (or WC), for
> -* example buffers that wrap stolen memory or are imported from other
> -* devices. For those, we have little choice but to use a GTT mmapping.
> -* However, if we use a slow GTT mmapping for reads where we expected fast
> -* access, that order of magnitude difference in throughput will be 
> clearly
> -* expressed by angry users.
> -*
> -* We skip MAP_RAW because we want to avoid map_gtt's fence detiling.
> -*/
> -   if (!map && !(flags & MAP_RAW)) {
> -  if (brw) {
> - perf_debug("Fallback GTT mapping for %s with access flags %x\n",
> -bo->name, flags);
> -  }
> -  map = brw_bo_map_gtt(brw, bo, flags);
> -   }
> -
> return map;
>  }
>  
> 

NAK, unless I've missed something this will still break Cherryview
Chromebooks using ancient kernels that don't support WC mappings.

The assert !COHERENT is fine.  The rest is only valid if
bufmgr->has_mmap_wc, sadly :(


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[Mesa-dev] [PATCH 1/6] dri/common: use __DRI_ATTRIB_SWAP* instances when describing db_modes

From: Emil Velikov 

Somewhat recently Thomas Hellstrom added the respective DRI tokens
and updated the drivers. Update the documentation to match reality.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/common/utils.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/common/utils.c 
b/src/mesa/drivers/dri/common/utils.c
index 88835a7add5..9a518153dc8 100644
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -134,11 +134,12 @@ driGetRendererString( char * buffer, const char * 
hardware_name,
  * \param num_depth_stencil_bits  Number of entries in both \c depth_bits and
  *  \c stencil_bits.
  * \param db_modes  Array of buffer swap modes.  If an element has a
- *  value of \c GLX_NONE, then it represents a
- *  single-buffered mode.  Other valid values are
- *  \c GLX_SWAP_EXCHANGE_OML, \c GLX_SWAP_COPY_OML, and
- *  \c GLX_SWAP_UNDEFINED_OML.  See the
- *  GLX_OML_swap_method extension spec for more details.
+ *  value of \c __DRI_ATTRIB_SWAP_NONE, then it
+ *  represents a single-buffered mode.  Other valid
+ *  values are \c __DRI_ATTRIB_SWAP_EXCHANGE,
+ *  \c __DRI_ATTRIB_SWAP_COPY, and \c 
__DRI_ATTRIB_SWAP_UNDEFINED.
+ *  They represent the respective GLX values as in
+ *  the GLX_OML_swap_method extension spec.
  * \param num_db_modes  Number of entries in \c db_modes.
  * \param msaa_samples  Array of msaa sample count. 0 represents a visual
  *  without a multisample buffer.
-- 
2.18.0

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[Mesa-dev] [PATCH 4/6] i965: reference __DRI_ATTRIB_SWAP_COPY token over the GLX one

From: Emil Velikov 

Earlier commit updated the code to use the DRI tokens, yet forgot to
update the comment.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/intel_screen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index e9de184cca6..48a9e2d6f58 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -2149,7 +2149,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
   MESA_FORMAT_R8G8B8A8_SRGB,
};
 
-   /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
+   /* __DRI_ATTRIB_SWAP_COPY is not supported due to page flipping. */
static const GLenum back_buffer_modes[] = {
   __DRI_ATTRIB_SWAP_UNDEFINED, __DRI_ATTRIB_SWAP_NONE
};
-- 
2.18.0

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[Mesa-dev] [PATCH 3/6] i915: reference __DRI_ATTRIB_SWAP_COPY token over the GLX one

From: Emil Velikov 

Earlier commit updated the code to use the DRI tokens, yet forgot to
update the comment.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i915/intel_screen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i915/intel_screen.c 
b/src/mesa/drivers/dri/i915/intel_screen.c
index 50934c10c48..2cf7d9de4fb 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -1053,7 +1053,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
   MESA_FORMAT_B8G8R8X8_UNORM
};
 
-   /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
+   /* __DRI_ATTRIB_SWAP_COPY is not supported due to page flipping. */
static const GLenum back_buffer_modes[] = {
   __DRI_ATTRIB_SWAP_UNDEFINED, __DRI_ATTRIB_SWAP_NONE
};
-- 
2.18.0

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[Mesa-dev] [PATCH 6/6] mesa: reorder and document the tokens in glheader.h

From: Emil Velikov 

Split into different sections, document each one as well as strange
cases like GL_ATI_texture_compression_3dc.

Signed-off-by: Emil Velikov 
---
 src/mesa/main/glheader.h | 39 +++
 1 file changed, 23 insertions(+), 16 deletions(-)

diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h
index b1f19e44008..e95fc9fb4fe 100644
--- a/src/mesa/main/glheader.h
+++ b/src/mesa/main/glheader.h
@@ -49,7 +49,7 @@ typedef unsigned char GLbitfield8;
 typedef unsigned short GLbitfield16;
 typedef GLuint64 GLbitfield64;
 
-typedef int GLclampx;
+/* Common GLES 1.0 and 2.0 tokens */
 
 #ifndef GL_OES_EGL_image_external
 #define GL_TEXTURE_EXTERNAL_OES 0x8D65
@@ -58,6 +58,15 @@ typedef int GLclampx;
 #define GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES 0x8D68
 #endif
 
+#ifndef GL_OES_compressed_ETC1_RGB8_texture
+#define GL_ETC1_RGB8_OES0x8D64
+#endif
+
+
+/* GLES 1.0 only tokens */
+
+typedef int GLclampx;
+
 #ifndef GL_OES_point_size_array
 #define GL_POINT_SIZE_ARRAY_OES 0x8B9C
 #define GL_POINT_SIZE_ARRAY_TYPE_OES0x898A
@@ -71,15 +80,15 @@ typedef int GLclampx;
 #define GL_TEXTURE_CROP_RECT_OES0x8B9D
 #endif
 
-
-#ifndef GL_PROGRAM_BINARY_LENGTH_OES
-#define GL_PROGRAM_BINARY_LENGTH_OES0x8741
+#ifndef GL_TEXTURE_GEN_STR_OES
+#define GL_TEXTURE_GEN_STR_OES  0x8D60
 #endif
 
-/* GLES 2.0 tokens */
 
-#ifndef GL_TEXTURE_GEN_STR_OES
-#define GL_TEXTURE_GEN_STR_OES  0x8D60
+/* GLES 2.0 only tokens */
+
+#ifndef GL_PROGRAM_BINARY_LENGTH_OES
+#define GL_PROGRAM_BINARY_LENGTH_OES0x8741
 #endif
 
 #ifndef GL_OES_texture_compression_astc
@@ -105,15 +114,6 @@ typedef int GLclampx;
 #define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x6_OES   0x93E9
 #endif
 
-#ifndef GL_ATI_texture_compression_3dc
-#define GL_ATI_texture_compression_3dc  1
-#define GL_COMPRESSED_LUMINANCE_ALPHA_3DC_ATI   0x8837
-#endif
-
-#ifndef GL_OES_compressed_ETC1_RGB8_texture
-#define GL_ETC1_RGB8_OES0x8D64
-#endif
-
 #ifndef GL_EXT_shader_framebuffer_fetch
 #define GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT 0x8A52
 #endif
@@ -132,6 +132,13 @@ typedef int GLclampx;
 #define GL_FRAMEBUFFER_FLIP_Y_MESA  0x8BBB
 #endif
 
+/* There is no formal spec for the following extension. */
+#ifndef GL_ATI_texture_compression_3dc
+#define GL_ATI_texture_compression_3dc  1
+#define GL_COMPRESSED_LUMINANCE_ALPHA_3DC_ATI   0x8837
+#endif
+
+
 /**
  * Internal token to represent a GLSL shader program (a collection of
  * one or more shaders that get linked together).  Note that GLSL
-- 
2.18.0

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[Mesa-dev] [PATCH 2/6] dri/common: move the required GLX_* token definitions locally

From: Emil Velikov 

Will allow us to remove even bigger hack elsewhere. But more
importantly, we should not be using _any_ GLX tokens in DRI.

Document the gory details about the current side-effects.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/common/utils.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/src/mesa/drivers/dri/common/utils.c 
b/src/mesa/drivers/dri/common/utils.c
index 9a518153dc8..5a66bcf8e05 100644
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -41,6 +41,20 @@
 #include "utils.h"
 #include "dri_util.h"
 
+/* WARNING: HACK: Local defines to avoid pulling glx.h.
+ *
+ * Any parts of this file that use the following defines are either partial or
+ * entirely broken wrt EGL.
+ *
+ * For example any getConfigAttrib() or indexConfigAttrib() query from EGL for
+ * SLOW or NON_CONFORMANT_CONFIG will not work as expected since the EGL tokens
+ * are different from the GLX ones.
+ */
+#define GLX_NONE0x8000
+#define GLX_SLOW_CONFIG 0x8001
+#define GLX_NON_CONFORMANT_CONFIG   0x800D
+#define GLX_DONT_CARE   0x
+
 /**
  * Create the \c GL_RENDERER string for DRI drivers.
  * 
-- 
2.18.0

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[Mesa-dev] [PATCH 5/6] mesa: remove duplicate declarations from glheader.h

From: Emil Velikov 

Remove all the desktop GL and GLX entries from the list.
Former are pulled by the gl.h and glext.h includes at the top while the
latter are not longer needed.

Signed-off-by: Emil Velikov 
---
 src/mesa/main/glheader.h | 54 
 1 file changed, 54 deletions(-)

diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h
index 1a91d543126..b1f19e44008 100644
--- a/src/mesa/main/glheader.h
+++ b/src/mesa/main/glheader.h
@@ -51,12 +51,6 @@ typedef GLuint64 GLbitfield64;
 
 typedef int GLclampx;
 
-
-#ifndef GL_OES_EGL_image
-typedef void *GLeglImageOES;
-#endif
-
-
 #ifndef GL_OES_EGL_image_external
 #define GL_TEXTURE_EXTERNAL_OES 0x8D65
 #define GL_SAMPLER_EXTERNAL_OES 0x8D66
@@ -64,7 +58,6 @@ typedef void *GLeglImageOES;
 #define GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES 0x8D68
 #endif
 
-
 #ifndef GL_OES_point_size_array
 #define GL_POINT_SIZE_ARRAY_OES 0x8B9C
 #define GL_POINT_SIZE_ARRAY_TYPE_OES0x898A
@@ -84,27 +77,11 @@ typedef void *GLeglImageOES;
 #endif
 
 /* GLES 2.0 tokens */
-#ifndef GL_RGB565
-#define GL_RGB565   0x8D62
-#endif
 
 #ifndef GL_TEXTURE_GEN_STR_OES
 #define GL_TEXTURE_GEN_STR_OES  0x8D60
 #endif
 
-#ifndef GL_OES_compressed_paletted_texture
-#define GL_PALETTE4_RGB8_OES0x8B90
-#define GL_PALETTE4_RGBA8_OES   0x8B91
-#define GL_PALETTE4_R5_G6_B5_OES0x8B92
-#define GL_PALETTE4_RGBA4_OES   0x8B93
-#define GL_PALETTE4_RGB5_A1_OES 0x8B94
-#define GL_PALETTE8_RGB8_OES0x8B95
-#define GL_PALETTE8_RGBA8_OES   0x8B96
-#define GL_PALETTE8_R5_G6_B5_OES0x8B97
-#define GL_PALETTE8_RGBA4_OES   0x8B98
-#define GL_PALETTE8_RGB5_A1_OES 0x8B99
-#endif
-
 #ifndef GL_OES_texture_compression_astc
 #define GL_COMPRESSED_RGBA_ASTC_3x3x3_OES   0x93C0
 #define GL_COMPRESSED_RGBA_ASTC_4x3x3_OES   0x93C1
@@ -128,15 +105,6 @@ typedef void *GLeglImageOES;
 #define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x6_OES   0x93E9
 #endif
 
-#ifndef GL_ES_VERSION_2_0
-#define GL_SHADER_BINARY_FORMATS0x8DF8
-#define GL_NUM_SHADER_BINARY_FORMATS0x8DF9
-#define GL_SHADER_COMPILER  0x8DFA
-#define GL_MAX_VERTEX_UNIFORM_VECTORS   0x8DFB
-#define GL_MAX_VARYING_VECTORS  0x8DFC
-#define GL_MAX_FRAGMENT_UNIFORM_VECTORS 0x8DFD
-#endif
-
 #ifndef GL_ATI_texture_compression_3dc
 #define GL_ATI_texture_compression_3dc  1
 #define GL_COMPRESSED_LUMINANCE_ALPHA_3DC_ATI   0x8837
@@ -174,28 +142,6 @@ typedef void *GLeglImageOES;
 #define GL_SHADER_PROGRAM_MESA  0x
 
 
-/* Several fields of struct gl_config can take these as values.  Since
- * GLX header files may not be available everywhere they need to be used,
- * redefine them here.
- */
-#define GLX_NONE0x8000
-#define GLX_SLOW_CONFIG 0x8001
-#define GLX_TRUE_COLOR  0x8002
-#define GLX_DIRECT_COLOR0x8003
-#define GLX_PSEUDO_COLOR0x8004
-#define GLX_STATIC_COLOR0x8005
-#define GLX_GRAY_SCALE  0x8006
-#define GLX_STATIC_GRAY 0x8007
-#define GLX_TRANSPARENT_RGB 0x8008
-#define GLX_TRANSPARENT_INDEX   0x8009
-#define GLX_NON_CONFORMANT_CONFIG   0x800D
-#define GLX_SWAP_EXCHANGE_OML   0x8061
-#define GLX_SWAP_COPY_OML   0x8062
-#define GLX_SWAP_UNDEFINED_OML  0x8063
-
-#define GLX_DONT_CARE   0x
-
-
 #ifdef __cplusplus
 }
 #endif
-- 
2.18.0

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[Mesa-dev] [PATCH] mesa: fold _glapi_check_multithread() back into _mesa_make_current

From: Emil Velikov 

With commit c6c0f947142, back in 2006 Brian removed the
_glapi_check_multithread() call from core mesa - _mesa_make_current.

It was done to remove fairly awkward #ifdef guard which caused subtle
differences in core mesa.

Since that guard is long gone, we can drop the duplication and
reintroduce the call in core.

Note that the function is was missing when using EGL + classic dri HW
drivers. Yet on TLS builds it's a no-op, so we're safe.

Any non TLS users - more or less anything !Linux (or even musl on Linux
up-to semi-recently) may have experienced problems.

v2: don't remove the call from swrast - move it to core (Eric)

Cc: Eric Anholt 
Cc: Brian Paul 
Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/swrast/swrast.c | 2 --
 src/mesa/drivers/osmesa/osmesa.c | 6 --
 src/mesa/drivers/x11/xm_api.c| 5 -
 src/mesa/main/context.c  | 5 -
 src/mesa/state_tracker/st_manager.c  | 2 --
 5 files changed, 4 insertions(+), 16 deletions(-)

diff --git a/src/mesa/drivers/dri/swrast/swrast.c 
b/src/mesa/drivers/dri/swrast/swrast.c
index 524f9b17c6d..94758e60862 100644
--- a/src/mesa/drivers/dri/swrast/swrast.c
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -885,8 +885,6 @@ dri_make_current(__DRIcontext * cPriv,
 return GL_TRUE;
 }
 
-   _glapi_check_multithread();
-
swrast_check_and_update_window_size(mesaCtx, mesaDraw);
if (mesaRead != mesaDraw)
swrast_check_and_update_window_size(mesaCtx, mesaRead);
diff --git a/src/mesa/drivers/osmesa/osmesa.c b/src/mesa/drivers/osmesa/osmesa.c
index be683d4583e..44374a2e917 100644
--- a/src/mesa/drivers/osmesa/osmesa.c
+++ b/src/mesa/drivers/osmesa/osmesa.c
@@ -1019,12 +1019,6 @@ OSMesaMakeCurrent( OSMesaContext osmesa, void *buffer, 
GLenum type,
 
osmesa_update_state( >mesa, 0 );
 
-   /* Call this periodically to detect when the user has begun using
-* GL rendering from multiple threads.
-*/
-   _glapi_check_multithread();
-
-
/* Create a front/left color buffer which wraps the user-provided buffer.
 * There is no back color buffer.
 * If the user tries to use a 8, 16 or 32-bit/channel buffer that
diff --git a/src/mesa/drivers/x11/xm_api.c b/src/mesa/drivers/x11/xm_api.c
index 3d54193580e..2b5e5be3cba 100644
--- a/src/mesa/drivers/x11/xm_api.c
+++ b/src/mesa/drivers/x11/xm_api.c
@@ -1221,11 +1221,6 @@ GLboolean XMesaMakeCurrent2( XMesaContext c, XMesaBuffer 
drawBuffer,
 
   c->xm_buffer = drawBuffer;
 
-  /* Call this periodically to detect when the user has begun using
-   * GL rendering from multiple threads.
-   */
-  _glapi_check_multithread();
-
   xmesa_check_and_update_buffer_size(c, drawBuffer);
   if (readBuffer != drawBuffer)
  xmesa_check_and_update_buffer_size(c, readBuffer);
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index d82015dc936..492f01de957 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -1698,7 +1698,10 @@ _mesa_make_current( struct gl_context *newCtx,
   _mesa_flush(curCtx);
}
 
-   /* We used to call _glapi_check_multithread() here.  Now do it in drivers */
+   /* Call this periodically to detect when the user has begun using
+* GL rendering from multiple threads.
+*/
+   _glapi_check_multithread();
 
if (!newCtx) {
   _glapi_set_dispatch(NULL);  /* none current */
diff --git a/src/mesa/state_tracker/st_manager.c 
b/src/mesa/state_tracker/st_manager.c
index 69286b57916..e7412212d48 100644
--- a/src/mesa/state_tracker/st_manager.c
+++ b/src/mesa/state_tracker/st_manager.c
@@ -1022,8 +1022,6 @@ st_api_make_current(struct st_api *stapi, struct 
st_context_iface *stctxi,
struct st_framebuffer *stdraw, *stread;
boolean ret;
 
-   _glapi_check_multithread();
-
if (st) {
   /* reuse or create the draw fb */
   stdraw = st_framebuffer_reuse_or_create(st,
-- 
2.18.0

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[Mesa-dev] [PATCH] virgl: Add command and flags to initiate debugging on the host

2018-09-05 Thread Gert Wollny

From: Gert Wollny 

On the host VREND_DEBUG=guestallow must be set to let the guest override
the debug flags.

Signed-off-by: Gert Wollny 
---
The corresponding code for virglrenderer can be found in this MR: 
https://gitlab.freedesktop.org/virgl/virglrenderer/merge_requests/39

 src/gallium/drivers/virgl/virgl_context.c  | 17 +
 src/gallium/drivers/virgl/virgl_encode.c   |  8 
 src/gallium/drivers/virgl/virgl_encode.h   |  3 +++
 src/gallium/drivers/virgl/virgl_protocol.h |  1 +
 src/gallium/drivers/virgl/virgl_screen.h   | 15 +++
 5 files changed, 44 insertions(+)

diff --git a/src/gallium/drivers/virgl/virgl_context.c 
b/src/gallium/drivers/virgl/virgl_context.c
index 4511bf3b2f..087055b602 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -1157,6 +1157,20 @@ static void virgl_get_sample_position(struct 
pipe_context *ctx,
index, sample_count, out_value[0], out_value[1]);
 }
 
+static const struct debug_named_value host_debug_options[] = {
+   { "tgsi", debug_shader_tgsi , "Print TGSI on host"},
+   { "glsl", debug_shader_glsl, "Print GLSL shaders created from TGSI"},
+   { "glsl", debug_shader_streamout, "Print GLSL shaders created from TGSI"},
+   { "shader", debug_shader, "Print TGSI and created GLSL shaders"},
+   { "cmd", debug_cmd, "Print incoming commands"},
+   { "obj", debug_object, "Print object creation"},
+   { "blit", debug_blit, "Debug blit code path"},
+   { "copyres", debug_copy_resource, "Debug copy resource code path"},
+   { "all", debug_all, "Enable all debugging output"},
+   DEBUG_NAMED_VALUE_END
+};
+DEBUG_GET_ONCE_FLAGS_OPTION(virgl_host_debug, "VIRGL_HOST_DEBUG", 
host_debug_options, 0)
+
 struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
   void *priv,
   unsigned flags)
@@ -1268,6 +1282,9 @@ struct pipe_context *virgl_context_create(struct 
pipe_screen *pscreen,
virgl_encoder_create_sub_ctx(vctx, vctx->hw_sub_ctx_id);
 
virgl_encoder_set_sub_ctx(vctx, vctx->hw_sub_ctx_id);
+
+   virgl_encode_host_debug_flags(vctx, 
(unsigned)debug_get_option_virgl_host_debug());
+
return >base;
 fail:
return NULL;
diff --git a/src/gallium/drivers/virgl/virgl_encode.c 
b/src/gallium/drivers/virgl/virgl_encode.c
index 29920b22be..ff21eb4bda 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -1044,3 +1044,11 @@ int virgl_encode_texture_barrier(struct virgl_context 
*ctx,
virgl_encoder_write_dword(ctx->cbuf, flags);
return 0;
 }
+
+int virgl_encode_host_debug_flags(struct virgl_context *ctx,
+  unsigned flags)
+{
+   virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_DEBUG_FLAGS, 
0, 1));
+   virgl_encoder_write_dword(ctx->cbuf, flags);
+   return 0;
+}
diff --git a/src/gallium/drivers/virgl/virgl_encode.h 
b/src/gallium/drivers/virgl/virgl_encode.h
index 40e62d453b..330c59f366 100644
--- a/src/gallium/drivers/virgl/virgl_encode.h
+++ b/src/gallium/drivers/virgl/virgl_encode.h
@@ -276,4 +276,7 @@ int virgl_encode_launch_grid(struct virgl_context *ctx,
  const struct pipe_grid_info *grid_info);
 int virgl_encode_texture_barrier(struct virgl_context *ctx,
  unsigned flags);
+
+int virgl_encode_host_debug_flags(struct virgl_context *ctx,
+  unsigned flags);
 #endif
diff --git a/src/gallium/drivers/virgl/virgl_protocol.h 
b/src/gallium/drivers/virgl/virgl_protocol.h
index 8d99c5ed47..3373121bf7 100644
--- a/src/gallium/drivers/virgl/virgl_protocol.h
+++ b/src/gallium/drivers/virgl/virgl_protocol.h
@@ -92,6 +92,7 @@ enum virgl_context_cmd {
VIRGL_CCMD_SET_FRAMEBUFFER_STATE_NO_ATTACH,
VIRGL_CCMD_TEXTURE_BARRIER,
VIRGL_CCMD_SET_ATOMIC_BUFFERS,
+   VIRGL_CCMD_SET_DEBUG_FLAGS,
 };
 
 /*
diff --git a/src/gallium/drivers/virgl/virgl_screen.h 
b/src/gallium/drivers/virgl/virgl_screen.h
index 719f5166d7..939c782c83 100644
--- a/src/gallium/drivers/virgl/virgl_screen.h
+++ b/src/gallium/drivers/virgl/virgl_screen.h
@@ -29,6 +29,21 @@
 
 #define VIRGL_DEBUG_VERBOSE 1
 #define VIRGL_DEBUG_TGSI2
+
+enum virgl_debug_flags {
+   debug_shader_tgsi = 1 << 0,
+   debug_shader_glsl = 1 << 1,
+   debug_shader_streamout = 1 << 2,
+   debug_shader = debug_shader_tgsi | debug_shader_glsl | 
debug_shader_streamout,
+   debug_cmd = 1 << 3,
+   debug_object = 1 << 4,
+   debug_blit = 1 << 5,
+   debug_copy_resource = 1 << 6,
+   /* debug_features = 1 << 7, can't be triggered from the guest, because
+* the code is run there before the guest can send commands */
+   debug_all = (1 << 8) - 1,
+};
+
 extern int virgl_debug;
 
 struct virgl_screen {
-- 
2.16.4

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Re: [Mesa-dev] [PATCH 0/7] egl, i965: Implement EGL_KHR_mutable_render_buffer

Hi gents,

On 31 July 2018 at 11:23, Tapani Pälli  wrote:
> Hi;
>
> Maybe something went wrong since patches 4,6 are missing from this series?
>
> Functionally at least propagating mutableRenderBuffer boolean from driver to
> driCreateConfigs is missing.
>
> // Tapani
>
> On 07/31/2018 08:00 AM, Chad Versace wrote:
>>
>> Despite the KHR, Android is the only OS that uses this extension, as far
>> as I know. Essentially, it allows the app to toggle
>> front-buffer/back-buffer rendering using EGL.
>>
>> Android requires this extension if the device advertises support for
>> virtual reality. No Chrome OS device yet supports Android's VR software
>> requirements, though, and VR is not why I implemented this.
>>
>> This extension enables handwriting and drawing apps on Chrome and
>> Android devices to achieve very low latency between touch input
>> and display response.
>>
>> Please don't bash me for this oddly-specified Android extension.
>> I didn't create it. I'm just writing the code that Android requires.
>>
>> * Patch 3 defines a pair of new DRI extensions,
>> DRI_MutableRenderBuffer{Driver,Loader}.
>> * Patches 1-5 add the generic code for the DRI and EGL extensions.
>> * Patch 6 implements DRI_MutableRenderBufferLoader for Android EGL.
>> * Patch 7 implements DRI_MutableRenderBufferDriver for i965.
>>
>> This series is tagged at:
>>
>> http://git.kiwitree.net/cgit/~chadv/mesa/log/?h=refs/tags/chadv/review/i965-mutable-render-buffer-v01
>>
>> Chad Versace (7):
>>egl: Simplify queries for EGL_RENDER_BUFFER
>>egl/dri2: In dri2_make_current, return early on failure
>>dri: Define DRI_MutableRenderBuffer extensions

I was skimming recently and noticed that while a new mask is
introduced __DRI_IMAGE_BUFFER_SHARED there is no corresponding entry
in struct __DRIimageList.

The comment says "... shared buffer is similar to a front buffer ..."
as well as "If buffer_mask contains __DRI_IMAGE_BUFFER_SHARED, then
must contains no other bits".
Yet we use the __DRIimageList::back. Wouldn't a
__DRIimageList::buffer_shared be more obvious solution?

Thanks
Emil
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[Mesa-dev] [PATCH] gallium: Set the default GL_SUBPIXEL_BITS to 4.

2018-09-05 Thread Eric Anholt

This is the minimum value for GLES2, and 0 certainly wouldn't be valid.
Fixes dEQP-GLES2.functional.state_query.integers.subpixel_bits_getfloat
and friends.
---
 src/gallium/auxiliary/util/u_screen.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_screen.c 
b/src/gallium/auxiliary/util/u_screen.c
index d19d604e0c51..3ac2f15a5356 100644
--- a/src/gallium/auxiliary/util/u_screen.c
+++ b/src/gallium/auxiliary/util/u_screen.c
@@ -246,7 +246,11 @@ u_pipe_screen_get_param_defaults(struct pipe_screen 
*pscreen,
case PIPE_CAP_TGSI_VOTE:
case PIPE_CAP_MAX_WINDOW_RECTANGLES: /* Enables EXT_window_rectangles */
case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
+  return 0;
+
case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+  return 4; /* GLES 2.0 minimum maximum value. */
+
case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
-- 
2.18.0

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Re: [Mesa-dev] [PATCH 3/4] i965: move brw_nir_lower_gl_images call

This should be fine.  It was, effectively, happening in the back-end so
moving it later is fine.

Reviewed-by: Jason Ekstrand 

On Wed, Sep 5, 2018 at 9:11 AM Alejandro Piñeiro 
wrote:

> At this moment that lowering is using info coming from the
> UniformStorage, so for the ARB_gl_spirv codepath, it needs to be done
> after calling gl_nir_link_uniforms. As for the GLSL codepath it can
> also be called later, we just move the call on both cases, to avoid
> adding several shader->spirv_data checks, and keep the patch as small
> as possible.
>
> This is the first patch needed to fix the following piglit tests:
>
> tests/spec/arb_gl_spirv/linker/uniform/multisampler.shader_test
> tests/spec/arb_gl_spirv/linker/uniform/multisampler-array.shader_test
>
> but fixes thousands of tests when borrowing the tests from other specs
> (that needs to be done manually right now).
> ---
>  src/mesa/drivers/dri/i965/brw_link.cpp  | 10 ++
>  src/mesa/drivers/dri/i965/brw_program.c |  1 -
>  2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp
> b/src/mesa/drivers/dri/i965/brw_link.cpp
> index 0723255dec6..2cbb1e0b879 100644
> --- a/src/mesa/drivers/dri/i965/brw_link.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_link.cpp
> @@ -270,6 +270,16 @@ brw_link_shader(struct gl_context *ctx, struct
> gl_shader_program *shProg)
>gl_nir_link_assign_xfb_resources(ctx, shProg);
> }
>
> +   for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
> +  struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
> +  if (!shader)
> + continue;
> +
> +  struct gl_program *prog = shader->Program;
> +
> +  NIR_PASS_V(prog->nir, brw_nir_lower_gl_images, prog);
> +   }
> +
> /* Determine first and last stage. */
> unsigned first = MESA_SHADER_STAGES;
> unsigned last = 0;
> diff --git a/src/mesa/drivers/dri/i965/brw_program.c
> b/src/mesa/drivers/dri/i965/brw_program.c
> index ba418e45b85..f5ebd3c3b05 100644
> --- a/src/mesa/drivers/dri/i965/brw_program.c
> +++ b/src/mesa/drivers/dri/i965/brw_program.c
> @@ -140,7 +140,6 @@ brw_create_nir(struct brw_context *brw,
> }
>
> NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar);
> -   NIR_PASS_V(nir, brw_nir_lower_gl_images, prog);
>
> return nir;
>  }
> --
> 2.14.1
>
>
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Re: [Mesa-dev] [PATCH 4/4] i965/fs: include multisamplers on image_intrinsic_coord_components

On Wed, Sep 5, 2018 at 9:11 AM Alejandro Piñeiro 
wrote:

> This is the second patch needed to fix the following piglit tests:
>
>tests/spec/arb_gl_spirv/linker/uniform/multisampler.shader_test
>tests/spec/arb_gl_spirv/linker/uniform/multisampler-array.shader_test
>
> Although in this case it doesn't affect so many borrowed tests, as
> there aren't too many tests using multisamplers on Intel.
>
> It is worth to note that this patch is also needed when those tests
> are run on GLSL mode (using the --glsl option). Although most Intel
> drivers would not be able to run/execute tests using multisamplers, as
> GL_MAX_IMAGE_SAMPLES is zero, technically those tests are expected to
> link correctly, so linking tests should pass.
>

That's a bit aggrivating... Oh, well.


> ---
>  src/intel/compiler/brw_fs_nir.cpp | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 2fef050f81a..eef3453672c 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -3815,6 +3815,8 @@ image_intrinsic_coord_components(nir_intrinsic_instr
> *instr)
>return 3;
> case GLSL_SAMPLER_DIM_BUF:
>return 1;
> +   case GLSL_SAMPLER_DIM_MS:
> +  return 2;
>

This should be 2 + nir_intrinsic_image_array(instr) because multisampled
images can also be arrays.  With that fixed,

Reviewed-by: Jason Ekstrand 
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Re: [Mesa-dev] [PATCH 0/9] dri2: Swapbuffer update v3.

On 05/09/18 23:36, Thomas Hellstrom wrote:

On 09/05/2018 02:36 PM, Timothy Arceri wrote:

On 05/09/18 22:09, Thomas Hellstrom wrote:

On 09/05/2018 01:45 PM, Timothy Arceri wrote:

On 16/08/17 04:31, Thomas Hellstrom wrote:

Implement back-to-fake-front flips,
Fix EGL_BUFFER_PRESERVED path.
Implement dri3 support for GLX_SWAP_EXCHANGE_OML and
GLX_SWAP_COPY_OML.

The back-to-fake-front flips will save a full buffer copy in the
case of a

fake front being enabled and GLX_SWAP_UNDEFINED_OML.

Support for EGL_BUFFER_PRESERVED and GLX_SWAP_X_OML are mostly
useful for
things like glretrace if traces are capured with applications
relying on a

specific swapbuffer behavior.

The EGL_BUFFER_PRESERVED path previously made sure the present was
done as

GLX_SWAP_COPY_OML will behave like EGL_BUFFER_PRESERVED.

GLX_SWAP_EXCHANGE_OML will behave similarly, except that we try to
reuse the
previous fake front as the new back buffer if it's idle. If not, we
grab
a new back buffer and copy the contents and buffer age from the old
fake front.

Testing done:
piglit tests/quick without regressions on svga.
A modified piglit glx-swap-exchange posted for review on the piglit
list.
That test required modifying the dri2 state tracke to advertise
unconditional

support for GLX_SWAP_EXCHANGE_OML

What exactly do I need to do to force this to be advertised? A
bigger question is what more is required to expose
GLX_SWAP_EXCHANGE_OML more generally?

It seems this is required for a few games running on wine [1].

[1]
https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugs.freedesktop.org%2Fshow_bug.cgi%3Fid%3D97516data=02%7C01%7Cthellstrom%40vmware.com%7Cc71a9d949e56467614c108d6132c3212%7Cb39138ca3cee4b4aa4d6cd83d9dd62f0%7C1%7C0%7C636717488813233512sdata=%2FmIsVYyD7Uvg2DwynXKJS3Am%2FEKiyBVz1d%2BSwjIq2Jw%3Dreserved=0

You need to get the X server AIGLX to advertize it, because the
available features are the intersection of the X server AIGLX
features and the dri driver features, even if this is purely
implemented in the dri client. The reason GLX works this way is that
after you've choosen your config you can either choose to select a
direct or indirect context. That was a poor design.

Now the problem is that AIGLX isn't able to support it, because it
uses the dri driver dri2 path rather than the dri3 path, and I never
got to modifying AIGLX to use the dri3 path. Didn't think it was
worth the extra work.

Hmm ... thanks for the info. I should at least add some of this to the
bug report.

In any case, you can hack-enable GLX_SWAP_EXCHANGE_OML if the client
is using dri3 by adding __DRI_ATTRIB_SWAP_EXCHANGE to
back_buffer_modes[] in src/gallium/state_trackers/dri/dri_screen.c,
recompile and make sure the X server also picks up the recompiled
driver. That is if you have a gallium driver. This worked fine with
vmwgfx at the time I pushed the patch as tested by the corresponding
piglit test.

I did try this already with radeonsi but it didn't seem to work. I
even restarted my PC to make sure the correct driver was selected.

How did you test? I'll give it a test on vmwgfx + piglit.
/Thomas

I just tried running the glx-swap-exchange piglit test. I was still getting:

Couldn't get a GLX_SWAP_EXCHANGE_OML, RGBA, double-buffered fbconfig
PIGLIT: {"result": "skip" }

For the other dri drivers there should be a similar way to set the
back_buffer_modes[].

Thanks,
Thomas

A piglit glx-swap-copy test derived from the glx-swap-exchange test.
Not posted yet.

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Re: [Mesa-dev] [PATCH 2/4] intel/compiler: rename brw_nir_lower_glsl_images


First two are R-b me

On September 5, 2018 09:11:18 Alejandro Piñeiro  wrote:


To brw_nir_lower_gl_images, as it will be also used on the
ARB_gl_spirv codepath, that doesn't involves GLSL at all. So the
lowering is about images following the OpenGL semantics. In any case
"brw_nir_lower_opengl_images" seemed too long to me, so I just used
gl. That shortening is already used on other parts of the code.
---
src/intel/compiler/brw_nir.h   | 4 ++--
src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_program.c| 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 50073265539..06f0e8690e4 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -149,8 +149,8 @@ void brw_nir_setup_arb_uniforms(void *mem_ctx, 
nir_shader *shader,

struct gl_program *prog,
struct brw_stage_prog_data *stage_prog_data);

-void brw_nir_lower_glsl_images(nir_shader *shader,
-   const struct gl_program *prog);
+void brw_nir_lower_gl_images(nir_shader *shader,
+ const struct gl_program *prog);

void brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler,
nir_shader *nir,
diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp 
b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp

index 34cabdc2977..35416a74b9c 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -299,8 +299,8 @@ get_aoa_deref_offset(nir_builder *b,
}

void
-brw_nir_lower_glsl_images(nir_shader *shader,
-  const struct gl_program *prog)
+brw_nir_lower_gl_images(nir_shader *shader,
+const struct gl_program *prog)
{
   /* We put image uniforms at the end */
   nir_foreach_variable(var, >uniforms) {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
b/src/mesa/drivers/dri/i965/brw_program.c

index 041395ec4c0..ba418e45b85 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -140,7 +140,7 @@ brw_create_nir(struct brw_context *brw,
   }

   NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar);
-   NIR_PASS_V(nir, brw_nir_lower_glsl_images, prog);
+   NIR_PASS_V(nir, brw_nir_lower_gl_images, prog);

   return nir;
}
--
2.14.1




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[Mesa-dev] [PATCH 4/4] i965/fs: include multisamplers on image_intrinsic_coord_components

This is the second patch needed to fix the following piglit tests:

   tests/spec/arb_gl_spirv/linker/uniform/multisampler.shader_test
   tests/spec/arb_gl_spirv/linker/uniform/multisampler-array.shader_test

Although in this case it doesn't affect so many borrowed tests, as
there aren't too many tests using multisamplers on Intel.

It is worth to note that this patch is also needed when those tests
are run on GLSL mode (using the --glsl option). Although most Intel
drivers would not be able to run/execute tests using multisamplers, as
GL_MAX_IMAGE_SAMPLES is zero, technically those tests are expected to
link correctly, so linking tests should pass.
---
 src/intel/compiler/brw_fs_nir.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intel/compiler/brw_fs_nir.cpp 
b/src/intel/compiler/brw_fs_nir.cpp
index 2fef050f81a..eef3453672c 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -3815,6 +3815,8 @@ image_intrinsic_coord_components(nir_intrinsic_instr 
*instr)
   return 3;
case GLSL_SAMPLER_DIM_BUF:
   return 1;
+   case GLSL_SAMPLER_DIM_MS:
+  return 2;
default:
   unreachable("Invalid image dimension");
}
-- 
2.14.1

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[Mesa-dev] [PATCH 1/4] intel/compiler: remove unused variable num_images

---
 src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp 
b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 0b028afdce7..34cabdc2977 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -343,8 +343,6 @@ brw_nir_lower_glsl_images(nir_shader *shader,
  case nir_intrinsic_image_deref_store_raw_intel: {
 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
 nir_variable *var = nir_deref_instr_get_variable(deref);
-const unsigned num_images =
-   MAX2(1, var->type->arrays_of_arrays_size());
 
 struct gl_uniform_storage *storage =
>sh.data->UniformStorage[var->data.location];
-- 
2.14.1

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[Mesa-dev] [PATCH 3/4] i965: move brw_nir_lower_gl_images call

At this moment that lowering is using info coming from the
UniformStorage, so for the ARB_gl_spirv codepath, it needs to be done
after calling gl_nir_link_uniforms. As for the GLSL codepath it can
also be called later, we just move the call on both cases, to avoid
adding several shader->spirv_data checks, and keep the patch as small
as possible.

This is the first patch needed to fix the following piglit tests:

tests/spec/arb_gl_spirv/linker/uniform/multisampler.shader_test
tests/spec/arb_gl_spirv/linker/uniform/multisampler-array.shader_test

but fixes thousands of tests when borrowing the tests from other specs
(that needs to be done manually right now).
---
 src/mesa/drivers/dri/i965/brw_link.cpp  | 10 ++
 src/mesa/drivers/dri/i965/brw_program.c |  1 -
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp 
b/src/mesa/drivers/dri/i965/brw_link.cpp
index 0723255dec6..2cbb1e0b879 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -270,6 +270,16 @@ brw_link_shader(struct gl_context *ctx, struct 
gl_shader_program *shProg)
   gl_nir_link_assign_xfb_resources(ctx, shProg);
}
 
+   for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
+  struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
+  if (!shader)
+ continue;
+
+  struct gl_program *prog = shader->Program;
+
+  NIR_PASS_V(prog->nir, brw_nir_lower_gl_images, prog);
+   }
+
/* Determine first and last stage. */
unsigned first = MESA_SHADER_STAGES;
unsigned last = 0;
diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
b/src/mesa/drivers/dri/i965/brw_program.c
index ba418e45b85..f5ebd3c3b05 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -140,7 +140,6 @@ brw_create_nir(struct brw_context *brw,
}
 
NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar);
-   NIR_PASS_V(nir, brw_nir_lower_gl_images, prog);
 
return nir;
 }
-- 
2.14.1

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[Mesa-dev] [PATCH 2/4] intel/compiler: rename brw_nir_lower_glsl_images

To brw_nir_lower_gl_images, as it will be also used on the
ARB_gl_spirv codepath, that doesn't involves GLSL at all. So the
lowering is about images following the OpenGL semantics. In any case
"brw_nir_lower_opengl_images" seemed too long to me, so I just used
gl. That shortening is already used on other parts of the code.
---
 src/intel/compiler/brw_nir.h   | 4 ++--
 src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_program.c| 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 50073265539..06f0e8690e4 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -149,8 +149,8 @@ void brw_nir_setup_arb_uniforms(void *mem_ctx, nir_shader 
*shader,
 struct gl_program *prog,
 struct brw_stage_prog_data *stage_prog_data);
 
-void brw_nir_lower_glsl_images(nir_shader *shader,
-   const struct gl_program *prog);
+void brw_nir_lower_gl_images(nir_shader *shader,
+ const struct gl_program *prog);
 
 void brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler,
 nir_shader *nir,
diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp 
b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 34cabdc2977..35416a74b9c 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -299,8 +299,8 @@ get_aoa_deref_offset(nir_builder *b,
 }
 
 void
-brw_nir_lower_glsl_images(nir_shader *shader,
-  const struct gl_program *prog)
+brw_nir_lower_gl_images(nir_shader *shader,
+const struct gl_program *prog)
 {
/* We put image uniforms at the end */
nir_foreach_variable(var, >uniforms) {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
b/src/mesa/drivers/dri/i965/brw_program.c
index 041395ec4c0..ba418e45b85 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -140,7 +140,7 @@ brw_create_nir(struct brw_context *brw,
}
 
NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar);
-   NIR_PASS_V(nir, brw_nir_lower_glsl_images, prog);
+   NIR_PASS_V(nir, brw_nir_lower_gl_images, prog);
 
return nir;
 }
-- 
2.14.1

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Re: [Mesa-dev] [PATCH v2 1/8] egl: add base EGL_EXT_device_base implementation

On 4 September 2018 at 20:34, Eric Engestrom  wrote:
> On Tuesday, 2018-09-04 20:33:33 +0100, Eric Engestrom wrote:
>> On Tuesday, 2018-09-04 19:32:58 +0100, Emil Velikov wrote:
>> > From: Emil Velikov 
>> >
>> > Introduce the API for device query and enumeration. Those at the moment
>> > produce nothing useful since zero devices are actually available.
>> >
>> > That contradicts with the spec, so the extension isn't advertised just
>> > yet.
>> >
>> > With later commits we'll add support for software (always) and hardware
>> > devices. Each one exposing the respective extension string.
>> >
>> > v2:
>> >  - fold API boilerplate into this patch
>> >  - move _eglAddDevice, _eglDeviceSupports, _eglRefreshDeviceList to this
>> > patch (Eric, Mathias)
>> >  - make _eglFiniDevice the one called last
>> >
>> > Signed-off-by: Emil Velikov 
>> > ---
>> >  src/egl/Makefile.sources |   2 +
>> >  src/egl/main/eglapi.c|  64 +
>> >  src/egl/main/egldevice.c | 179 +++
>> >  src/egl/main/egldevice.h |  83 
>> >  src/egl/main/egldisplay.h|   1 +
>> >  src/egl/main/eglentrypoint.h |   4 +
>> >  src/egl/main/eglglobals.c|   8 +-
>> >  src/egl/main/eglglobals.h|   2 +
>> >  src/egl/main/egltypedefs.h   |   2 +
>> >  src/egl/meson.build  |   2 +
>> >  10 files changed, 344 insertions(+), 3 deletions(-)
>> >  create mode 100644 src/egl/main/egldevice.c
>> >  create mode 100644 src/egl/main/egldevice.h
>> >
>> > diff --git a/src/egl/Makefile.sources b/src/egl/Makefile.sources
>> > index 82f13ad3cbd..0cc5f1bbfef 100644
>> > --- a/src/egl/Makefile.sources
>> > +++ b/src/egl/Makefile.sources
>> > @@ -10,6 +10,8 @@ LIBEGL_C_FILES := \
>> > main/eglcurrent.c \
>> > main/eglcurrent.h \
>> > main/egldefines.h \
>> > +   main/egldevice.c \
>> > +   main/egldevice.h \
>> > main/egldisplay.c \
>> > main/egldisplay.h \
>> > main/egldriver.c \
>> > diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
>> > index c8c6a50f6ad..6df5e841463 100644
>> > --- a/src/egl/main/eglapi.c
>> > +++ b/src/egl/main/eglapi.c
>> > @@ -95,6 +95,7 @@
>> >  #include "egldisplay.h"
>> >  #include "egltypedefs.h"
>> >  #include "eglcurrent.h"
>> > +#include "egldevice.h"
>> >  #include "egldriver.h"
>> >  #include "eglsurface.h"
>> >  #include "eglconfig.h"
>> > @@ -2575,6 +2576,69 @@ eglSetBlobCacheFuncsANDROID(EGLDisplay *dpy, 
>> > EGLSetBlobFuncANDROID set,
>> > _eglUnlockDisplay(disp);
>> >  }
>> >
>> > +static EGLBoolean EGLAPIENTRY
>> > +eglQueryDeviceAttribEXT(EGLDeviceEXT device,
>> > +EGLint attribute,
>> > +EGLAttrib *value)
>> > +{
>> > +   _EGLDevice *dev = _eglLookupDevice(device);
>> > +   EGLBoolean ret;
>> > +
>> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
>> > +   if (!dev)
>> > +  RETURN_EGL_ERROR(NULL, EGL_BAD_DEVICE_EXT, EGL_FALSE);
>> > +
>> > +   ret = _eglQueryDeviceAttribEXT(dev, attribute, value);
>> > +   RETURN_EGL_EVAL(NULL, ret);
>> > +}
>> > +
>> > +static const char * EGLAPIENTRY
>> > +eglQueryDeviceStringEXT(EGLDeviceEXT device,
>> > +EGLint name)
>> > +{
>> > +   _EGLDevice *dev = _eglLookupDevice(device);
>> > +
>> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, NULL);
>> > +   if (!dev)
>> > +  RETURN_EGL_ERROR(NULL, EGL_BAD_DEVICE_EXT, NULL);
>> > +
>> > +   RETURN_EGL_EVAL(NULL, _eglQueryDeviceStringEXT(dev, name));
>> > +}
>> > +
>> > +static EGLBoolean EGLAPIENTRY
>> > +eglQueryDevicesEXT(EGLint max_devices,
>> > +   EGLDeviceEXT *devices,
>> > +   EGLint *num_devices)
>> > +{
>> > +   EGLBoolean ret;
>> > +
>> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
>> > +   ret = _eglQueryDevicesEXT(max_devices, (_EGLDevice **) devices,
>> > + num_devices);
>> > +   RETURN_EGL_EVAL(NULL, ret);
>> > +}
>> > +
>> > +static EGLBoolean EGLAPIENTRY
>> > +eglQueryDisplayAttribEXT(EGLDisplay dpy,
>> > + EGLint attribute,
>> > + EGLAttrib *value)
>> > +{
>> > +   _EGLDisplay *disp = _eglLockDisplay(dpy);
>> > +   _EGLDriver *drv;
>> > +
>> > +   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
>> > +   _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv);
>> > +
>> > +   switch (attribute) {
>> > +   case EGL_DEVICE_EXT:
>> > +  *value = (EGLAttrib) disp->Device;
>> > +  break;
>> > +   default:
>> > +  RETURN_EGL_ERROR(disp, EGL_BAD_ATTRIBUTE, EGL_FALSE);
>> > +   }
>> > +   RETURN_EGL_SUCCESS(disp, EGL_TRUE);
>> > +}
>> > +
>> >  __eglMustCastToProperFunctionPointerType EGLAPIENTRY
>> >  eglGetProcAddress(const char *procname)
>> >  {
>> > diff --git a/src/egl/main/egldevice.c b/src/egl/main/egldevice.c
>> > new file mode 100644
>> > index 000..bbc9f2060d1
>> > --- /dev/null
>> > +++ b/src/egl/main/egldevice.c
>> > @@ -0,0 +1,179 @@
>> >

[Mesa-dev] [Bug 107839] [GLSL] WebGL Conformance fragcolor-fragdata-invariant test fails

https://bugs.freedesktop.org/show_bug.cgi?id=107839

Danylo  changed:

   What|Removed |Added

 CC||danylo.pilia...@gmail.com

--- Comment #2 from Danylo  ---
Indeed, it seems it is not a Mesa's bug since in dev console in Firefox there
is next error:

 *** Error compiling FRAGMENT_SHADER '[object WebGLShader]':ERROR: 0:6:
'gl_FragData' : cannot use both gl_FragData and gl_FragColor
ERROR: 0:10: 'gl_FragColor' : cannot use both gl_FragData and gl_FragColor

Which isn't a Mesa's error.

The WebGL test in question should have failed with current Mesa - see
https://bugs.freedesktop.org/show_bug.cgi?id=107842
However it passes on Chrome and it looks like Chrome completely ignores
invariant qualifiers...

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[Mesa-dev] [PATCH] glsl: Make invariant outputs in ES fragment shader not to cause error

2018-09-05 Thread Danylo Piliaiev

In all GLSL ES versions output variables in fragment shader are allowed
to be invariant.

 From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 1.00 spec:
 "Only the following variables may be declared as invariant:
   ...
   - Built-in special variables output from the fragment shader."

 From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 3.00 spec:
 "Only variables output from a shader can be candidates for invariance."

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107842

Signed-off-by: Danylo Piliaiev 
---
 src/compiler/glsl/ast_to_hir.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp
index 5d3f10b682..21cf04ba99 100644
--- a/src/compiler/glsl/ast_to_hir.cpp
+++ b/src/compiler/glsl/ast_to_hir.cpp
@@ -2713,7 +2713,7 @@ is_allowed_invariant(ir_variable *var, struct 
_mesa_glsl_parse_state *state)
 * "Only variables output from a vertex shader can be candidates
 * for invariance".
 */
-   if (!state->is_version(130, 0))
+   if (!state->is_version(130, 100))
   return false;
 
/*
-- 
2.18.0

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[Mesa-dev] [Bug 107839] [GLSL] WebGL Conformance fragcolor-fragdata-invariant test fails