The field was equivalent to (etc_format != MESA_FORMAT_NONE), and
therefore duplicate information.
This patch removes field and replaces all references to it with
`etc_format != MESA_FORMAT_NONE`.
No Piglit ETC test regresses on Intel Sandybridge.
Signed-off-by: Chad Versace chad.vers
On 02/28/2013 11:01 AM, Kenneth Graunke wrote:
On 02/28/2013 09:08 AM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
On 02/27/2013 11:39 AM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
On 02/26/2013 11:15 PM, Eric Anholt wrote:
I have some
changes.
No regressions against mesa-master-809fdc211, piglit-99055b7, Ivybridge
0x0126.
Chad Versace (12):
intel: Fix an instance of mixed tabs and spaces
intel: Add field intel_mipmap_slice::has_hiz
intel: Add accessor functions for intel_miptree_slice::has_hiz
i965: Add level,layer
Fix a line to use only spaces. All adjacent lines were using spaces. This
fixes weird indentation.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers
in the miptree.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 ++
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 12
2 files changed, 14 insertions(+)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src
Add two new functions:
intel_miptree_slice_has_hiz
intel_renderbuffer_has_hiz
These functions are not yet used.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 7 +++
src/mesa/drivers/dri/intel/intel_fbo.h | 3
These will later be used to determine if hiz is enabled for the given
slice via intel_miptree_slice_has_hiz().
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_blorp.h | 10 ++
2 files changed
Add two new parameters, 'level' and 'layer'. A later patch will pass the
new parameters to intel_miptree_slice_has_hiz().
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.h| 2 ++
src/mesa/drivers/dri/i965/brw_misc_state.c | 19
s/brw_state_upload/brw_upload_state/
Found because the link was broken.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers
Extract from intel_miptree_create() the logic for selecting
intel_mipmap_tree::format and ::etc_format into a new function,
intel_miptree_select_formats(). No behavioral change.
Now, intel_miptree_create() is short enough to be understandable.
Signed-off-by: Chad Versace chad.vers
the layout,
intel_miptree_create() overrides the tiling and alignment as needed.
Rather than override something after it has been set, it's safer to just
set it correctly in the first place. To do that, this patch pushes down
the workaround into brw_miptree_layout().
Signed-off-by: Chad Versace chad.vers
.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 633e598..aea42e8 100644
I had to use a debugger to deduce what total_width/height really were.
This patch is for the benefit of those who come after so they don't have
to dig as hard.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 7 ++-
1 file changed
On 03/01/2013 11:00 AM, Ian Romanick wrote:
On 02/28/2013 03:45 PM, Chad Versace wrote:
Miptree creation has a workaround for separate stencil buffers. After the
layout is created, we override the tiling to I915_NONE and align it 64x64,
the size of a W-tile.
Before this patch
On 04/09/2013 04:03 PM, Eric Anholt wrote:
Kenneth Graunke kenn...@whitecape.org writes:
From: Chad Versace chad.vers...@linux.intel.com
On Haswell, HiZ will selectively be enabled on individual miptree slices
to workaround a hardware bug. The two new functions below will permit us
to detect
On 04/09/2013 04:15 PM, Eric Anholt wrote:
Kenneth Graunke kenn...@whitecape.org writes:
From: Chad Versace chad.vers...@linux.intel.com
Enable hiz by setting intel_context::has_hiz. However, to work around
a hardware bug, we selectively enable hiz for only nicely aligned miptree
slices
On 04/10/2013 10:51 AM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
v2:
- Rerun Piglit on ivb and hsw.
- Replace
[PATCH 2/8] intel: Add functions for checking if objs have hiz enabled
with
[PATCH 2/7] intel: Add field
: Eric Anholt e...@anholt.net
[chadv: Wrote commit message]
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
---
src/egl/drivers/dri2/platform_x11.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/egl/drivers/dri2/platform_x11.c
b/src/egl/drivers/dri2/platform_x11.c
On 04/10/2013 11:55 AM, Kenneth Graunke wrote:
We need know this in order to decide what tiling mode to use.
Cc: Eric Anholt e...@anholt.net
Cc: Paul Berry stereotype...@gmail.com
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
For the series,
Reviewed-by: Chad Versace chad.vers
On 04/10/2013 02:08 PM, Kenneth Graunke wrote:
This reduces the nesting level slightly, and in my opinion, makes it a
bit easier to follow.
Cc: Paul Berry stereotype...@gmail.com
Cc: Chad Versace chad.vers...@linux.intel.com
Cc: Eric Anholt e...@anholt.net
Signed-off-by: Kenneth Graunke kenn
by default on Gen6+. This was due to a
botched merge conflict resolution.
v2: Return a mask of valid tilings from intel_miptree_select_tiling.
This allows us to avoid the X-tiling fallback if Y-tiling is actually
mandatory.
Cc: Paul Berry stereotype...@gmail.com
Cc: Chad Versace chad.vers
On 04/12/2013 11:24 AM, Matt Turner wrote:
On Thu, Apr 11, 2013 at 4:29 PM, Matt Turner matts...@gmail.com wrote:
For the sake of consistency.
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-and-Tested-by: Andreas Boll andreas.boll@gmail.com
---
Chad Jose,
Could you test the
).
This patch implements supports MESA_VERSION_STRING_EXTRA only for Android.
Other build systems are left as an excercise.
CC: Matt Turner matts...@gmail.com
CC: Tapani Pälli tapani.pa...@intel.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/Android.libmesa_dricore.mk | 4
On 04/23/2013 06:19 AM, Ian Romanick wrote:
On 04/23/2013 03:28 AM, Chad Versace wrote:
This allows maintainers/packagers/testers to tag the build with
information that will be reported by GL_VERSION.
If the environemt variable or make variable MESA_VERSION_STRING_EXTRA
huax...@intel.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/egl/drivers/dri2/egl_dri2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 06a21d7..1011f27 100644
--- a/src/egl
On 04/23/2013 09:19 PM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
On 04/23/2013 06:19 AM, Ian Romanick wrote:
On 04/23/2013 03:28 AM, Chad Versace wrote:
This allows maintainers/packagers/testers to tag the build with
information that will be reported by GL_VERSION
Patch is pushed. It sat on the list for 24 hours, and
without it all the glesconform suites segfault.
On 04/23/2013 09:47 AM, Chad Versace wrote:
The commit below exposed a bug in dri2_add_config.
commit 3998f8c6b5da1a223926249755e54d8f701f81ab
Author: Ralf Jung p...@ralfj.de
Wayland pixmaps were removed by commit wayland-e20a0f1 before the release
of wayland-1.0. Support was dropped from mesa-9.0.1 by commit
mesa-009d452.
This patch removes a vestigial remnant of Wayland pixmaps: a declaration
in eglplatform.h.
Signed-off-by: Chad Versace chad.vers
.
Cc: Tapani Pälli tapani.pa...@intel.com
Cc: Ian Romanick i...@freedesktop.org
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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);
- return false;
- }
-
uint32_t depth_clear_value;
switch (mt-format) {
case MESA_FORMAT_Z32_FLOAT_X24S8:
Would be worth regression testing on Gen6.
Really glad to see this working.
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Chad Versace chad.vers
been regression tested.
This series lives on my mocs branch.
Chad Versace (2):
i965/gen7: Add defines for Memory Object Control State
i965/hsw: Set MOCS for surfaces
src/mesa/drivers/dri/i965/brw_context.c | 31 +++
src/mesa/drivers/dri/i965/brw_context.h
CC: Stéphane Marchesin marc...@chromium.org
CC: Kenneth Graunke kenn...@whitecape.org
CC: Eric Anholt e...@anholt.net
CC: Matt Turner matts...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_defines.h | 20
1 file changed
On 05/04/2013 03:20 PM, Matt Turner wrote:
On Sat, May 4, 2013 at 12:14 AM, Matt Turner matts...@gmail.com wrote:
On Fri, May 3, 2013 at 10:42 PM, Chad Versace
chad.vers...@linux.intel.com wrote:
+32% on GLBenchmark 2.5 Egypt Offscreen DXT1. Tested on Harris Beach GT3 with
Android.
Please
: This is a candidate for the stable branches.
CC: Tapani Pälli tapani.pa...@intel.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/egl/drivers/dri2/platform_android.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/egl/drivers/dri2/platform_android.c
b
On 05/07/2013 05:56 AM, Divick Kishore wrote:
Hi,
I have compiled mesa with the following options:
.././configure --prefix=~/lib/mesa/swrast/ --build=x86_64-linux-gnu
--with-gallium-drivers= --with-driver=xlib --enable-egl --enable-gles1
--enable-gles2 --with-egl-platforms=x11 CFLAGS=-Wall
On 05/07/2013 01:19 AM, Chia-I Wu wrote:
On Tue, May 7, 2013 at 3:49 PM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Mon, May 06, 2013 at 02:23:52PM -0700, Chad Versace wrote:
Emit EGL_BAD_CONTEXT if the user passes a context to
eglCreateImageKHR(type=EGL_ANDROID_image_native_buffer
On 05/06/2013 09:02 PM, Eric Anholt wrote:
The constant packets for gen6 are too small for gen7, and while IVB seems
happy with them HSW blows up. Just restore the HSW path to what it was
before the gen6 change, by making gen7-specific functions to set up these
stages.
---
The alternative here
Haswell has been broken on master for a surprisingly long time, since commit
1dfea559c3 (Thu May 2 11:27:37 2013 -0700). Reverting that commit fixed it
for me.
If it doesn't get properly fixed by the 7th day, I'd like to see the guilty
patch reverted. A full week is too long for a platform under
On 05/07/2013 04:08 PM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
Haswell has been broken on master for a surprisingly long time, since commit
1dfea559c3 (Thu May 2 11:27:37 2013 -0700). Reverting that commit fixed it
for me.
If it doesn't get properly fixed
for the stable branches.
---
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 103 ++-
1 file changed, 101 insertions(+), 2 deletions(-)
Tested on Haswell.
Reviewed-and-tested-by: Chad Versace chad.vers...@linux.intel.com
and OpenGL ES 2.0.25.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/main/extensions.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index 8b67fca..8eb45ff 100644
--- a/src/mesa/main/extensions.c
+++ b
On 05/08/2013 09:57 AM, Eric Anholt wrote:
Dave Airlie airl...@gmail.com writes:
Haswell has been broken on master for a surprisingly long time, since
commit
1dfea559c3 (Thu May 2 11:27:37 2013 -0700). Reverting that commit fixed
it
for me.
If it doesn't get properly fixed by the 7th day,
On 05/08/2013 10:05 AM, Kenneth Graunke wrote:
On 05/08/2013 09:48 AM, Chad Versace wrote:
Mesa's extension table incorrectly lists this GL_OES_texture_npot as
ES2-only. It's also an ES1 extension. This patch adds ES1 to the
extensions API mask.
From the GL_OES_texture_npot spec:
OpenGL
Tested-by: Matt Turner matts...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_defines.h | 20
1 file changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965
% +/- 0.821163%, n = 5, 95% confidence
Tested-by: Matt Turner matts...@gmail.com
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
This branch lives on my 'mocs' branch.
src/mesa/drivers/dri/i965/brw_context.c | 31 +++
src/mesa/drivers/dri/i965
On 05/07/2013 10:55 PM, Kenneth Graunke wrote:
On 04/17/2013 05:30 PM, Kenneth Graunke wrote:
We can't include shaderobj.h from the standalone utilities, so we
unfortunately have to copy this function.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/standalone_scaffolding.h
On 05/10/2013 10:16 AM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
The drivers was setting MOCS (Memory Object Control State) to 0 for all
objects. This patch sets it as following:
renderbuffer, depthbuffer = LLC uncacheable, L3 cacheable
texture, stencil
tests to skip.
Enables 76 GLES tests on my system.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
tests/util/piglit-framework-gl/piglit_fbo_framework.c| 2 +-
tests/util/piglit-framework-gl/piglit_wfl_framework.c| 10 +-
tests/util
This was intended for the Piglit list.
Please ignore, (or better yet, go review it on the proper list).
On 05/15/2013 01:27 PM, Chad Versace wrote:
Change default waffle platform from GLX to XEGL for GLES tests.
The default platform was GLX for all GL tests (GL and GLES). But not all
GLX
On 05/02/2013 12:08 AM, Topi Pohjolainen wrote:
No functional change in preparation for supporting multiple planes
per image each having its own region.
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 6 +--
On 05/23/2013 09:33 AM, Paul Berry wrote:
On 22 May 2013 12:18, Ian Romanick i...@freedesktop.org wrote:
On 05/21/2013 04:52 PM, Paul Berry wrote:
This patch ifdefs out intel_mipmap_tree::mcs_mt when building the i915
(pre-Gen4) driver (MCS buffers aren't supported until Gen7, so there
is no
When touching the src/egl/drivers/dri2 directory, use a commit subject
that looks like egl/dri2: STUFF, not egl: dri2: STUFF.
On 05/02/2013 12:08 AM, Topi Pohjolainen wrote:
v2:
- upon success close the given file descriptors
v3:
- use specific entry for dma buffers instead of the
On 05/02/2013 12:08 AM, Topi Pohjolainen wrote:
As specified in:
http://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_image_dma_buf_import.txt
Checking for the valid fourcc values is left for drivers avoiding
dependency to drm header files here.
v2:
- enforce EGL_NO_CONTEXT
v3:
On 05/02/2013 12:08 AM, Topi Pohjolainen wrote:
v2 (as advised by Eric):
- use ARRAY_SIZE
- re-use 'image_destroy' for cleaning up after failure
- check directly the region pointer instead of the buffer object
when determining if a region exists
Signed-off-by: Topi Pohjolainen
On 05/21/2013 11:17 PM, Pohjolainen, Topi wrote:
On Tue, May 21, 2013 at 10:11:17PM -0700, Chad Versace wrote:
On 05/02/2013 12:08 AM, Topi Pohjolainen wrote:
No functional change in preparation for supporting multiple planes
per image each having its own region.
Signed-off-by: Topi
On 05/23/2013 10:15 PM, Pohjolainen, Topi wrote:
On Thu, May 23, 2013 at 09:39:30PM -0700, Chad Versace wrote:
When touching the src/egl/drivers/dri2 directory, use a commit subject
that looks like egl/dri2: STUFF, not egl: dri2: STUFF.
[snip]
+/**
+ * The spec says
ian.d.roman...@intel.com (v1)
Reviewed-by: Kenneth Graunke kenn...@whitecape.org (v1)
---
This patch is
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 05/24/2013 01:56 PM, Eric Anholt wrote:
If the hw is pre-gen5 and can't blit depth, it'll cleanly error out.
Did you mean pre-gen6? If I read the code correctly, it is this snippet in
intelEmitCopyBlit
that is responsible for cleanly erroring out.
if (dst_tiling != I915_TILING_NONE) {
On 05/24/2013 01:56 PM, Eric Anholt wrote:
I had previously asserted that it was hard to write a useful, simpler
blit function, but I think this might be it.
This has the side effect of extending the 32k pitch check to a few more
places that were missing it.
---
On 05/28/2013 01:54 PM, Eric Anholt wrote:
Marek Olšák mar...@gmail.com writes:
CopyTexSubImage can be called on a multisample renderbuffer if the
renderbuffer is part of the window-system framebuffer (i.e. comes from
the visual).
IIRC, the game Cogs uses it if both MSAA and Post Filters are
For patches 1 2 3 5 6: Reviewed-by.
For patches 4 and 7, with the comments fixed: Reviewed-by.
Patch 8, I don't agree with it.
Patch 9, I gave an r-b for v2.
Patch 10-17: I have to walk away now. I plan to finish review this evening.
On 05/24/2013 01:56 PM, Eric Anholt wrote:
For a
+-
src/mesa/drivers/dri/intel/intel_tex_subimage.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 05/30/2013 12:16 PM, Eric Anholt wrote:
Fixes assertion failure in piglit copyteximage.
---
src/mesa/drivers/common/meta.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
failure in mesa-demos/src/egl/opengles1/tri_x11 on Haswell
and Ivybridge:
brw_draw_upload.c:287: get_surface_type: Assertion `0' failed.
No Piglit regressions on Haswell.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42182
Issue: AXIA-2954
Signed-off-by: Chad Versace chad.vers
On 05/30/2013 01:20 AM, Daniel Vetter wrote:
On Thu, May 30, 2013 at 9:49 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Tue, May 28, 2013 at 01:33:18PM -0700, Eric Anholt wrote:
Topi Pohjolainen topi.pohjolai...@intel.com writes:
Signed-off-by: Topi Pohjolainen
On 05/31/2013 03:01 PM, Paul Berry wrote:
The EGL 1.4 spec
leaves some wiggle room about whether front buffer rendering is allowed, to
accommodate window systems that don't permit front buffer rendering.
However, since X11 supports front buffer rendering, it seems to me that
Mesa-EGL-X11 ought
On 06/03/2013 01:02 PM, Eric Anholt wrote:
Chad Versace chad.vers...@linux.intel.com writes:
When a gl_client_array is created with glColorPointer,
gl_client_array::Normalized is true. This caused the translation from the
gl_client_array's type to a BRW_SURFACEFORMAT to assertion fail.
Fixes
Patches 7-9 need to be reworked a little bit.
First, the dri and egl/dri2 commit have intermingled changes to the
intel driver. The changes to the intel driver should be pulled out into a
separate final commit.
Second, the commit subjects are imprecise and difficult to understand. If I
were to
On 05/28/2013 02:17 AM, Topi Pohjolainen wrote:
v2:
- upon success close the given file descriptors
v3:
- use specific entry for dma buffers instead of the basic for
primes, and enable the extension based on the availability
of the hook
v4 (Chad):
- use ARRAY_SIZE
-
Patches 1-5 are
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
I'm still looking at the other ones.
On 05/28/2013 02:17 AM, Topi Pohjolainen wrote:
Otherwise 'intel_set_texture_image_region()' won't have enough
details to work with.
Signed-off-by: Topi Pohjolainen topi.pohjolai
On 05/28/2013 02:17 AM, Topi Pohjolainen wrote:
No functional change in preparation for supporting multiple planes
per image each having its own region.
v2 (Chad): Clarify how valid regions are detected. Originally I
thought one could also support cases where one region
On 05/29/2013 07:17 AM, Brian Paul wrote:
On 05/29/2013 12:56 AM, Divick Kishore wrote:
Hi Brian,
thanks for your reply.
On Tue, May 28, 2013 at 9:33 PM, Brian Paul bri...@vmware.com wrote:
I took at look at eglCreateContext(). It's basically:
EGLContext
don't
understand its intent.
Other than that, these two patches are
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_context.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c
b/src/mesa
On 06/05/2013 10:40 AM, Paul Berry wrote:
On 5 June 2013 10:37, Chad Versace chad.vers...@linux.intel.com wrote:
On 05/30/2013 07:44 AM, Paul Berry wrote:
The sentence that begins with In doing so seems incomplete and I don't
understand its intent.
Sorry about that. I appear to have
does not get emitted on non-GLES contexts.
With that change, this is
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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Cc: Chad Versace chad.vers...@linux.intel.com
---
src/glsl/ast_to_hir.cpp | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index e918ade..886cec5 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -94,6
On 06/11/2013 01:39 PM, Ian Romanick wrote:
On 06/11/2013 01:27 PM, Chad Versace wrote:
On 06/08/2013 01:05 PM, Ian Romanick wrote:
From: Ian Romanick ian.d.roman...@intel.com
This has the (intended!) side effect that vertex shader inputs and
fragment shader outputs will appear in the IR
. It causes no regressions on Haswell Android
gles2conform at 64x64 and fixes 3D Bowling.
Reviewed-and-tested-by: Chad Versace chad.vers...@linux.intel.com
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On 06/11/2013 01:57 PM, Chad Versace wrote:
On 06/11/2013 01:39 PM, Ian Romanick wrote:
On 06/11/2013 01:27 PM, Chad Versace wrote:
On 06/08/2013 01:05 PM, Ian Romanick wrote:
From: Ian Romanick ian.d.roman...@intel.com
This has the (intended!) side effect that vertex shader inputs
On 06/21/2013 10:09 PM, Kenneth Graunke wrote:
On 06/21/2013 11:29 AM, Eric Anholt wrote:
Long ago, when porting FBO and memory management support to i965, I
merged a bunch of code between the i915 and i965 drivers and put it in
the intel directory. I think it served us well for a long time,
If allocation fails in intel_miptree_create_layout(), don't proceed to
dereference the miptree. Return an early NULL.
Fixes static analysis error reported by Klocwork.
Note: This is a candidate for the 9.1 branch.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri
On 06/26/2013 02:57 PM, Ian Romanick wrote:
On 06/26/2013 02:42 PM, Chad Versace wrote:
If allocation fails in intel_miptree_create_layout(), don't proceed to
dereference the miptree. Return an early NULL.
Fixes static analysis error reported by Klocwork.
Note: This is a candidate for the 9.1
only epsilon additional
cycles.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 06/27/2013 10:40 PM, Vinson Lee wrote:
Fixes Uninitialized scalar field defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
Thanks, committed to master.
On 06/27/2013 07:04 AM, Brian Paul wrote:
On 06/27/2013 05:35 AM, Ross Burton wrote:
In the generic Unix case use the unsigned long type instead of 32-bit
integers so that the type sizes are consistant on 64-bit machines between X11
and not-X11.
Signed-off-by: Ross Burton ross.bur...@intel.com
Patches 1-3 are
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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and star2,
like /* List of 'ast_declaration*' */
With such a clarification,
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
exec_list declarations;
/**
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On 06/29/2013 07:43 PM, Matt Turner wrote:
---
src/glsl/ast.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/glsl/ast.h b/src/glsl/ast.h
index 13c5e6b..0b70bb7 100644
--- a/src/glsl/ast.h
+++ b/src/glsl/ast.h
@@ -453,6 +453,13 @@ class ast_declarator_list;
class
I second Marek's concern. Having intel_context defined differently
in two locations will cause nightmares in editors. It's possible,
but with much pain, to workaround that nightmare in Eclipse, but I'd
rather avoid it.
I dislike brw_context, because it doesn't match all the other naming
For the series,
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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, 228 deletions(-)
This is currently 'tidying' in my tree. It applies on top of my last 3 part
series of BO bugfixes and tidying ('bofixes' in my tree).
Patch 1 is
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 07/02/2013 01:54 AM, Kenneth Graunke wrote:
There are always better ways to do things.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/intel_screen.c | 5 -
1 file changed, 5 deletions(-)
Patches 2-5 are
Reviewed-by: Chad Versace chad.vers
changed, 12 deletions(-)
Patches 7-9 are
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 07/02/2013 01:54 AM, Kenneth Graunke wrote:
The __DRI_USE_INVALIDATE extension was added in May 11th, 2010 by commit
4258e3a2e1c327. At this point, it's unlikely that anyone's using the
right mix of new and old components to hit this path. Deleting it
removes an untested code path and
/intel_batchbuffer.h | 2 +-
src/mesa/drivers/dri/i965/intel_context.c | 1 -
src/mesa/drivers/dri/i965/intel_context.h | 1 -
4 files changed, 3 insertions(+), 5 deletions(-)
Patches 12-14 are
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
Thanks for breaking up the vtbl patches
src/mesa/drivers/dri/i965/intel_tex_layout.c
delete mode 100644 src/mesa/drivers/dri/i965/intel_tex_layout.h
This mini series is
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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)`.
I'm still uncomfortable that we're not deep-copying
ast_type_specifier::structure,
but I'll trust you.
With the commit subject fixed,
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 07/03/2013 12:03 PM, Matt Turner wrote:
---
src/glsl/ast.h | 12
1 file changed, 12 insertions(+)
diff --git a/src/glsl/ast.h b/src/glsl/ast.h
index 3bb33c5..f00ef3a 100644
--- a/src/glsl/ast.h
+++ b/src/glsl/ast.h
@@ -453,6 +453,18 @@ class ast_declarator_list;
class
is
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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On 07/08/2013 04:09 PM, Matt Turner wrote:
Fixes MESA_GL_VERSION_OVERRIDE=3.2 egl-create-context-verify-gl-flavor.
---
src/mesa/main/context.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 5ad04cc..d687fb7
401 - 500 of 2646 matches
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