From: Dave Airlie airl...@gmail.com
These lowering passes are optional for the backend to request, currently
the TGSI softpipe backend most likely the r600g backend would want to use
these passes as is. They aim to hit the gallium opcodes from the standard
rounding/truncation functions.
v2: also
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
Removed slot multiplication in link_varyings, since component_slots
now takes care of it.
src/glsl/link_uniform_initializers.cpp | 8 +++-
1 file
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
Removed now-unnecessary component_slots multiplication, check the base
type without array.
src/glsl/link_uniforms.cpp | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
Made component_slots() return 2 instead of 1 for double. Also added to
list for uniform_locations(), returning 1.
* of empty space.
On Sun, Feb 8, 2015 at 4:00 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
This is v3 of the patchset which includes fixes based on Ian's
feedback with the exception of his comment on patch 23 (glsl: validate
output types for shader stages), i.e. whether it needs to exist at all
I believe this is expected. See
http://people.freedesktop.org/~imirkin/glxinfo/glxinfo.html -- it's
missing tf2+/indirect on Haswell.
On Thu, Jan 15, 2015 at 7:08 PM, Brian Paul bri...@vmware.com wrote:
I have a question on behalf of a coworker. He's using Ubuntu 14.04 (Mesa
10.1.3, kernel
Oops, dropped cc.
On Jan 19, 2015 3:15 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Nope, that's for something else. This has to do with whether gl fragcoord
is at the integer or half integer coord. The other is a rasterizer setting.
On Jan 19, 2015 3:06 PM, Tiziano Bacocco tizb...@gmail.com
Ilia Mirkin imir...@alum.mit.edu:
Oops, dropped cc.
On Jan 19, 2015 3:15 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Nope, that's for something else. This has to do with whether gl
fragcoord is at the integer or half integer coord. The other is a
rasterizer setting.
On Jan 19, 2015 3:06 PM
On Mon, Jan 19, 2015 at 5:17 PM, Axel Davy axel.d...@ens.fr wrote:
Resolving a multisampled depth texture into
a single sampled texture is supported on = SM4.1
hw. It is possible some previous hw support it.
The ability was tested on radeonsi and nvc0.
I'm not aware of any issues in this
Doesn't this need to be added to the mesa/st switch's in st_format.c?
On Fri, Jan 16, 2015 at 6:09 AM, Iago Toral ito...@igalia.com wrote:
Looks good to me.
Jason: does this get your R-b?
Iago
On Fri, 2015-01-16 at 12:48 +0200, Tapani Pälli wrote:
Commit 8ec6534 changed texture upload path
Actually nevermind. There's no matching PIPE_FORMAT for that, so it'll
have to get added.
On Fri, Jan 16, 2015 at 10:44 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Doesn't this need to be added to the mesa/st switch's in st_format.c?
On Fri, Jan 16, 2015 at 6:09 AM, Iago Toral ito
I'm confused by what this flag is allowing. Are we talking about a
blit from MS - non-MS? texelFetch(sampler2DMS) for a depth buffer?
texelFetch(sampler2D) for a MS surface? (is that even allowed in GL?)
Or are we talking about mixing MS and non-MS buffers in the fb? These
are all separate things.
It's already defined in src/util/macros.h which you can include via
#include util/macros.h -- I suspect some key gallium file should
include that...
On Wed, Feb 11, 2015 at 10:47 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
This is done the same way for glsl et al. already
QueryCounterBits for new tokens (Ilia)
Jordan: Use _mesa_has_compute_shaders
Cc: Jordan Justen jljus...@gmail.com
Cc: Ilia Mirkin imir...@alum.mit.edu
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
.../glapi/gen/ARB_pipeline_statistics_query.xml| 24 ++
src/mapi/glapi
On Tue, Feb 17, 2015 at 5:25 PM, Ian Romanick i...@freedesktop.org wrote:
So... is there are 3rd group, and do we care enough to do the work
necessary to support them?
Wine maybe? (They're compat-only for now, although some work is being
done to support core, but that might only be for their
On Tue, Feb 17, 2015 at 7:12 PM, Jordan Justen
jordan.l.jus...@intel.com wrote:
+++
b/tests/spec/arb_shader_atomic_counters/execution/vs-simple-inc-dec-read.shader_test
@@ -0,0 +1,70 @@
+# Simple test of atomicCounterIncrement, atomicCounterDecrement and
+# atomicCounter being used in the
_mesa_has_compute_shaders
Cc: Jordan Justen jljus...@gmail.com
Cc: Ilia Mirkin imir...@alum.mit.edu
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
.../glapi/gen/ARB_pipeline_statistics_query.xml| 24 ++
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml
On Tue, Feb 10, 2015 at 6:58 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Add a enter/leave record callback so that the offset may be aligned to
the proper value. Otherwise only leaf fields are called, and the first
field needs to be aligned to the outer struct's base alignment while the
last
On Thu, Feb 12, 2015 at 3:09 PM, Martin Peres martin.pe...@free.fr wrote:
On 12/02/15 04:05, Laura Ekstrand wrote:
This includes a v2 of all of the buffer object code plus a v2 of the
related
TextureBufferRange entry point.
Note that some implementations have been merged together (MapBuffer
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
docs/GL3.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 23f5561..e376f6b 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -212,6 +212,7 @@ These are the extensions cherry-picked to make GLES 3.1
GLES3.1
On Thu, Feb 19, 2015 at 11:27 AM, Brian Paul bri...@vmware.com wrote:
To silence compiler warnings about unhandled switch cases.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
Series is Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
On Thu, Feb 19, 2015 at 3:51 PM, Brian Paul bri...@vmware.com wrote:
To silence compiler warning about unhandled switch case.
v2: move GLSL_TYPE_DOUBLE to the not reached section, per Ilia.
---
src/glsl/nir/nir_lower_io.c | 1 +
1 file
here and in st_CopyPixels).
With that changed, Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
+ num_sampler_view++;
}
}
@@ -1176,7 +1178,8 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
if (write_stencil) {
enum pipe_format
);
+ fetch_source(mach, src1, inst-Src[1], TGSI_CHAN_Z,
TGSI_EXEC_DATA_INT);
+ micro_dldexp(dst, src0, src1);
+ store_double_channel(mach, dst, inst-Dst[0], inst, TGSI_CHAN_Z,
TGSI_CHAN_W);
+ }
+}
With the above trivial fixes, this is
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
[re-adding mesa-dev, dropped by accident]
On Mon, Feb 16, 2015 at 11:48 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
On Mon, Feb 16, 2015 at 7:06 PM, Dave Airlie airl...@gmail.com wrote:
From: Dave Airlie airl...@redhat.com
everytime I open this file in emacs with show trailing whitespace
Missed a few drivers in the earlier changes, this should fix up all the
ones that print unknown caps or don't have a default statement.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/freedreno/freedreno_screen.c | 2 ++
src/gallium/drivers/i915/i915_screen.c
On Thu, Feb 19, 2015 at 11:54 PM, Dave Airlie airl...@gmail.com wrote:
On 20 February 2015 at 14:46, Ilia Mirkin imir...@alum.mit.edu wrote:
Missed a few drivers in the earlier changes, this should fix up all the
ones that print unknown caps or don't have a default statement.
+++ b/src
-is_double()) lowering(DIV_TO_MUL_RCP))
80 chars. And space around .
With that fixed, Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
div_to_mul_rcp(ir);
break;
--
1.9.3
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http
Not having SQRT is assumed to tacitly mean that RSQ is available.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 +
src/gallium/auxiliary/tgsi/tgsi_exec.h | 1 +
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 ++
src/gallium/drivers/r600
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index e170217..4d91ca6 100644
--- a/src/mesa
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 63b779d..e170217 100644
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/auxiliary/gallivm/lp_bld_limits.h | 1 +
src/gallium/auxiliary/tgsi/tgsi_exec.h | 2 ++
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4
src/gallium/drivers/r600
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 5
src/gallium/docs/source/tgsi.rst | 39 ++
src/gallium/include/pipe/p_shader_tokens.h | 7 +-
3 files changed, 50 insertions(+), 1 deletion(-)
diff
On Thu, Feb 19, 2015 at 9:43 PM, Dave Airlie airl...@gmail.com wrote:
From: Dave Airlie airl...@redhat.com
I'm not sure we really care about this, but we need to
write better support if we do. For now just disable it.
piglit test:
On Fri, Feb 20, 2015 at 4:10 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
This works with a modified varying-packing test for everything except
dvec4 array which crashes in st/mesa somewhere. Still working on that
one. The IR generated here
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
This works with a modified varying-packing test for everything except
dvec4 array which crashes in st/mesa somewhere. Still working on that
one. The IR generated here kinda stinks, but I couldn't get an
assignment with a swizzle to work.
src
On Fri, Jan 30, 2015 at 6:19 AM, Martin Peres
martin.pe...@linux.intel.com wrote:
Signed-off-by: Martin Peres martin.pe...@linux.intel.com
---
src/mesa/drivers/dri/common/drirc | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/common/drirc
On Fri, Jan 30, 2015 at 3:34 PM, Axel Davy axel.d...@ens.fr wrote:
Count explicitly the slots for float, int and bool constants,
and deduce the constbuf size in nine_shader.
Signed-off-by: Axel Davy axel.d...@ens.fr
---
src/gallium/state_trackers/nine/nine_shader.c | 17 ++---
On Fri, Jan 30, 2015 at 3:34 PM, Axel Davy axel.d...@ens.fr wrote:
This D3D hack is supposed to be supported
by all AMD SM2+ cards. Apps use it without
checking if they are on AMD.
Signed-off-by: Axel Davy axel.d...@ens.fr
---
src/gallium/state_trackers/nine/device9.c| 17
Of course, the latter part of the statement is probably true of even
fully supported cards, so... perhaps just the first half of that
sentence.
Anyways,
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
nine_shader_info *info)
info-num_float_consts_slots;
info-const_used_size = sizeof(float[4]) * slot_max; /* slots start from
1 */
+for(s = 0; s slot_max; s++)
for (
With that fixed, Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
+ureg_DECL_constant(tx-ureg, s
On Sun, Feb 1, 2015 at 12:37 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
This will allow supporting NULL textures.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.h| 2 ++
On Sun, Feb 1, 2015 at 10:18 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
diff --git a/src/mesa/main/polygon.c b/src/mesa/main/polygon.c
index e3b9073..2aa8f31 100644
--- a/src/mesa/main/polygon.c
+++ b/src/mesa/main/polygon.c
@@ -235,25 +235,33 @@ _mesa_GetPolygonStipple( GLubyte *dest
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/mapi/glapi/gen/gl_API.xml | 11 +++
src/mesa/main/polygon.c | 6 ++
src/mesa/main/polygon.h | 5 -
src/mesa/main/tests/dispatch_sanity.cpp | 3 +++
4 files changed, 24 insertions
Nothing enables the extension yet, but the values are now available.
The spec calls for it to only be exposed for GL 3.3+, which is core-only
in mesa. Instead we allow any driver to enable it, including in a compat
context for any GL version.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Replace the hard-coded 0's with the context clamp value.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
docs/relnotes/10.5.0.html| 1 +
src/mesa/drivers/dri/i965/gen6_sf_state.c| 2 +-
src/mesa/drivers/dri/i965/gen7_sf_state.c| 2 +-
src/mesa/drivers/dri/i965
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
src/gallium/drivers/i915/i915_screen.c | 1 +
src/gallium/drivers/ilo/ilo_screen.c | 2 ++
src/gallium/drivers/llvmpipe/lp_screen.c | 2 ++
src/gallium/drivers
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
v1 - v2:
- rely on cap rather than turning it on for everything
docs/relnotes/10.5.0.html | 2 +-
src/mesa/state_tracker/st_atom_rasterizer.c | 1 +
src/mesa/state_tracker/st_extensions.c | 1 +
3 files changed, 3
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Thoroughly untested, beyond compilation. Don't have the HW, nor am I
particularly familiar with the i965 driver in general. Should be easy enough
to test though for someone with the hw.
src/mesa/drivers/dri/i965/brw_clip.c | 1 +
src
On Sun, Feb 1, 2015 at 10:18 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Thoroughly untested, beyond compilation. Don't have the HW, nor am I
particularly familiar with the i965 driver in general. Should be easy enough
to test though
On Sun, Feb 1, 2015 at 5:06 PM, Marek Olšák mar...@gmail.com wrote:
No. The image descriptor really has 8 dwords, therefore the slot can
contain either a texture or a buffer, but not both.
Gotcha. Seemed like a typo, so figured I'd point it out. Sounds like
it was intentional though.
On Tue, Jan 6, 2015 at 8:54 AM, Jose Fonseca jfons...@vmware.com wrote:
Do we really need a new pipe_context::set_counter_buffer method? Shouldn't
this case be covered by pipe_context::set_shader_resources ?
FWIW this is the approach I've taken in
https://github.com/imirkin/mesa/commits/atomic
On Sat, Jan 10, 2015 at 5:44 AM, Axel Davy axel.d...@ens.fr wrote:
texcoord for ps 1_4 should clamp between 0 and 1 the values.
texcrd (texcoord ps 1_4) does not clamp and can be used with
two modifiers _dw and _dz that means the channels are divided
by w or z.
Implement those in shared
On Sat, Jan 10, 2015 at 5:33 AM, Axel Davy axel.d...@ens.fr wrote:
Reviewed-by: David Heidelberg da...@ixit.cz
Signed-off-by: Axel Davy axel.d...@ens.fr
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
It is customary to include what changes were made from v1 - v2. I do
it below
Is there a continue in d3d9? I couldn't find one, but if there is,
then this change won't work.
On Sat, Jan 10, 2015 at 5:42 AM, Axel Davy axel.d...@ens.fr wrote:
Previous implementation was fine,
just instead of having increasing counter,
have a decreasing counter.
Didn't you have some other
On Sat, Jan 10, 2015 at 5:38 AM, Axel Davy axel.d...@ens.fr wrote:
Signed-off-by: Axel Davy axel.d...@ens.fr
Cc: 10.4 mesa-sta...@lists.freedesktop.org
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/state_trackers/nine/nine_shader.c | 23 +--
1 file
Can you elaborate a bit as to why that's the right thing to do?
On Wed, Jan 7, 2015 at 1:52 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
If we capture transform feedback from n stream in (n-1) buffers we face a
NULL buffer, use the buffer (n-1) to capture the output of
On Sun, Jan 11, 2015 at 7:43 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
On 11.01.2015 06:05, Ilia Mirkin wrote:
Can you elaborate a bit as to why that's the right thing to do?
On Wed, Jan 7, 2015 at 1:52 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote
On Sun, Jan 11, 2015 at 8:11 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
On 12.01.2015 01:57, Ilia Mirkin wrote:
On Sun, Jan 11, 2015 at 7:43 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
On 11.01.2015 06:05, Ilia Mirkin wrote:
Can you elaborate
at 7:17 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
I thought that a surface was basically a writable view into a
resource. What does sampler view have that surface doesn't (that
matters)? The only thing I can think of is levels, but does anything
actually support multi-level stuff
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/ast.h | 2 ++
src/glsl/ast_function.cpp | 66 +
src/glsl/ast_to_hir.cpp | 33 +++--
From: Dave Airlie airl...@gmail.com
This lowers double dot product and lrp to fma.
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/lower_instructions.cpp | 65 +
1 file changed, 65 insertions(+)
diff --git a/src/glsl/lower_instructions.cpp
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
---
src/glsl/opt_algebraic.cpp| 26 ++
src/glsl/opt_constant_propagation.cpp | 3 +++
src/glsl/opt_minmax.cpp | 13
From: Tapani Pälli tapani.pa...@intel.com
Patch fixes Piglit test:
arb_gpu_shader_fp64/preprocessor/fs-output-double.frag
and adds additional validation for shader outputs.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
From: Dave Airlie airl...@gmail.com
v2: add d2b, more ir_constant stuff (Ilia)
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/ir.cpp | 111 ++--
src/glsl/ir.h | 22
src/glsl/ir_validate.cpp| 72
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/ir_builder.cpp | 23 +++
src/glsl/ir_builder.h | 5 +
2 files changed, 28
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/ir_constant_expression.cpp | 247 +++-
1 file changed, 215 insertions(+), 32 deletions(-)
diff --git a/src/glsl/ir_constant_expression.cpp
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/loop_controls.cpp | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/glsl/loop_controls.cpp b/src/glsl/loop_controls.cpp
index 1c1d34f..2459fc1 100644
---
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/lower_mat_op_to_vec.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/lower_mat_op_to_vec.cpp b/src/glsl/lower_mat_op_to_vec.cpp
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/link_uniforms.cpp | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index de2f6c9..3aa6e0a 100644
---
From: Dave Airlie airl...@redhat.com
This adds support for the new uniform interfaces
from ARB_gpu_shader_fp64.
v2:
support ARB_separate_shader_objects ProgramUniform*d* (Ian)
don't allow boolean uniforms to be updated (issue 15) (Ian)
v3: fix size_mul
v4: Teach uniform update to take into
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/lower_ubo_reference.cpp | 57 +++-
1 file changed, 33 insertions(+), 24 deletions(-)
diff --git a/src/glsl/lower_ubo_reference.cpp
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/glsl/tests/uniform_initializer_utils.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/src/glsl/tests/uniform_initializer_utils.cpp
b/src/glsl/tests/uniform_initializer_utils.cpp
index 6f47acd..8c9d8cc 100644
--- a/src
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/link_uniform_initializers.cpp | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/glsl/link_uniform_initializers.cpp
From: Dave Airlie airl...@gmail.com
These lowering passes are optional for the backend to request, currently
the TGSI softpipe backend most likely the r600g backend would want to use
these passes as is. They aim to hit the gallium opcodes from the standard
rounding/truncation functions.
v2: also
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/ir_set_program_inouts.cpp | 28
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/src/glsl/ir_set_program_inouts.cpp
b/src/glsl/ir_set_program_inouts.cpp
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com
---
src/glsl/glsl_lexer.ll | 31 +++
1 file changed, 27 insertions(+), 4 deletions(-)
diff
This causes a lot of warnings about unchecked type in
switch statements - fix them later.
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
---
src/glsl/glsl_types.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/glsl/glsl_types.h
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/glsl_parser.yy | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
From: Dave Airlie airl...@gmail.com
This implements the bulk of the builtin functions for fp64 support.
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/builtin_functions.cpp | 751 +++--
1 file changed, 492 insertions(+), 259 deletions(-)
diff
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/glsl/ir_optimization.h | 1 +
src/glsl/lower_instructions.cpp | 279 +++-
2 files changed, 279 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/ir_clone.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/ir_clone.cpp
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/builtin_type_macros.h | 16 ++
src/glsl/builtin_types.cpp | 30 +++
double support to lower_mat_op_to_vec
glsl: enable/disable certain lowering passes for doubles
glsl/lower_instructions: add double lowering passes
glsl: implement double builtin functions
glsl: lower double optional passes (v2)
Ilia Mirkin (4):
glsl: Add double builtin type
glsl: fix
most usage of the last field/record type values passed into
visit_field.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
I kept this separate from the other changes since it seemed self-contained.
I can fold somewhere else if desired.
src/glsl/link_uniform_blocks.cpp | 45
From: Dave Airlie airl...@redhat.com
Just add the xml file covering this extension,
and dummy interface files in mesa, and fix up
sanity tests.
v2:
Enable ProgramUniform*d* from ARB_separate_shader_objects (Ian)
use 40 instead of 43 for dispatch_sanity.cpp (Chris)
uncomment PU sanity tests.
From: Dave Airlie airl...@redhat.com
This just adds the entries to extensions.c and mtypes.h
v2: use core profile only (Ian)
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com
---
From: Dave Airlie airl...@gmail.com
We want to restrict some lowering passes to floats only,
and enable other for doubles.
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/lower_instructions.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Dave Airlie airl...@gmail.com
Signed-off-by: Dave Airlie airl...@redhat.com
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/ir_print_visitor.cpp | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Dave Airlie airl...@redhat.com
v2: add define bit (Tapani Pälli)
Patch makes following Piglit tests pass:
arb_gpu_shader_fp64/preprocessor/define.vert
arb_gpu_shader_fp64/preprocessor/define.frag
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Dave Airlie
DOUBLE/IMAGE types
On Tue, Feb 10, 2015 at 6:58 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
I spent a lot of quality time with Ian's random_ubo.py script, and I'm
happy to report that with the current iteration, it doesn't spot any
problems (after ~1000 shaders). I only had to make the following
On Sat, Feb 14, 2015 at 1:11 PM, Marek Olšák mar...@gmail.com wrote:
Reviewed-by: Marek Olšák marek.ol...@amd.com
Could you please update the release notes as well (mentioning all
drivers supporting it)?
Will do. By my count, that's
ilo (but usually not mentioned in release notes)
nvc0
r600
On Sat, Feb 14, 2015 at 3:33 AM, Jordan Justen
jordan.l.jus...@intel.com wrote:
On 2015-02-13 23:13:01, Ilia Mirkin wrote:
On Sat, Feb 14, 2015 at 2:02 AM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
From: Jordan Justen jordan.l.jus...@intel.com
Signed-off-by: Jordan Justen
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
On Sat, Feb 14, 2015 at 3:53 PM, Jordan Justen
jordan.l.jus...@intel.com wrote:
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
src/mesa/main/context.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/mesa/main
happy either way wrt making the extension core-only or not, so my
R-b stands. Just thought I'd point that issue out.
-ilia
On Sat, Feb 14, 2015 at 2:14 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
On Sat, Feb 14, 2015 at 2:02 AM, Ben Widawsky
On Sun, Feb 8, 2015 at 5:51 PM, Dave Airlie airl...@gmail.com wrote:
On 9 February 2015 at 08:44, Aditya Avinash adityaavina...@gmail.com wrote:
Ya. I just want to know that part only some r600.
I believe some of the nv0 cards doesn't support double. You have any ideas
or suggestions to make
This fixes the teximage-colors uploads with GL_ALPHA format and
non-GL_UNSIGNED_BYTE type.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau
Tested with a modified xfb-streams test which outputs to streams 0, 2,
and 3.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c | 9 -
src/gallium/drivers/nouveau/nvc0/nvc0_state.c| 8 +---
2 files changed, 13 insertions
If a transform feedback buffer's size is 0, st_bufferobj_data doesn't
end up creating a buffer for it. There's no point in trying to write to
such a buffer, so just pretend as if it's not really there.
This fixes arb_gpu_shader5-xfb-streams-without-invocations on nvc0.
Signed-off-by: Ilia Mirkin
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