Re: [Mesa-dev] [PATCH v2] doxygen: Add missing modules to Windows runner

On 10 May 2016 at 16:04, Elie TOURNIER wrote: > --- > doxygen/doxy.bat | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/doxygen/doxy.bat b/doxygen/doxy.bat > index e566ca3..408964e 100644 > --- a/doxygen/doxy.bat > +++ b/doxygen/doxy.bat > @@ -6,6 +6,9 @@

[Mesa-dev] [PATCH] glsl: fixed uninitialized pointer

Class "ir_constant" had a bunch of constructors where the pointer member "array_elements" had not been initialized. This could have lead to unsafe code if something had tried to write anything to it. This patch fixes this issue by initializing the pointer to NULL in all the constructors. This

Re: [Mesa-dev] [PATCH 11/15] i965: abort linking if we exhaust the registers

On Fri, 2016-04-29 at 14:23 +0200, Juan A. Suarez Romero wrote: > On Fri, 2016-04-29 at 11:15 +0200, Ian Romanick wrote: > > > > The driver supports up to 16 vertex attributes. > > > > > > ARB_vertex_attrib_64bit > > > states that attribute variables of type dvec3, dvec4, dmat2x3, > > > dmat2x4,

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 Michel Dänzer changed: What|Removed |Added QA Contact|dri-devel@lists.freedesktop

[Mesa-dev] Add OpenSWR to GL3.txt?

Is there any possibility that OpenSWR can be added to GL3.txt [1] so others can get an idea of what things OpenSWR supports? GL3.txt is what mesamatrix [2] uses, so adding OpenSWR to GL3.txt would add it there as well. [1] https://cgit.freedesktop.org/mesa/mesa/tree/docs/GL3.txt [2]

Re: [Mesa-dev] [PATCH 15/23] i965/fs: add SHUFFLE_32BIT_LOAD_RESULT_TO_64BIT_DATA helper

On Tue, 2016-05-10 at 19:10 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > From: Iago Toral Quiroga > > > > There are a few places where we need to shuffle the result of a 32-bit load > > into valid 64-bit data, so extract this

Re: [Mesa-dev] [PATCH 15/23] i965/fs: add SHUFFLE_32BIT_LOAD_RESULT_TO_64BIT_DATA helper

On Wed, 2016-05-11 at 12:49 +0200, Iago Toral wrote: > On Tue, 2016-05-10 at 19:10 -0700, Francisco Jerez wrote: > > Samuel Iglesias Gonsálvez writes: > > > > > From: Iago Toral Quiroga > > > > > > There are a few places where we need to shuffle the

Re: [Mesa-dev] [PATCH 05/15] i965/fs: shuffle 32bits into 64bits for doubles

On Tue, 2016-05-10 at 13:18 -0700, Kenneth Graunke wrote: > On Thursday, April 28, 2016 1:40:35 PM PDT Antia Puentes wrote: > > From: "Juan A. Suarez Romero" > >  > > VS Thread Payload handles attributes in URB as vec4, no matter if > they > > are actually single or double

Re: [Mesa-dev] [PATCH] gallium/radeon: Rename gart_page_size member to bo_alignment

On 11.05.2016 18:08, Marek Olšák wrote: > On Wed, May 11, 2016 at 8:22 AM, Michel Dänzer wrote: >> From: Michel Dänzer >> >> This should make its meaning clearer. >> >> The value it holds is the CPU page size, which can be different from >> the GART

Re: [Mesa-dev] [PATCH 09/23] i965/fs: don't copy propagate from a larger type if the stride is not 1

On Tue, 2016-05-10 at 17:28 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > From: Iago Toral Quiroga > > > > Because the stride is in units for the type, if we copy-propagate from > > a another instruction using a larger type,

Re: [Mesa-dev] [PATCH] gallium/radeon: Rename gart_page_size member to bo_alignment

On Wed, May 11, 2016 at 11:28 AM, Michel Dänzer wrote: > On 11.05.2016 18:08, Marek Olšák wrote: >> On Wed, May 11, 2016 at 8:22 AM, Michel Dänzer wrote: >>> From: Michel Dänzer >>> >>> This should make its meaning clearer. >>> >>>

[Mesa-dev] [PATCH] clover: Pass unquoted include path to Clang

OpenCL apps quote include paths they pass to the OpenCL compiler. If the OpenCL compiler is called via a shell, the shell removes quotes before passing the argument to the compiler. Since we call Clang as a library, we have to remove quotes before passing the argument. ---

[Mesa-dev] [PATCH] clover: Pass unquoted include path to Clang

OpenCL apps quote include paths they pass to the OpenCL compiler. If the OpenCL compiler is called via a shell, the shell removes quotes before passing the argument to the compiler. Since we call Clang as a library, we have to remove quotes before passing the argument. ---

Re: [Mesa-dev] [PATCH 15/23] i965/fs: add SHUFFLE_32BIT_LOAD_RESULT_TO_64BIT_DATA helper

On Tue, 2016-05-10 at 19:10 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > From: Iago Toral Quiroga > > > > There are a few places where we need to shuffle the result of a 32-bit load > > into valid 64-bit data, so extract this

Re: [Mesa-dev] [PATCH 15/23] i965/fs: add SHUFFLE_32BIT_LOAD_RESULT_TO_64BIT_DATA helper

On Tue, 2016-05-10 at 19:10 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > From: Iago Toral Quiroga > > > > There are a few places where we need to shuffle the result of a 32-bit load > > into valid 64-bit data, so extract this

Re: [Mesa-dev] [PATCH 12/23] i965/fs: fix pull constant load component selection for doubles

On Wed, 2016-05-11 at 17:12 +0200, Samuel Iglesias Gonsálvez wrote: > On Tue, 2016-05-10 at 21:06 -0700, Francisco Jerez wrote: > > > > Samuel Iglesias Gonsálvez writes: > > > > > > > > > > > From: Iago Toral Quiroga > > > > > >

Re: [Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

On Wed, May 11, 2016 at 11:06 AM, Leo Liu wrote: > This series implement DRI3 supports for VA-API and VDPAU. It implements > supports for DRI3 Open, PixmapFromBuffer, BufferFromPixmap, and for > PRESENT including PresentPixmap, PresentNotifyMSC, PresentIdleNotify, >

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 --- Comment #4 from Christopher W. Carpenter --- (In reply to Michel Dänzer from comment #3) > Replaying the apitrace with LIBGL_ALWAYS_SOFTWARE=1 (forcing llvmpipe) gives > the same broken rendering, so this doesn't seem

[Mesa-dev] [PATCH 01/14] vl: add DRI3 support infrastructure

Required functions into place for implementation later Signed-off-by: Leo Liu --- src/gallium/auxiliary/Makefile.sources| 5 ++ src/gallium/auxiliary/vl/vl_winsys.h | 5 ++ src/gallium/auxiliary/vl/vl_winsys_dri3.c | 109 ++ 3 files

[Mesa-dev] [PATCH 04/14] vl/dri3: register present events

Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 27 +++ 1 file changed, 27 insertions(+) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c b/src/gallium/auxiliary/vl/vl_winsys_dri3.c index 40e98d4..6014537 100644 ---

[Mesa-dev] [PATCH 07/14] vl/dri3: implement function for flush frontbuffer

Request drawable content in pixmap by calling DRI3 PresentPixmap, and handle PresentIdleNotify event. Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 32 +-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git

Re: [Mesa-dev] [PATCH 15/28] i965/blorp: Add a param array to prog_data

On May 10, 2016 11:53 PM, "Pohjolainen, Topi" wrote: > > On Tue, May 10, 2016 at 04:16:35PM -0700, Jason Ekstrand wrote: > > This array allows the push constants to be re-arranged on upload. The > > actual arrangement will, eventually, come from the back-end compiler.

Re: [Mesa-dev] [PATCH 15/28] i965/blorp: Add a param array to prog_data

On May 11, 2016 7:45 AM, "Jason Ekstrand" wrote: > > > On May 10, 2016 11:53 PM, "Pohjolainen, Topi" wrote: > > > > On Tue, May 10, 2016 at 04:16:35PM -0700, Jason Ekstrand wrote: > > > This array allows the push constants to be re-arranged on

[Mesa-dev] [PATCH 11/14] st/va: add dri3 support

Signed-off-by: Leo Liu --- src/gallium/state_trackers/va/context.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/va/context.c b/src/gallium/state_trackers/va/context.c index 25d587a..93ab3d9 100644 ---

[Mesa-dev] [PATCH 14/14] st/vdpau: add dri3 support

Signed-off-by: Leo Liu --- src/gallium/state_trackers/vdpau/device.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/vdpau/device.c b/src/gallium/state_trackers/vdpau/device.c index de7e951..81b7582 100644 ---

Re: [Mesa-dev] [PATCH 12/23] i965/fs: fix pull constant load component selection for doubles

On Tue, 2016-05-10 at 21:06 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > > > From: Iago Toral Quiroga > > > > UNIFORM_PULL_CONSTANT_LOAD is used to load a contiguous vec4 > > starting at a > > constant offset that is 16-byte

[Mesa-dev] [PATCH 06/14] vl/dri3: add back buffers support

This implements DRI3 PixmapFromBuffer. Create buffer objects, and associate it to a dma-buf fd, and then pass this fd with a pixmap ID to X server for creating pixmap object; also add a function for wait events. Signed-off-by: Leo Liu ---

[Mesa-dev] [PATCH 02/14] vl/dri3: implement dri3 screen create and destroy

Screen created with device fd returned from X server, also will bail out to DRI2 with certain conditions. Signed-off-by: Leo Liu --- configure.ac | 7 ++- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 88 ++- 2 files

[Mesa-dev] [PATCH 12/14] vl/dri3: handle PresentCompleteNotify event

and get timestamp calculated based on the event's reply Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 28 +++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c

[Mesa-dev] [PATCH 08/14] vl/dri3: implement funciton for get dirty area

This will clear presentation area not covered by video content Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c

[Mesa-dev] [PATCH 05/14] vl/dri3: implement flushing for queued events

also place holder for present events handling Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 36 +++ 1 file changed, 36 insertions(+) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c

[Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

This series implement DRI3 supports for VA-API and VDPAU. It implements supports for DRI3 Open, PixmapFromBuffer, BufferFromPixmap, and for PRESENT including PresentPixmap, PresentNotifyMSC, PresentIdleNotify, PresentConfigureNotify and PresentCompleteNotify. It has been tested with player mpv

[Mesa-dev] [PATCH 09/14] vl/dri3: add support for resizing

When drawable size changed, PresentConfigureNotify event will be emitted, by handling the event to re-allocate resized buffer. Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff

[Mesa-dev] [PATCH 10/14] vl/dri3: implement DRI3 BufferFromPixmap

We also need render to the front buffer of temporary X pixmap, this is the case of when we using opengl as video out for vaapi. the basic implementation is to pass pixmap ID to X server, and then X will return dma-buf fd, we will get the buffer object through this dma-buf fd. Signed-off-by: Leo

[Mesa-dev] [PATCH 03/14] vl/dri3: set drawable geometry

Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c b/src/gallium/auxiliary/vl/vl_winsys_dri3.c index c018379..40e98d4 100644 ---

[Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

Signed-off-by: Leo Liu --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 59 +++ 1 file changed, 53 insertions(+), 6 deletions(-) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c b/src/gallium/auxiliary/vl/vl_winsys_dri3.c index f917e4b..d8e8319

Re: [Mesa-dev] [PATCH 15/28] i965/blorp: Add a param array to prog_data

On Wed, May 11, 2016 at 07:46:33AM -0700, Jason Ekstrand wrote: >On May 11, 2016 7:45 AM, "Jason Ekstrand" <[1]ja...@jlekstrand.net> >wrote: >> >> >> On May 10, 2016 11:53 PM, "Pohjolainen, Topi" ><[2]topi.pohjolai...@intel.com> wrote: >> > >> > On Tue, May 10, 2016

Re: [Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

Hi Axel, Thanks for the comments. Inlines. On 05/11/2016 11:57 AM, Axel Davy wrote: Hi, Do you have some local branch to review all at once (it is a bit hard to follow with the patches) ? The sequences of patches are based on existing vl/dri required functions, also follows vaapi and then

Re: [Mesa-dev] [PATCH 15/28] i965/blorp: Add a param array to prog_data

On Tue, May 10, 2016 at 04:16:35PM -0700, Jason Ekstrand wrote: > This array allows the push constants to be re-arranged on upload. The > actual arrangement will, eventually, come from the back-end compiler. > --- > src/mesa/drivers/dri/i965/brw_blorp.c | 4 >

Re: [Mesa-dev] [PATCH 00/28] i965/blorp: Use NIR for compiling shaders

On Tue, May 10, 2016 at 04:16:20PM -0700, Jason Ekstrand wrote: > When Paul originally wrote blorp he hand-rolled a shader builder that > builds i965 shaders directly. This has caused headaches because every time > we make a change to the back-end compiler, we have to update blorp. NIR on > the

Re: [Mesa-dev] Add OpenSWR to GL3.txt?

It is whatever you (i.e. driver maintainer) want it to be. GL3.txt is mainly for coordinating development and letting people know who's working on what (less so of late though). If you plan on exposing GL 4.0+, it can be a nice TODO list. Otherwise there's not an immense amount of value. -ilia

Re: [Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

Hi, Do you have some local branch to review all at once (it is a bit hard to follow with the patches) ? From a quick looks, it seems you inspired from the loader dri3 code. There is also another implementation you can inspire from:

Re: [Mesa-dev] [PATCH 01/17] scons: Build NIR.

On Tue, May 10, 2016 at 3:43 PM, Emil Velikov wrote: > On 9 May 2016 at 20:33, Rob Clark wrote: >> From: Jose Fonseca >> >> Signed-off-by: Rob Clark >> --- >> src/compiler/SConscript | 57 >>

[Mesa-dev] Android: apps crashed on Intel Gen9 GPU

Testing android-x86 with mesa 11.2.2, I found the Google Play crashed forever on a device with Intel Gen9 GPU (e.g., Skylake). After analyzing, the i965 driver seems to assume irb->mt is not null. For example in brw_meta_fast_clear of brw_meta_fast_clear.c: struct intel_renderbuffer *irb =

Re: [Mesa-dev] Add OpenSWR to GL3.txt?

What is the criteria for marking an extension “done”? Passing some percentage (all?) of relevant piglit tests? -Tim > On May 10, 2016, at 10:31 PM, Andrew J wrote: > > Is there any possibility that OpenSWR can be added to GL3.txt [1] so > others can get an idea of what

Re: [Mesa-dev] [PATCH 16/28] blorp: Add initial state setup support for SIMD8 dispatch

On Wed, May 11, 2016 at 12:25 AM, Pohjolainen, Topi < topi.pohjolai...@intel.com> wrote: > On Tue, May 10, 2016 at 04:16:36PM -0700, Jason Ekstrand wrote: > > --- > > src/mesa/drivers/dri/i965/brw_blorp.c | 6 +- > > src/mesa/drivers/dri/i965/brw_blorp.h | 8 +++- > >

[Mesa-dev] [PATCH 1/3] glx: Implement the libglvnd interface.

From: Kyle Brenneman With reference to the libglvnd branch: https://cgit.freedesktop.org/mesa/mesa/log/?h=libglvnd This is a squashed commit containing all of Kyle's commits, all but two of Emil's commits (to follow), and a small fixup from myself to mark the rest of the

Re: [Mesa-dev] [PATCH 15/28] i965/blorp: Add a param array to prog_data

On Wed, May 11, 2016 at 8:39 AM, Pohjolainen, Topi < topi.pohjolai...@intel.com> wrote: > On Wed, May 11, 2016 at 07:46:33AM -0700, Jason Ekstrand wrote: > >On May 11, 2016 7:45 AM, "Jason Ekstrand" <[1]ja...@jlekstrand.net> > >wrote: > >> > >> > >> On May 10, 2016 11:53 PM,

Re: [Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

Am 11.05.2016 um 17:06 schrieb Leo Liu: This series implement DRI3 supports for VA-API and VDPAU. It implements supports for DRI3 Open, PixmapFromBuffer, BufferFromPixmap, and for PRESENT including PresentPixmap, PresentNotifyMSC, PresentIdleNotify, PresentConfigureNotify and

Re: [Mesa-dev] [PATCH 06/14] vl/dri3: add back buffers support

On 11/05/2016 17:06, Leo Liu wrote: This implements DRI3 PixmapFromBuffer. Create buffer objects, and associate it to a dma-buf fd, and then pass this fd with a pixmap ID to X server for creating pixmap object; also add a function for wait events. Signed-off-by: Leo Liu ---

Re: [Mesa-dev] [PATCH 17/28] i965/blorp: Add a helper for compiling NIR shaders

On Tue, May 10, 2016 at 04:16:37PM -0700, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_blorp.c | 95 > +++ > src/mesa/drivers/dri/i965/brw_blorp.h | 10 > 2 files changed, 105 insertions(+) > > diff --git

[Mesa-dev] [Bug 95354] anv_pipeline.c:164:7: error: implicit declaration of function ‘nir_lower_outputs_to_temporaries’ [-Werror=implicit-function-declaration]

https://bugs.freedesktop.org/show_bug.cgi?id=95354 Bug ID: 95354 Summary: anv_pipeline.c:164:7: error: implicit declaration of function ‘nir_lower_outputs_to_temporaries’ [-Werror=implicit-function-declaration] Product:

[Mesa-dev] [PATCH 2/3] glx/glvnd: Use strcmp() based binary search in FindGLXFunction()

From: Emil Velikov It will allows us to find the function within 6 attempts, out of the ~80 entry long table. Reviewed-by: Adam Jackson Signed-off-by: Emil Velikov --- src/glx/glxglvnd.c | 17 + 1 file

[Mesa-dev] [PATCH 3/3] glx/glvnd: rework dispatch functions/indices tables lookup

From: Emil Velikov Rather than checking if the function name maps to a valid entry in the respective table, just create a dummy entry at the end of each table. This allows us to remove some unnessesary "index >= 0" checks, which get executed quite often.

Re: [Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

On 05/11/2016 05:37 PM, Axel Davy wrote: On 11/05/2016 23:31, Leo Liu wrote: On 05/11/2016 05:18 PM, Axel Davy wrote: On 11/05/2016 23:08, Leo Liu wrote: scrn->next_msc = ((int64_t)stamp - scrn->last_ust + scrn->ns_frame/2) / + scrn->ns_frame + scrn->last_msc;

Re: [Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

On 05/11/2016 05:18 PM, Axel Davy wrote: On 11/05/2016 23:08, Leo Liu wrote: scrn->next_msc = ((int64_t)stamp - scrn->last_ust + scrn->ns_frame/2) / + scrn->ns_frame + scrn->last_msc; Could you explain this calculation ? ns_frame is the time for vsync in ns. last_ust

[Mesa-dev] [PATCH] Integrate precise trig into configuration infrastructure

With this change, to enable precise SIN and COS instructions on Intel hardware, one can put in the proper drirc file. V2: Make option name more generic --- src/mesa/drivers/dri/common/xmlpool/t_options.h | 5 + src/mesa/drivers/dri/i965/brw_compiler.c| 2 --

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 --- Comment #5 from Ilia Mirkin --- The trace replays fine on i965 (SKL) but incorrectly on llvmpipe, at commit 2655265 as well as on 11.2.2. BTW, those "used uninitialized warnings" are hardly always accurate. They can

Re: [Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

On 11/05/2016 23:08, Leo Liu wrote: scrn->next_msc = ((int64_t)stamp - scrn->last_ust + scrn->ns_frame/2) / + scrn->ns_frame + scrn->last_msc; Could you explain this calculation ? I think it may get issues if ns_frame is wrong. For example for some reason (app hidden

Re: [Mesa-dev] [PATCH 12/23] i965/fs: fix pull constant load component selection for doubles

Samuel Iglesias Gonsálvez writes: > On Tue, 2016-05-10 at 21:06 -0700, Francisco Jerez wrote: >> Samuel Iglesias Gonsálvez writes: >> >> > >> > From: Iago Toral Quiroga >> > >> > UNIFORM_PULL_CONSTANT_LOAD is used to load a

Re: [Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

On 11/05/2016 23:31, Leo Liu wrote: On 05/11/2016 05:18 PM, Axel Davy wrote: On 11/05/2016 23:08, Leo Liu wrote: scrn->next_msc = ((int64_t)stamp - scrn->last_ust + scrn->ns_frame/2) / + scrn->ns_frame + scrn->last_msc; Could you explain this calculation ? ns_frame

Re: [Mesa-dev] [PATCH v5] Add .mailmap

On Wednesday, May 11, 2016 12:16:41 PM PDT Jason Ekstrand wrote: > Is there a reason this never got merged? I'm up for just landing it now > and letting people fix up names as needed. > --Jason Sounds good to me. Jason, why don't you go ahead and push it then? --Ken signature.asc

Re: [Mesa-dev] [PATCH 05/18] winsys/amdgpu: add amdgpu_cs_has_user_fence

On Tue, May 10, 2016 at 1:21 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 11 +++ > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH v5] Add .mailmap

On Wed, May 11, 2016 at 2:16 PM, Kenneth Graunke wrote: > On Wednesday, May 11, 2016 12:16:41 PM PDT Jason Ekstrand wrote: > > Is there a reason this never got merged? I'm up for just landing it now > > and letting people fix up names as needed. > > --Jason > > Sounds

Re: [Mesa-dev] [PATCH 02/14] vl/dri3: implement dri3 screen create and destroy

On 11/05/2016 17:06, Leo Liu wrote: Screen created with device fd returned from X server, also will bail out to DRI2 with certain conditions. Signed-off-by: Leo Liu --- configure.ac | 7 ++- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 88

Re: [Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

On 05/11/2016 04:16 PM, Axel Davy wrote: Hi, The present extension has something exactly to set the target ust for the presentation: PresentOptionUST Unfortunately, while it is in the spec it looks like the option is totally ignored, and thus it will be totally buggy (you are supposed to

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 --- Comment #6 from Michel Dänzer --- (In reply to Christopher W. Carpenter from comment #4) > I'm not sure if this changes anything as far as assigning it to mesa core, > but my laptop running the i915 driver with mesa

Re: [Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

Hi Axel Is the thread_submit=true only for nine or does it work with all of DRI3? I'm keen to get rid of the tearing on my Skylake/Tonga setup Thanks Mike On Wed, 11 May 2016 at 16:57 Axel Davy wrote: > Hi, > > Do you have some local branch to review all at once (it is a

[Mesa-dev] GBM backend dynamic dispatch method

Hi guys, Let me introduce myself. My name is Qiang Yu, I'm a developer of amdgpu-pro driver. As you know the amdgpu-pro adopts some open source part like GBM but due to its close source OGL part, we implement our own GBM backend. Currently libgbm only support static selection of GBM backend

Re: [Mesa-dev] Add OpenSWR to GL3.txt?

In lieu of GL3.txt being updated, is there some way for me to get an idea about what OpenSWR supports without digging through the code / building tests? FWIW, as an outsider I use mesamatrix to get a very nice overview on what the different renderers support. I consider that valuable. On Wed,

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 Médéric Boquien changed: What|Removed |Added CC||mboqu...@free.fr --

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 --- Comment #8 from Ilia Mirkin --- First bad draw call in the referenced trace is 803513, I believe. That ends up with the "bad" earth - the S3TC texture of the earth doesn't appear to be making it on there. -- You are

Re: [Mesa-dev] Add OpenSWR to GL3.txt?

https://people.freedesktop.org/~imirkin/glxinfo/glxinfo.html When swr makes it into a release, I'll be sure to add it in. This shows what extensions each hardware group has. Note that this isn't necessarily 1:1 with driver - a single driver might support several iterations of hardware, and

[Mesa-dev] [PATCH] docs: Mark GL_OES_shader_io_blocks as started

From: Ian Romanick Watch the oes_shader_io_blocks of my fd.o Mesa GIT repo for progress. Signed-off-by: Ian Romanick --- docs/GL3.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index

[Mesa-dev] [Bug 95346] Stellaris - Black/super dark planets

https://bugs.freedesktop.org/show_bug.cgi?id=95346 --- Comment #7 from Ilia Mirkin --- Replaying on nvc0 also brings up the same issue. So the current status is llvmpipe: fail nvc0: fail radeonsi: fail (i assume, otherwise we wouldn't have this bug) i965/SKL: success

Re: [Mesa-dev] [PATCH 13/14] vl/dri3: implement functions for get and set timestamp

Hi Axel, Just clarify something you might got misunderstand on vl implementation perspective. >The present extension has something exactly to set the target ust for the presentation: PresentOptionUST >Unfortunately, while it is in the spec it looks like the option is totally ignored, and

Re: [Mesa-dev] [PATCH v2] i965/blorp: Special-case the clear color in MSAA resolves

On Wed, May 11, 2016 at 10:42 PM, Jason Ekstrand wrote: > The current MSAA resolve code has a special-case for if the MCS value is 0. > In this case we can only sample once because we know that all values are in > slice 0. This commit adds a second optimization that detecs

[Mesa-dev] [PATCH 4/5] anv: Port L3 cache programming from i965

Signed-off-by: Jordan Justen --- src/intel/vulkan/Makefile.sources | 4 + src/intel/vulkan/anv_genX.h| 4 +- src/intel/vulkan/anv_pipeline.c| 33 ++- src/intel/vulkan/anv_private.h | 12 +- src/intel/vulkan/gen7_cmd_buffer.c | 94 +--

[Mesa-dev] [PATCH 0/5] anv: Port L3 cache programming from i965

git://people.freedesktop.org/~jljusten/mesa anv-l3-v1 This series is related to this bug: https://bugs.freedesktop.org/show_bug.cgi?id=94468 Since we have a work-around for that bug currently, this doesn't fix it. It does allow us to remove the work-around though. Running through jenkins, I

[Mesa-dev] [PATCH 5/5] Revert "HACK: Don't re-configure L3$ in render stages pre-BDW"

From: Jordan Justen This reverts commit 41af9b2e517dd0c17e519490ca915b96f6898390. --- src/intel/vulkan/genX_cmd_buffer.c | 11 --- 1 file changed, 11 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c

[Mesa-dev] [PATCH 1/5] genxml/hsw: Add L3 cache control registers

These were added to the i965 driver in 5912da45a69923afa1b7f2eb5bb371d848813c41. Signed-off-by: Jordan Justen --- src/intel/genxml/gen75.xml | 8 1 file changed, 8 insertions(+) diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index

[Mesa-dev] [PATCH 2/5] anv: Keep track of whether the data cache should be enabled in L3

If images or shader buffers are used, we will enable the data cache in the the L3 config. Signed-off-by: Jordan Justen --- src/intel/vulkan/anv_pipeline.c | 8 +++- src/intel/vulkan/anv_private.h | 1 + src/intel/vulkan/genX_pipeline.c | 2 ++ 3 files changed,

[Mesa-dev] [PATCH 3/5] anv/gen7: Add memory barrier to vkCmdWaitEvents call

We also have this barrier call for gen8 vkCmdWaitEvents. We don't implement waiting on events for gen7 yet, but this barrier at least helps to not regress CTS cases when data caching is enabled. Without this, the tests would intermittently report a failure when the data cache was enabled.

[Mesa-dev] [PATCH v2] i965/blorp: Special-case the clear color in MSAA resolves

The current MSAA resolve code has a special-case for if the MCS value is 0. In this case we can only sample once because we know that all values are in slice 0. This commit adds a second optimization that detecs the magic MCS value that indicates the clear color and grabs the color from a push

Re: [Mesa-dev] Add OpenSWR to GL3.txt?

Typically, if you expose the cap bits so that support for some extension is announced you'd consider it done. That does not necessarily mean that all the corresponding piglit tests are passing, but of course you should generally not announce support for features which don't really work (but you

Re: [Mesa-dev] [PATCH] i965/blorp: Special-case the clear color in MSAA resolves

I need to recind this patch. I thought it worked but it's far more half-baked than I realized. There's some issue with swizzles interacting with the clear color. :-( --Jason On Tue, May 10, 2016 at 9:45 PM, Jason Ekstrand wrote: > The current MSAA resolve code has a

Re: [Mesa-dev] [PATCH 00/14] vl dri3 support for vaapi and vdpau

Another comment: What would solve your DRI_PRIME issues would also be dma-buf fences. While I believe thread_submit should be a bit better (because it avoids a card stall waiting for another card to finish), dma-buf fences make the two cards synchronize rendering properly. I don't know much of

Re: [Mesa-dev] [PATCH 12/23] i965/fs: fix pull constant load component selection for doubles

On 11/05/16 22:46, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> On Tue, 2016-05-10 at 21:06 -0700, Francisco Jerez wrote: >>> Samuel Iglesias Gonsálvez writes: >>> From: Iago Toral Quiroga

Re: [Mesa-dev] [PATCH 12/59] i965: add brw_imm_df

On 11/05/16 22:30, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> On 11/05/16 05:56, Francisco Jerez wrote: >>> Samuel Iglesias Gonsálvez writes: >>> From: Connor Abbott v2 (Iago) -

[Mesa-dev] [PATCH] i965/blorp: Do not skip fast color clear with new color

This hasn't been visible before. It showed up with lossless compression with: dEQP-GLES3.functional.fbo.color.repeated_clear.sample.tex2d.rgb8 Current fast clear logic kicks color resolves even for gpu sampling. In the test case this results into trashing of the fast color clear state between

Re: [Mesa-dev] [PATCH 15/23] i965/fs: add SHUFFLE_32BIT_LOAD_RESULT_TO_64BIT_DATA helper

Francisco Jerez writes: > Iago Toral writes: > >> On Tue, 2016-05-10 at 19:10 -0700, Francisco Jerez wrote: >>> Samuel Iglesias Gonsálvez writes: >>> >>> > From: Iago Toral Quiroga >>> > >>> > There are a few

Re: [Mesa-dev] [PATCH 04/11] i965: Add new intel_set_texture_image_mt() helper

On Wed, May 11, 2016 at 12:22:37PM -0700, Kristian H?gsberg wrote: > From: Kristian Høgsberg Kristensen > > This factors out the work of setting up a miptree as the backing for a > texture image into a new helper. > --- > src/mesa/drivers/dri/i965/intel_tex_image.c | 69 >

[Mesa-dev] [PATCH v2] i965/fs: half exec_size when dealing with 64 bits attributes

The HW has a restriction that only vertical stride may cross register boundaries. Until now this was only handled on VGRFs at rw_reg_from_fs_reg, but it is also needed for attributes. v2: * Remove reference to commit id on commit message (Juan Suarez) * Simplify code that compute final

[Mesa-dev] [PATCH] gallium/radeon: Rename gart_page_size member to bo_alignment

From: Michel Dänzer This should make its meaning clearer. The value it holds is the CPU page size, which can be different from the GART page size. Signed-off-by: Michel Dänzer --- src/gallium/drivers/r300/r300_query.c | 4 +--

Re: [Mesa-dev] [PATCH 03/23] i965/fs: Fix copy propagation of load payload for double operands

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 10/05/16 22:41, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> From: Iago Toral Quiroga >> >> Specifically, consider the size of the data type of the operand >> to compute the number

[Mesa-dev] [PATCH] i965: Avoid extraneous fast depth clears

From: Chia-I Wu When the depth buffer is already cleared, skip GEN6_HIZ_OP_DEPTH_CLEAR. This is made possible by tracking which slices have been cleared in "struct intel_mipmap_level". The hiz_cleared flag is unset when the depth buffer is rendered to or when a HiZ resolve is

Re: [Mesa-dev] [PATCH 15/28] i965/blorp: Add a param array to prog_data

On Tue, May 10, 2016 at 04:16:35PM -0700, Jason Ekstrand wrote: > This array allows the push constants to be re-arranged on upload. The > actual arrangement will, eventually, come from the back-end compiler. > --- > src/mesa/drivers/dri/i965/brw_blorp.c | 4 >

Re: [Mesa-dev] [PATCH 02/23] i965/fs: fix copy propagation from sources with stride 0

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 10/05/16 22:57, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> From: Iago Toral Quiroga >> >> We should not offset into them based on the relative offset of >> our source and the

[Mesa-dev] [PATCH] i965: Drop BRW_NEW_BLORP from stipple and line parameter packets.

BLORP never touches these, and they're all non-pipelined. Some are fairly large packets as well. I haven't tried to benchmark this; the effect is likely to be small. However, we may as well stop the pointless papercuts; maybe they'll add up someday. Signed-off-by: Kenneth Graunke

Re: [Mesa-dev] [PATCH] i965: Drop BRW_NEW_BLORP from stipple and line parameter packets.

On Wed, May 11, 2016 at 12:07:26AM -0700, Kenneth Graunke wrote: > BLORP never touches these, and they're all non-pipelined. Some > are fairly large packets as well. > > I haven't tried to benchmark this; the effect is likely to be small. > However, we may as well stop the pointless papercuts;

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