See the commit meesage for patch 5/5.
Chad Versace (5):
intel: Temporarily disable HiZ for textures
intel: Define intel_miptree_create_for_renderbuffer()
intel: Kill intel_framebuffer_get_hiz_region()
intel: Move inline functions from intel_fbo.h to intel_fbo.c
intel: Replace
A great refactor thrashing begins after this commit. Removing code for
texture HiZ will make that refactoring easier.
HiZ was broken for textures anyway, so there's no regression here.
Signed-off-by: Chad Versace c...@chad-versace.us
---
src/mesa/drivers/dri/intel/intel_fbo.c | 62
This function creates a miptree that is suitable as the storage for
a non-texture renderbuffer.
This commit is prerequisite for replacing intel_renderbuffer::region with
a miptree.
Signed-off-by: Chad Versace c...@chad-versace.us
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 21
.
Without this patch, it is indeed possible to implement the above, but the
code would be more difficult to work with.
In addition, intel_mipmap_tree::hiz_region will also be replaced with
a miptree by a future commit.
No Piglit regressions on gen6.
Signed-off-by: Chad Versace c...@chad-versace.us
= NULL.
To avoid regressing gen7, we need to copy the s8 bits in
irb-wrapped_stencil-Data into irb-wrapped_depth-Data, then unmap
irb-wrapped_stencil and set rb-Data = irb-wrapped_depth-Data.
- --
Chad Versace
c...@chad-versace.us
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On 10/28/2011 04:58 PM, Chad Versace wrote:
This patch will break depthstencil renderbuffers on gen7. Comments below.
On 10/28/2011 12:49 PM, Eric Anholt wrote:
---
src/mesa/drivers/dri/intel/intel_span.c | 33
files changed, 113 insertions(+), 73 deletions(-)
create mode 100644 src/glsl/Makefile.sources
For patches 1 and 2,
Reviewed-by: Chad Versace c...@chad-versace.us
--
Chad Versace
c...@chad-versace.us
___
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|5 +
1 files changed, 5 insertions(+), 0 deletions(-)
This fixes a bug with the Android Gingerbread home screen and application menu.
Tested-by: Chad Versace c...@chad-versace.us
- --
Chad Versace
c...@chad-versace.us
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When glFramebufferTexture2D(attachment=GL_DEPTH_STENCIL_ATTACHMENT) was
the texture was attached only to the depth attachment point and not
the stencil attachment. So this series provides a test and a fix.
piglit
Chad Versace (1):
mesa: Fix
glFramebufferTexture(attachment
Add the following tests:
specs/ARB_framebuffer_object/same-attachment-glFramebufferRenderbuffer-GL_DEPTH_STENCIL_ATTACHMENT
specs/ARB_framebuffer_object/same-attachment-glFramebufferTexture2D-GL_DEPTH_STENCIL_ATTACHMENT
The test check that if an object is attached to the
-GL_DEPTH_STENCIL
Signed-off-by: Chad Versace c...@chad-versace.us
---
src/mesa/main/fbobject.c | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index c56062a..8d69fdf 100644
--- a/src/mesa/main/fbobject.c
unnecessary confusion.
--
Chad Versace
c...@chad-versace.us
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http://lists.freedesktop.org/mailman/listinfo/mesa-dev
for stable release branches.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/ir_constant_expression.cpp |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
Simple enough.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
-
Chad Versace
chad.vers
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The MapRenderbuffer work introduced a lot depthstencil bugs on gen7, which
uses separate stencil.
Once these patches get committed, I'll post the long-awaited HiZ series.
Chad Versace (6):
intel: Refactor intel_map_renderbuffer()
intel: Fix
Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 390 +---
1 files changed, 256 insertions(+), 134 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel
/depthstencil-default_fb-drawpixels-FLOAT-and-USHORT
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c |6 --
src/mesa/drivers/dri/intel/intel_span.c |4 ++--
2 files changed, 6 insertions(+), 4 deletions
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 150 +++-
1 files changed, 149 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index 2a78edf
explanation, so I'll spare you...). This patch removes
the override code.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_vtbl.c| 19 -
src/mesa/drivers/dri/intel/intel_span.c | 66
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On 11/14/2011 01:55 PM, Eric Anholt wrote:
On Sun, 13 Nov 2011 22:32:13 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
For a depthstencil buffer with separate stencil,
intel_renderbuffer::region is null. (The regions are kept in hidden
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On 11/14/2011 02:05 PM, Eric Anholt wrote:
On Sun, 13 Nov 2011 22:32:14 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
This patch fixes three interrelated bugs.
Fixes many depthstencil Piglit tests on gen7, too many to list.
1. Don't
-BEGIN PGP SIGNED MESSAGE-
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On 11/15/2011 06:16 PM, Eric Anholt wrote:
On Sun, 13 Nov 2011 22:32:15 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
In intel_map_renderbuffer_s8(), detile and copy the stencil buffer into
the temporary buffer only if the renderbuffer
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On 11/15/2011 06:17 PM, Eric Anholt wrote:
On Tue, 15 Nov 2011 08:06:34 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
-BEGIN PGP SIGNED MESSAGE-
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On 11/14/2011 04:03 PM, Eric Anholt wrote:
On Mon, 14 Nov 2011 14:29
The special stencil span accessors, as set by intel_span_init_funcs.
perform software W detiling. Since intel_renderbuffer_map() now uses
MapRenderbuffer, rb-Data points to an *untiled* stencil buffer.
Fixes several Piglit tests on gen7.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad
() is implemented with MapRenderbuffer(),
overriding _mesa_update_framebuffer's introduces bugs. This patch
removes the override code.
Fixes several Piglit tests on gen7.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_vtbl.c
(),
some of the scattered stencil bits would be invalid.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 52 ---
1 files changed, 20 insertions(+), 32 deletions(-)
diff --git a/src/mesa
() that allocates a HiZ buffer when attaching a depth
texture to a framebuffer.
HiZ was broken for textures anyway, so there's no regression here.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 62 ++--
1 files
The only user of intel_framebuffer_get_hiz_region() was
intel_framebuffer_has_hiz(). So I folded the body of the former into the
latter.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.h | 20 +++-
1 files changed, 3 insertions
the situation where
each header transitively includes every other header.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 19 +++
src/mesa/drivers/dri/intel/intel_fbo.h | 21 -
2 files changed, 23 insertions(+), 17
This function creates a miptree that is suitable as storage for
a non-texture renderbuffer.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 21 +
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 15
textures.
As a nice benefit, this lays down some preliminary groundwork for easily
texturing from any renderbuffer, even those of the window system.
A future commit will replace intel_mipmap_tree::hiz_region with a miptree.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers
the
corresponding slice of the stencil miptree. The easiest way to do this
will be to call intel_miptree_copy_slice() recursively. Analogous
reasoning applies to copying a slice of a depth miptree with HiZ.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel
Remove 'slices'.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 17 -
src/mesa/drivers/dri/intel/intel_fbo.c | 12 ---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 44 +++
src
by the renderbuffer.
The buffer resolve operations, to be introduced in the future, require
these fields in order to resolve the correct slice in the miptree.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 24
src/mesa/drivers
there were
no texture image. Such situations will occur during the HiZ meta-op and
during scatter/gather of separate stencil textures.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 16 +++-
src/mesa/drivers/dri/intel
This is a small helper function that asserts that a given level and layer
are valid for a miptree. I will be extensively using it in the future
miptree HiZ functions.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 13
?). So, while
I was mucking around, I also renamed the functions.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 113 +++-
1 files changed, 81 insertions(+), 32 deletions(-)
diff --git a/src/mesa/drivers/dri/intel
texture.
2. Upload data into (level=x1,layer=y1).
3. Upload data into (level=x2,layer=y2).
4. Read and test stencil data at (level=x1, layer=y1).
5. Read and test stencil data at (level=x2, layer=y2).
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri
This is required to correctly implement HiZ for mipmapped and
multi-layered textures.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_misc_state.c |5 +++--
src/mesa/drivers/dri/intel/intel_context.c | 20 ++--
src/mesa
Remove the following functions:
i830_hiz_resolve_noop
i915_hiz_resolve_noop
brw_hiz_resolve_noop
My original strategy for how intel-vtbl.resolve_*buffer was used has
substantially changed. The above functions are no longer called in the
current strategy.
Signed-off-by: Chad Versace
Now that intel_renderbuffer::region has been replaced with a miptree, the
HiZ functions region parameter must be replaced with a miptree parameter.
Change the return type from bool to void.
Rename the 'depth' parameter to 'layer', because it will correspond to
irb-mt_layer.
Signed-off-by: Chad
This is a map of miptree slices to needed resolves, implemented as
a linked list. A future commit will embed such a list in
intel_mipmap_tree.
If you think I'm crazy to put a list in a miptree, read the Doxygen in
this patch for intel_resolve_map.
Signed-off-by: Chad Versace chad.vers
This is a map of miptree slices to needed resolves.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
b
Add functions that
- set a miptree slice as needing a resolve
- resolve a single slice of a miptree
- resolve all slices of a miptree
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 118 +++-
src/mesa
Add the following functions:
intel_renderbuffer_resolve_hiz
intel_renderbuffer_resolve_depth
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 63
src/mesa/drivers/dri/intel/intel_fbo.h | 31
brw_context::hiz contains state needed to perform HiZ meta-ops and
indicates if a HiZ operation is currently in progress.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 35 +++
1 files changed, 35 insertions
Some state batches also need to be manipulated. That's done in the next
commit.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/gen6_hiz.c | 305 +-
1 files changed, 303 insertions(+), 2 deletions(-)
diff --git a/src/mesa
A lot of the state manipulation is handled by the meta-op state setup.
However, some batches need manual intervention.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c |9 -
src/mesa/drivers/dri/i965/gen6_clip_state.c | 17
Before emitting primitives in brw_try_draw_prims(), resolve the depth
buffer's HiZ buffer and resolve the depth buffer of each enabled depth
texture.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c | 73 ++
1
Factor the mapping loops from intelSpanRenderStart() into
intel_span_map_buffers(). This in preparation for the next commit,
which resolves the buffers before mapping.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_span.c | 41
Resolve all buffers that will be mapped by intelSpanRenderStart. This
comprises resolving the depth buffer of each enabled texture and of the
read and draw buffers.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_span.c | 40
After brw_try_draw_prims() emits a batch, mark that the depth buffer needs
a depth resolve if the buffer was written to and if it has an accompanying
HiZ buffer.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c | 23 +++
1
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 21 -
1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
b/src/mesa/drivers/dri/intel
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_tex.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_tex.c
b/src/mesa/drivers/dri/intel/intel_tex.c
index 505e617..9884a57 100644
--- a/src
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index 5b2a7ac..0b6b227 100644
--- a/src
When a depth texture is first attached to framebuffer, allocate a HiZ
miptree for it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel
This allows us to replace all the calls to
intel_get_texture_alignment_unit() with a single call at miptree creation.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 26 +++
src/mesa/drivers/dri/intel
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_defines.h |9 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |8 ++--
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
For depthstencil renderbuffers, we were using separate stencil only if the
hardware required it. Since the performance gains from HiZ is so high, we
should always use separate stencil if the hardware supports it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri
Regresses one Piglit test: glean/fbo.
I'm not enabling HiZ for gen7 yet because it causes a mysterious
performance regression.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_screen.c |8 ++--
1 files changed, 2 insertions(+), 6 deletions
I found the line of code that breaks the test, but don't know how to
easily fix it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/18/2011 12:04 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:35 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
Essentially, this patch just globally substitutes `irb-region` with
`irb-mt-region` and then does some minor cleanups
fails.
- Fix double semicolon.
- Fix miptree reference leaks in the following functions:
intel_process_dri2_buffer_with_separate_stencil()
intel_image_target_renderbuffer_storage()
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_misc_state.c |5 +++--
src/mesa/drivers/dri/intel/intel_context.c | 23 +--
src/mesa/drivers/dri/intel/intel_fbo.c | 11 +++
src/mesa/drivers/dri/intel
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/18/2011 12:22 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:38 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
- For GL_TEXTURE_3D, it is the texture's depth at each miplevel. It's
value, like width and height, varies
file a bug report for this at the Freedesktop Bugzilla.
https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa
That way we can have a permanent record of the bug and track it
more easily.
-
Chad Versace
chad.vers...@linux.intel.com
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invocation is `:set list`.
Also, could you share that test with us?
-
Chad Versace
chad.vers...@linux.intel.com
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Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
iQIcBAEBAgAGBQJOxtjzAAoJEAIvNt057x8iR2EQAJsNSps6eJ
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/18/2011 03:19 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:43 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
For depthstencil textures using separate stencil, we embedded a stencil
buffer in intel_texture_image. The intention
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/18/2011 03:24 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:44 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
This is required to correctly implement HiZ for mipmapped and
multi-layered textures.
Signed-off-by: Chad Versace
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/18/2011 03:27 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:47 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
This is a map of miptree slices to needed resolves, implemented as
a linked list. A future commit will embed
On 11/18/2011 03:42 PM, Kenneth Graunke wrote:
On 11/17/2011 07:58 PM, Chad Versace wrote:
Extract the body of the inner loop into a new function,
intel_miptree_copy_slice().
This is in preparation for adding support for separate stencil and HiZ to
intel_miptree_copy_teximage(). When copying
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/18/2011 03:55 PM, Kenneth Graunke wrote:
On 11/18/2011 01:52 PM, Chad Versace wrote:
[snip]
@@ -335,23 +338,18 @@ intel_miptree_get_image_offset(struct
intel_mipmap_tree *mt,
GLuint level, GLuint face, GLuint
] In intel_miptree_get_image_offset(), replace bizarre `face 0`
condition with the more sensible `mt-target == GL_TEXTURE_CUBE_MAP`.
Reviewed-by: Eric Anholt e...@anholt.net
CC: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri
...@whitecape.org
Reviewed-by: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_fbo.c | 37 +++
src/mesa/drivers/dri/intel/intel_fbo.h | 17 ++
2 files changed, 49 insertions(+), 5 deletions
On 11/18/2011 05:03 PM, Eric Anholt wrote:
On Fri, 18 Nov 2011 12:50:36 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
Essentially, this patch just globally substitutes `irb-region` with
`irb-mt-region` and then does some minor cleanups to avoid segfaults
and other problems
read the value from that.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_draw.c |9 -
src/mesa/drivers/dri/i965/gen6_clip_state.c | 17 +
src/mesa/drivers/dri/i965
On 11/18/2011 04:37 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:55 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
Before emitting primitives in brw_try_draw_prims(), resolve the depth
buffer's HiZ buffer and resolve the depth buffer of each enabled depth
texture.
Signed-off
On 11/21/2011 11:27 AM, Chad Versace wrote:
On 11/18/2011 05:03 PM, Eric Anholt wrote:
On Fri, 18 Nov 2011 12:50:36 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
Essentially, this patch just globally substitutes `irb-region` with
`irb-mt-region` and then does some minor cleanups
:
gen6_clip_state
gen6_depth_stencil_state
gen6_sf_state
gen6_wm_state
CC: Eric Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.h |2 ++
src/mesa/drivers/dri/i965/brw_draw.c |9
On 11/18/2011 05:19 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:58:54 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
To do so, we must resolve all buffers on entering a glBegin/glEnd block.
For the detailed explanation, see the Doxygen comments in this patch.
Signed-off-by: Chad
Anholt e...@anholt.net
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.c | 66 +++
1 files changed, 66 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965
On 11/18/2011 05:36 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:59:02 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
When a depth texture is first attached to framebuffer, allocate a HiZ
miptree for it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa
On 11/18/2011 05:43 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:59:04 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_defines.h |9 +
src/mesa/drivers/dri/i965
On 11/18/2011 05:55 PM, Eric Anholt wrote:
On Thu, 17 Nov 2011 19:59:08 -0800, Chad Versace
chad.vers...@linux.intel.com wrote:
I found the line of code that breaks the test, but don't know how to
easily fix it.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa
``_mesa_is_depth_format(...) ||
_mesa_is_depthstencil_format(...)`` with explcitit checks against
GL_DEPTH_COMPONENT and GL_DEPTH_STENCIL.
CC: Eric Anholt e...@anholt.net
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa
in _mesa_error() call to silence warning (cherry
picked from commit 5485192fc81ab40ffdbfb1c74346d887c3c03231) (2011-11-21
19:49:48 +0100)
are available in the git repository at:
git://people.freedesktop.org/~chadversary/mesa.git 7.11-proposed
Chad Versace (3):
intel: Simplify stencil detiling
To each switch statement in s_texfilter.c, add a break statement to the
default case.
Eliminates the Eclipse static analysis warning: No break at the end of
this case.
Signed-off-by: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/swrast/s_texfilter.c |9 +
1 files changed, 9
logic in emit_depthbuffer(),
which reverse-engineered the format from the bpp, did so?
-
Chad Versace
chad.vers...@linux.intel.com
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On 11/28/2011 01:32 PM, Daniel Vetter wrote:
And warn loudly in case people want to use it. Too many tester report
gpu hangs on irc and we rootcause this ...
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
Yes! This eliminate some future bug reports too.
Reviewed-by: Chad Versace
-TextureFormatSupported[MESA_FORMAT_X8_Z24] = true;
+ ctx-TextureFormatSupported[MESA_FORMAT_Z16] = true;
}
bool
I grepped around, and it looks like this is really all that is needed.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
-
Chad Versace
chad.vers...@linux.intel.com
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;
ctx-Extensions.ARB_fragment_program_shadow = true;
I think you need to update intel_mesa_format_to_rb_datatype() too. intel_fbo.c
relies on that function.
-
Chad Versace
chad.vers...@linux.intel.com
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(((stencil_irb-Base.Width - 1) 6) |
+ (stencil_irb-Base.Height - 1) 19);
-
Chad Versace
chad.vers...@linux.intel.com
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non-NULL or the stencil test always fails thanks to separate
stencil inheriting the surface type of depth.
Fixes hiz-depth-stencil-test-d0-s8.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
-
Chad Versace
chad.vers...@linux.intel.com
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/intel_mipmap_tree.c |6 --
2 files changed, 14 insertions(+), 4 deletions(-)
This looks right to me.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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to squash this hunk into the previous patch. But the hunk
is
unnecessary anyway, because it just adds redundant parens.
With this hunk removed, the patch is
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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+ * intel_tex_image_map()/unmap of the slice.
+ */
+ struct intel_miptree_map *map;
} *slice;
};
This comment needs doxygenation.
Otherwise, looks good.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 19 ++
src/mesa/drivers/dri/intel/intel_tex.c | 58 +++--
3 files changed, 109 insertions(+), 48 deletions(-)
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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Version
++--
1 files changed, 71 insertions(+), 49 deletions(-)
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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+---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 86 ++-
2 files changed, 112 insertions(+), 113 deletions(-)
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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+-
src/mesa/drivers/dri/intel/intel_regions.h |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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(+), 121 deletions(-)
I like this improvement.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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