Hi!
What about implementing more generic access to ADIv5 and APB-AP?
I see it like this but what gurus have in mind?
From 5e3072d911f89184d159232c0f410c0252161a25 Mon Sep 17 00:00:00 2001
From: Yauheni Kaliuta y.kali...@gmail.com
Date: Tue, 13 Oct 2009 12:47:05 +0300
Subject: [PATCH] More
Without looking deeply (lot of other work the coming weeks) I think this
is good, but I would like it in a separate file(module). Called
adiv5_component, adiv5_debug or coresight_component ??
So the adiv5 code talks to the MEMAP registers but does not handle the
memory mapped components that are
Hi!
On Tue, Oct 13, 2009 at 1:28 PM, Magnus Lundin lun...@mlu.mine.nu wrote:
Without looking deeply (lot of other work the coming weeks) I think this
is good, but I would like it in a separate file(module). Called
adiv5_component, adiv5_debug or coresight_component ??
So the adiv5 code talks
Yauheni Kaliuta wrote:
Hi!
On Tue, Oct 13, 2009 at 1:28 PM, Magnus Lundin lun...@mlu.mine.nu wrote:
Without looking deeply (lot of other work the coming weeks) I think this
is good, but I would like it in a separate file(module). Called
adiv5_component, adiv5_debug or coresight_component
On Tuesday 13 October 2009, Magnus Lundin wrote:
The actual debug comonents are specified in the ArmV7A TRM and Cortex A8
TRM.
Not for Cortex M3 they aren't! :)
(Which doesn't negate your point that the ADI arch doc doesn't
specify those components; it does highlight *why* the arch doc
isn't
