[Openocd-development] [PATCH 3/5] CortexA8: Implement debug base autodetection
Implement autodetection of debug base. Also, implement a function solving
various hardware quirks (like iMX51 ROM Table location bug).
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
src/target/cortex_a8.c | 28 +---
1 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 8b4ced5..d090fe4 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -73,7 +73,6 @@ static int cortex_a8_get_ttb(struct target *target, uint32_t
*result);
*/
#define swjdp_memoryap 0
#define swjdp_debugap 1
-#define OMAP3530_DEBUG_BASE 0x54011000
/*
* Cortex-A8 Basic debug access, very low level assumes state is saved
@@ -1702,6 +1701,19 @@ static int cortex_a8_handle_target_request(void *priv)
return ERROR_OK;
}
+static const char *variant = NULL;
+
+void cortex_a8_debug_base_fixup(struct adiv5_dap *dap, int apsel,
+ uint32_t *dbgbase, uint32_t *apid)
+{
+ /* Various CPU-specific quirks */
+
+ /* iMX51 misreports ROM Table address */
+ if ((variant != NULL) (strcmp(variant, imx51) == 0))
+ if (*dbgbase != 0x)
+ *dbgbase = 0x6000;
+}
+
/*
* Cortex-A8 target information and configuration
*/
@@ -1714,20 +1726,22 @@ static int cortex_a8_examine_first(struct target
*target)
int i;
int retval = ERROR_OK;
uint32_t didr, ctypr, ttypr, cpuid;
-
- /* stop assuming this is an OMAP! */
- LOG_DEBUG(TODO - autoconfigure);
-
- /* Here we shall insert a proper ROM Table scan */
- armv7a-debug_base = OMAP3530_DEBUG_BASE;
+ uint32_t dbgbase, apid, base;
/* We do one extra read to ensure DAP is configured,
* we call ahbap_debugport_init(swjdp) instead
*/
+ variant = target-variant;
+ swjdp-debug_base_fixup = cortex_a8_debug_base_fixup;
retval = ahbap_debugport_init(swjdp);
if (retval != ERROR_OK)
return retval;
+ cortex_a8_debug_base_fixup(swjdp, 0, dbgbase, apid);
+
+ dap_lookup_cs_component(swjdp, 0, dbgbase, 0x15, base);
+ armv7a-debug_base = base;
+
retval = mem_ap_read_atomic_u32(swjdp, armv7a-debug_base +
CPUDBG_CPUID, cpuid);
if (retval != ERROR_OK)
return retval;
--
1.7.2.3
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Re: [Openocd-development] [PATCH 3/5] CortexA8: Implement debug base autodetection
#define swjdp_memoryap 0
#define swjdp_debugap 1
For Cortex-A8 it's likely not SWJ-DP but
instead JTAG-DP ... regardless it's best
not to try exposing irrelevant details
like that in naming conventions here...
+static const char *variant = NULL;
variant is never changed but ...
...
+
uint32_t *dbgbase, uint32_t *apid)
+{
+ /* Various CPU-specific quirks */
+
+ /* iMX51 misreports ROM Table address
... and surely that can be detected, and then
handled in a better way.
*/
+ if ((variant != NULL)
(strcmp(variant, imx51) == 0))
... here we assume ight might be ...
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Re: [Openocd-development] [PATCH 3/5] CortexA8: Implement debug base autodetection
On Sunday 31 October 2010 10:49:54 David Brownell wrote:
#define swjdp_memoryap 0
#define swjdp_debugap 1
For Cortex-A8 it's likely not SWJ-DP but
instead JTAG-DP ... regardless it's best
not to try exposing irrelevant details
like that in naming conventions here...
+static const char *variant = NULL;
variant is never changed but ...
...
+
uint32_t *dbgbase, uint32_t *apid)
+{
+/* Various CPU-specific quirks */
+
+/* iMX51 misreports ROM Table address
... and surely that can be detected, and then
handled in a better way.
*/
+if ((variant != NULL)
(strcmp(variant, imx51) == 0))
... here we assume ight might be ...
What I'd be more interested is
1) Is this approach to detection correct
2) Is the placement of the fixup function in adiv5_dap structure correct
3) Placing the variant into adiv5_dap would fix the above, but I don't like
the
idea ... so where to place it so it can be used from within the fixup function?
Cheers
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