Re: [Pixman] Basic infrastructure for MIPS architecture and initial set of SRC routines.

2012-02-25 Thread Søren Sandmann
I have merged the patches to master.

Thanks,
Soren


Nemanja Lukic nlu...@mips.com writes:

 Per previous code review:

 Run time detection is changed so that MIPS 74K instead of MIPS 74Kc string
 is searched in /proc/cpuinfo. I used 74Kc as search string, since all boards I
 have, although Kf (like 24Kf, 34Kf, 74Kf, 1004Kf) had in their name Kc with 
 FPU
 string added, like this (where pure Kc cores don't have that FPU part):
  - MIPS 24Kc V7.12  FPU V0.0
 Added macros for LEAF/END declarations for the assembler functions:
  - LEAF_MIPS32R2 that declares entry point of MIPS32r2 function (like memcpy).
  - LEAF_MIPS_DSPR2 that declares entry point of DSPr2 function.
  - END is the same for both function types.
 -mdspr2 CFLAG is not forced for MIPS optimizations, and now it is not needed
 for the succesfull build.

 Best Regards,
 Nemanja Lukic
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[Pixman] Basic infrastructure for MIPS architecture and initial set of SRC routines.

2012-02-21 Thread Nemanja Lukic

Per previous code review:

Run time detection is still there (per Siarhei's comments), uses /proc/cpuinfo,
but now properly detects DSPr2 extensions and 32 byte cache line size (both are
true only for MIPS 74Kc cores).
  - Currently only 74Kc core is available that supports DSPr2.
  - In the future, when M14KE, 1074Kc cores (and others) become available we
can add those also to the search string.
-mdspr2 compiler flag is automatically enabled for MIPS platforms. It can be
disabled at configure time for chips that doesn't support it.

Best Regards,
Nemanja Lukic
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Re: [Pixman] Basic infrastructure for MIPS architecture and initial set of SRC routines.

2012-02-21 Thread Siarhei Siamashka
On Tue, Feb 21, 2012 at 4:59 PM, Nemanja Lukic nlu...@mips.com wrote:

 Per previous code review:

 Run time detection is still there (per Siarhei's comments), uses 
 /proc/cpuinfo,
 but now properly detects DSPr2 extensions and 32 byte cache line size (both 
 are
 true only for MIPS 74Kc cores).
  - Currently only 74Kc core is available that supports DSPr2.
  - In the future, when M14KE, 1074Kc cores (and others) become available we
    can add those also to the search string.

One practical problem is that my MIPS router has the following line in
/proc/cpuinfo:
cpu model   : MIPS 74K V4.0

Yes, unfortunately this router does not run a mainline kernel, but
searching for MIPS 74K instead of MIPS 74Kc could be used as a
workaround. As an additional bonus, it could also match MIPS 74Kf.

 -mdspr2 compiler flag is automatically enabled for MIPS platforms. It can be
 disabled at configure time for chips that doesn't support it.

Apparently this is not enough to ensure a successful build:

$ ./autogen.sh  ./configure --disable-shared  make V=99

snip

checking whether to use MMX intrinsics... no
checking whether to use SSE2 intrinsics... no
checking whether to use VMX/Altivec intrinsics... no
checking whether to use ARM SIMD assembler... no
checking whether to use ARM NEON assembler... no
checking whether to use ARM IWMMXT intrinsics... no
checking whether to use MIPS DSPr2 assembler... yes
checking whether to use GNU-style inline assembler... yes

snip

libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I.. -g -O2 -Wall
-fno-strict-aliasing -fvisibility=hidden -MT pixman-utils.lo -MD -MP
-MF .deps/pixman-utils.Tpo -c pixman-utils.c -o pixman-utils.o
mv -f .deps/pixman-utils.Tpo .deps/pixman-utils.Plo
/bin/sh ../libtool  --tag=CC   --mode=compile gcc -DHAVE_CONFIG_H -I.
-I.. -mdspr2 -g -O2 -Wall -fno-strict-aliasing -fvisibility=hidden
-MT libpixman_mips_dspr2_la-pixman-mips-dspr2.lo -MD -MP -MF
.deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Tpo -c -o
libpixman_mips_dspr2_la-pixman-mips-dspr2.lo `test -f
'pixman-mips-dspr2.c' || echo './'`pixman-mips-dspr2.c
libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I.. -mdspr2 -g -O2 -Wall
-fno-strict-aliasing -fvisibility=hidden -MT
libpixman_mips_dspr2_la-pixman-mips-dspr2.lo -MD -MP -MF
.deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Tpo -c
pixman-mips-dspr2.c -o libpixman_mips_dspr2_la-pixman-mips-dspr2.o
Assembler messages:
Warning: mips1 ISA does not support DSP ASE
Warning: mips1 ISA does not support DSP R2 ASE
mv -f .deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Tpo
.deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Plo
/bin/sh ../libtool--mode=compile gcc -DHAVE_CONFIG_H -I. -I..
-g -O2 -mdspr2 -MT pixman-mips-dspr2-asm.lo -MD -MP -MF
.deps/pixman-mips-dspr2-asm.Tpo -c -o pixman-mips-dspr2-asm.lo
pixman-mips-dspr2-asm.S
libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I.. -g -O2 -mdspr2 -MT
pixman-mips-dspr2-asm.lo -MD -MP -MF .deps/pixman-mips-dspr2-asm.Tpo
-c pixman-mips-dspr2-asm.S -o pixman-mips-dspr2-asm.o
Assembler messages:
Warning: mips1 ISA does not support DSP ASE
Warning: mips1 ISA does not support DSP R2 ASE
pixman-mips-dspr2-asm.S:70: Error: opcode not supported on this
processor: mips1 (mips1) `ext $9,$8,0x3,0x5'
pixman-mips-dspr2-asm.S:116: Error: opcode not supported on this
processor: mips1 (mips1) `ext $10,$8,0x2,0x3'
pixman-mips-dspr2-asm.S:146: Error: opcode not supported on this
processor: mips1 (mips1) `pref 0,32($5)'
pixman-mips-dspr2-asm.S:164: Error: opcode not supported on this
processor: mips1 (mips1) `pref 30,32($4)'
make[2]: *** [pixman-mips-dspr2-asm.lo] Error 1


This issue can be resolved by adding the following directives to the
assembly files, so that adding extra compiler flags is not even
needed:

.set arch=mips32r2
.set dspr2

And for pixman-mips-memcpy-asm.S just using .set arch=mips32 is
enough (it does not use any DSP instructions).

-- 
Best regards,
Siarhei Siamashka
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Re: [Pixman] Basic infrastructure for MIPS architecture and initial set of SRC routines.

2012-02-21 Thread Matt Turner
On Tue, Feb 21, 2012 at 1:05 PM, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
 On Tue, Feb 21, 2012 at 4:59 PM, Nemanja Lukic nlu...@mips.com wrote:

 Per previous code review:

 Run time detection is still there (per Siarhei's comments), uses 
 /proc/cpuinfo,
 but now properly detects DSPr2 extensions and 32 byte cache line size (both 
 are
 true only for MIPS 74Kc cores).
  - Currently only 74Kc core is available that supports DSPr2.
  - In the future, when M14KE, 1074Kc cores (and others) become available we
    can add those also to the search string.

 One practical problem is that my MIPS router has the following line in
 /proc/cpuinfo:
    cpu model           : MIPS 74K V4.0

 Yes, unfortunately this router does not run a mainline kernel, but
 searching for MIPS 74K instead of MIPS 74Kc could be used as a
 workaround. As an additional bonus, it could also match MIPS 74Kf.

 -mdspr2 compiler flag is automatically enabled for MIPS platforms. It can be
 disabled at configure time for chips that doesn't support it.

 Apparently this is not enough to ensure a successful build:

 $ ./autogen.sh  ./configure --disable-shared  make V=99

 snip

 checking whether to use MMX intrinsics... no
 checking whether to use SSE2 intrinsics... no
 checking whether to use VMX/Altivec intrinsics... no
 checking whether to use ARM SIMD assembler... no
 checking whether to use ARM NEON assembler... no
 checking whether to use ARM IWMMXT intrinsics... no
 checking whether to use MIPS DSPr2 assembler... yes
 checking whether to use GNU-style inline assembler... yes

 snip

 libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I.. -g -O2 -Wall
 -fno-strict-aliasing -fvisibility=hidden -MT pixman-utils.lo -MD -MP
 -MF .deps/pixman-utils.Tpo -c pixman-utils.c -o pixman-utils.o
 mv -f .deps/pixman-utils.Tpo .deps/pixman-utils.Plo
 /bin/sh ../libtool  --tag=CC   --mode=compile gcc -DHAVE_CONFIG_H -I.
 -I..     -mdspr2 -g -O2 -Wall -fno-strict-aliasing -fvisibility=hidden
 -MT libpixman_mips_dspr2_la-pixman-mips-dspr2.lo -MD -MP -MF
 .deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Tpo -c -o
 libpixman_mips_dspr2_la-pixman-mips-dspr2.lo `test -f
 'pixman-mips-dspr2.c' || echo './'`pixman-mips-dspr2.c
 libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I.. -mdspr2 -g -O2 -Wall
 -fno-strict-aliasing -fvisibility=hidden -MT
 libpixman_mips_dspr2_la-pixman-mips-dspr2.lo -MD -MP -MF
 .deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Tpo -c
 pixman-mips-dspr2.c -o libpixman_mips_dspr2_la-pixman-mips-dspr2.o
 Assembler messages:
 Warning: mips1 ISA does not support DSP ASE
 Warning: mips1 ISA does not support DSP R2 ASE
 mv -f .deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Tpo
 .deps/libpixman_mips_dspr2_la-pixman-mips-dspr2.Plo
 /bin/sh ../libtool    --mode=compile gcc -DHAVE_CONFIG_H -I. -I..
 -g -O2 -mdspr2 -MT pixman-mips-dspr2-asm.lo -MD -MP -MF
 .deps/pixman-mips-dspr2-asm.Tpo -c -o pixman-mips-dspr2-asm.lo
 pixman-mips-dspr2-asm.S
 libtool: compile:  gcc -DHAVE_CONFIG_H -I. -I.. -g -O2 -mdspr2 -MT
 pixman-mips-dspr2-asm.lo -MD -MP -MF .deps/pixman-mips-dspr2-asm.Tpo
 -c pixman-mips-dspr2-asm.S -o pixman-mips-dspr2-asm.o
 Assembler messages:
 Warning: mips1 ISA does not support DSP ASE
 Warning: mips1 ISA does not support DSP R2 ASE
 pixman-mips-dspr2-asm.S:70: Error: opcode not supported on this
 processor: mips1 (mips1) `ext $9,$8,0x3,0x5'
 pixman-mips-dspr2-asm.S:116: Error: opcode not supported on this
 processor: mips1 (mips1) `ext $10,$8,0x2,0x3'
 pixman-mips-dspr2-asm.S:146: Error: opcode not supported on this
 processor: mips1 (mips1) `pref 0,32($5)'
 pixman-mips-dspr2-asm.S:164: Error: opcode not supported on this
 processor: mips1 (mips1) `pref 30,32($4)'
 make[2]: *** [pixman-mips-dspr2-asm.lo] Error 1


 This issue can be resolved by adding the following directives to the
 assembly files, so that adding extra compiler flags is not even
 needed:

 .set arch=mips32r2
 .set dspr2

How does this affect compiling with -march=mips64{,r2}, assuming that
there are mips64 CPUs with DSPr2?

All this seem like a ton of work to deal with the unsolved problem of
mips runtime testing. Wouldn't it be simpler to just have the
configure test fail if you're not compiling with the needed CFLAGS?
Any distro wanting maximum compatibility is going to compile with
mips1, which is incompatible with DSPr2.
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Re: [Pixman] Basic infrastructure for MIPS architecture and initial set of SRC routines.

2012-02-21 Thread Siarhei Siamashka
On Tue, Feb 21, 2012 at 8:24 PM, Matt Turner matts...@gmail.com wrote:
 How does this affect compiling with -march=mips64{,r2}, assuming that
 there are mips64 CPUs with DSPr2?

It will likely either build without DSPr2 optimizations (by failing
the DSPr2 configure test), or fail the compilation itself. Somebody
will have to fix this.

But IMHO a much worse scenario would be successful compilation for
MIPS64 hardware with DSPr2 support and =64 byte cache line. The
unique feature of PrepareForStore prefetch is that it can clear the
whole cache line to zero on a cache miss. With at least two potential
runtime problems to watch out for:
1. The code assumes that doing prefetch 32 bytes before the end of the
buffer is safe and uses it, but happens to erase some data beyond it.
2. The code assumes that doing prefetch 32 bytes ahead of the
previously written data is safe, but we get a context switch
immediately before the prefetch instruction, some other process
thrashes the cache, and after resuming the execution prefetch
instruction erases some earlier processed data.

 All this seem like a ton of work to deal with the unsolved problem of
 mips runtime testing.

Sure. But if nobody takes care of fixing the kernel, the problem will
remain unsolved.

 Wouldn't it be simpler to just have the
 configure test fail if you're not compiling with the needed CFLAGS?
 Any distro wanting maximum compatibility is going to compile with
 mips1, which is incompatible with DSPr2.

Yes, it is a somewhat acceptable solution (if we forget about the
PrepareForStore prefetch for a moment). Though pixman DSPr2 optimized
code will not have any chance to provide any speedup in such distros.

-- 
Best regards,
Siarhei Siamashka
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