-Original Message-
From: peter.crosthwa...@petalogix.com
[mailto:peter.crosthwa...@petalogix.com] On Behalf Of Peter Crosthwaite
Sent: Tuesday, December 10, 2013 4:19 PM
To: Paolo Bonzini
Cc: Anthony Liguori; qemu-sta...@nongnu.org; qemu-devel@nongnu.org
Developers; Andreas Färber;
Hello,
would someone please have a look at this.
On 2013-11-28 11:27, Sebastian Huber wrote:
The LEON3 processor has support for the CASA instruction which is
normally only available for SPARC V9 processors. Binutils 2.24
and GCC 4.9 will support this instruction for LEON3. GCC uses it to
So calling spice server to start/stop the worker goes
hand in hand with the status variable update.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
ui/spice-core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/ui/spice-core.c b/ui/spice-core.c
index 0c48156..4cce3b3
Hard reset can happen at any time. We should be able to put qxl into a
known-good state no matter what. Stop spice server thread for reset so
it can't be confused by fetching stale commands lingering around in the
rings while we reset is ongoing.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
ui/spice-core.c| 16
ui/spice-display.c | 17 -
2 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/ui/spice-core.c b/ui/spice-core.c
index 9fb9544..0c48156 100644
--- a/ui/spice-core.c
+++
On 12/03/2013 02:30 PM, Alexey Kardashevskiy wrote:
Hi!
This is some cleanup. Please, comment. Thanks!
Ping, anyone?
Changes:
v5:
* cleanup
* removed cpustate::kvm_cpu_id
* split into 2 patches - new PPC API and the usage of the API
Alexey Kardashevskiy (2):
target-ppc: add
On 12/03/2013 02:45 PM, Alexey Kardashevskiy wrote:
On 11/25/2013 02:14 PM, Alexey Kardashevskiy wrote:
This fixes a bug in patch#1 and mistype in patch#2, details are in
the commit messages.
Alexey Kardashevsksy (1):
spapr: make sure RMA is in first mode of first memory node
Paul
On Mo, 2013-12-09 at 21:33 -0200, Eduardo Habkost wrote:
The default machine-type (pc-i440fx-2.0) now requires bios-256k.bin, but
make install isn't installing it, so qemu-system-x86_64 won't run out
of the box. Add it to BLOBS so it gets installed.
Reviewed-by: Gerd Hoffmann kra...@redhat.com
On Mon, Dec 09, 2013 at 04:02:09PM +0200, Michael S. Tsirkin wrote:
On Mon, Dec 09, 2013 at 01:36:54PM +0100, Stefan Hajnoczi wrote:
On Fri, Dec 06, 2013 at 03:44:33PM +0100, Vincenzo Maffione wrote:
- This patch is against the net-next tree
(https://github.com/stefanha/qemu.git)
On 10 December 2013 06:41, Sergey Fedorov s.fedo...@samsung.com wrote:
Current implementation is not accurate according to ARMv7-AR reference
manual. See B4.1.153 TTBCR, Translation Table Base Control Register,
VMSA | TTBCR format when using the Long-descriptor translation table
format. When
This patch is a prerequisite for the following up TrustZone support patches.
Thanks.
Best regards,
Sergey Fedorov
On 12/10/2013 12:57 PM, Peter Maydell wrote:
On 10 December 2013 06:41, Sergey Fedorov s.fedo...@samsung.com wrote:
Current implementation is not accurate according to ARMv7-AR
On Mon, Dec 09, 2013 at 03:55:00PM +0200, Michael S. Tsirkin wrote:
On Mon, Dec 09, 2013 at 01:42:30PM +0100, Stefan Hajnoczi wrote:
So the effect of batching should be relatively small on latency. In
fact, it's almost like sendmmsg(2)/recvmmsg(2) but using a
one-packet-at-a-time
Il 10/12/2013 08:32, Alexey Kardashevskiy ha scritto:
As suffixes do not make sense for sPAPR's device tree and
there is no way to filter them out on the BusState::get_fw_dev_path
level, let's add an ability for the external caller to specify
whether to apply suffixes or not.
Signed-off-by:
Am 10.12.2013 um 04:18 hat Wenchao Xia geschrieben:
于 2013/12/7 1:22, Kevin Wolf 写道:
bs-buffer_alignment is set by the device emulation and contains the
logical block size of the guest device. This isn't something that the
block layer should know, and even less something to use for
On Mo, 2013-12-09 at 11:49 +0100, Paolo Bonzini wrote:
Il 09/12/2013 11:24, Michael S. Tsirkin ha scritto:
Both are in my PCI tree.
git://github.com/mstsirkin/qemu.git doesn't have it, are you missing a
push?
My tree is here:
Kevin,
The patch was verified and it solves the problem on Windows 7 official release
as well.
Thanks!
Gal.
- Original Message -
From: Kevin O'Connor ke...@koconnor.net
To: Gerd Hoffmann kra...@redhat.com
Cc: Gal Hammer gham...@redhat.com, seabios seab...@seabios.org,
On Sun, Dec 08, 2013 at 05:38:15PM +0800, Liu Ping Fan wrote:
I see the open of 2.0 development window, and rebase V8 with a small fix
v9:
use PC_Q35_1_8_MACHINE_OPTIONS in pc_q35_machine_v1_8
v8:
make piix/q35 compat diverge
simplify the code, use hpet_irqs to pass intcap value
Am 09.12.2013 um 17:41 hat Luiz Capitulino geschrieben:
On Mon, 9 Dec 2013 17:23:09 +0100
Kevin Wolf kw...@redhat.com wrote:
I'm leaning slightly towards the approach that Benoît took, if only for
the naming aspect (that is, I also thought of the idea of a bool flag,
but didn't
Am 09.12.2013 um 17:41 hat Benoît Canet geschrieben:
Le Monday 09 Dec 2013 à 17:24:09 (+0100), Kevin Wolf a écrit :
Am 05.12.2013 um 18:15 hat Benoît Canet geschrieben:
Signed-off-by: Benoit Canet ben...@irqsave.net
---
blockdev.c | 13 +
hmp.c| 2 +-
peter.mayd...@linaro.org writes:
On 9 December 2013 06:36, Xin Tong trent.t...@gmail.com wrote:
Is it possible for QEMU to obviate some of the translations by attaching a
signature (e.g. a hash) with every translated basic block and try to reuse
translated basic block based on the signature
Hi,
sorry for my ignorance but I can not find the way how to set up
usb (or hci) passthrough for arm-softmmu target.
Is it even possible?
If not, then I would like to add something like that.
I'm asking in case of somebody si already working on it.
BR.
/Honza
On 10 December 2013 10:20, Jan Petrouš jan.petr...@tieto.com wrote:
Hi,
sorry for my ignorance but I can not find the way how to set up
usb (or hci) passthrough for arm-softmmu target.
Is it even possible?
You don't say which ARM board model you're trying to use.
Many of them don't have an
On Tue, 10 Dec 2013 08:23:34 +0100
Paolo Bonzini pbonz...@redhat.com wrote:
Il 27/11/2013 01:27, Igor Mammedov ha scritto:
Adds option to -m
mem - startup memory amount
For compatibility with legacy CLI if suffix-less number is passed,
it assumes amount in Mb.
Otherwise user is
Hi Peter.
On 10 December 2013 11:35, Peter Maydell peter.mayd...@linaro.org wrote:
On 10 December 2013 10:20, Jan Petrouš jan.petr...@tieto.com wrote:
Hi,
sorry for my ignorance but I can not find the way how to set up
usb (or hci) passthrough for arm-softmmu target.
Is it even
On 9 December 2013 22:37, Richard Henderson r...@twiddle.net wrote:
Retain the existing gen_aa32_* inlines, to aid compilation for A64.
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Richard Henderson r...@twiddle.net
--
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
and
On Mon, 14 Oct 2013 18:01:20 +0300
Michael S. Tsirkin m...@redhat.com wrote:
Add support for acpi pci hotplug using the
new infrastructure.
PIIX4 legacy interface is maintained as is for
machine types 1.6 and older.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
On 10 December 2013 10:53, Jan Petrouš jan.petr...@tieto.com wrote:
Well, for start I would be happy with any arm model working this way :)
My intention is to fix that on RasPi model. But for that I would like
to be sure it is even possible or if it need more work (what is also
not problem
fixes regression caused by commit
ac86048 trace: Remove trace.h from console.h (less dependencies)
which makes build fail with:
hw/display/qxl-render.c: In function ‘qxl_blit’:
hw/display/qxl-render.c:34:5: error: implicit declaration of function
‘trace_qxl_render_blit’
Hi
Please, send any topic that you are interested in covering.
Thanks, Juan.
PD. Sorry for the last notice, but have been on holidays, and really
disconnected and forgot about this call :-(
Call details:
10:00 AM to 11:00 AM EDT
Every two weeks
If you need phone number details, contact
On 10 December 2013 10:53, Jan Petrouš jan.petr...@tieto.com wrote:
Hi Peter.
On 10 December 2013 11:35, Peter Maydell peter.mayd...@linaro.org wrote:
On 10 December 2013 10:20, Jan Petrouš jan.petr...@tieto.com wrote:
Hi,
sorry for my ignorance but I can not find the way how to set up
On Sun, Dec 01, 2013 at 02:02:23PM +0200, Marcel Apfelbaum wrote:
Every address space has its own nodes and sections, but
it uses the same global arrays of nodes/section.
This limits the number of devices that can be attached
to the guest to 20-30 devices. It happens because:
- The
On Mon, 2013-12-02 at 15:23 +0100, Paolo Bonzini wrote:
This avoids useless masking and shifting when a single call to the
MemoryRegion ops will do. It cuts 30 cycles off the common case
of memory dispatch (out of ~150).
Paolo Bonzini (4):
memory: cache min/max_access_size
memory:
On 12/10/2013 02:15 AM, Alexander Graf wrote:
On 22.07.2013, at 18:00, Fabien Chouteau chout...@adacore.com wrote:
This implementation doesn't include ring priority, TCP/IP Off-Load, QoS.
Signed-off-by: Fabien Chouteau chout...@adacore.com
Thanks, applied to ppc-next. Could you please
Hello,
On Wed, Dec 4, 2013 at 9:00 PM, Michael S. Tsirkin m...@redhat.com wrote:
On Fri, Nov 29, 2013 at 08:52:26PM +0100, Antonios Motakis wrote:
Each ioctl request of vhost-kernel has a vhost-user message equivalent,
which is sent it over the control socket.
The general approach is to
I‘m wondering why can't I build qemu successful, I have found the first bad
commit with git bisect.
I'm a novice to qemu, I hope I will help you to fix some bugs.
Who can introduce some documents to me for the preparing.
Faithfully yours
Kewei Yu
Address : Room 4-308, Building FIT of Tsinghua
Now that the memory API is thread-safe, we can use it in
virtio-blk-dataplane and replace hostmem.[ch]. This series does this,
and also changes the vring API to use VirtQueueElement (with an eye
towards migration). With this change, virtio-blk-dataplane is also safe
against memory hot-unplug.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hw/virtio/dataplane/vring.c | 113
1 file changed, 51 insertions(+), 62 deletions(-)
diff --git a/hw/virtio/dataplane/vring.c b/hw/virtio/dataplane/vring.c
index 351a343..8294f36 100644
---
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hw/block/dataplane/virtio-blk.c | 1 +
hw/virtio/dataplane/vring.c | 34 +-
2 files changed, 22 insertions(+), 13 deletions(-)
diff --git a/hw/block/dataplane/virtio-blk.c b/hw/block/dataplane/virtio-blk.c
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hw/virtio/dataplane/Makefile.objs | 2 +-
hw/virtio/dataplane/hostmem.c | 183 --
hw/virtio/dataplane/vring.c | 78 +--
include/hw/virtio/dataplane/hostmem.h | 58 ---
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hw/block/dataplane/virtio-blk.c | 85 ++---
hw/virtio/dataplane/vring.c | 56 +++-
include/hw/virtio/dataplane/vring.h | 7 ++-
3 files changed, 72 insertions(+), 76 deletions(-)
Igor Mammedov imamm...@redhat.com writes:
fixes regression caused by commit
ac86048 trace: Remove trace.h from console.h (less dependencies)
which makes build fail with:
hw/display/qxl-render.c: In function ‘qxl_blit’:
hw/display/qxl-render.c:34:5: error: implicit declaration of function
On Tue, 2013-12-10 at 13:49 +0200, Michael S. Tsirkin wrote:
On Sun, Dec 01, 2013 at 02:02:23PM +0200, Marcel Apfelbaum wrote:
Every address space has its own nodes and sections, but
it uses the same global arrays of nodes/section.
This limits the number of devices that can be attached
Il 10/12/2013 12:42, Juan Quintela ha scritto:
Hi
Please, send any topic that you are interested in covering.
May not need a phone call, but I'll drop it here: what happened to
acknowledgement emails from the patches script?
Also, Anthony, it looks like you're still adjusting to the new
Il 10/12/2013 13:37, Marcel Apfelbaum ha scritto:
Beside this it looks OK, the branch does not compile and I couldn't look into
it more...
Can you please also merge my other patch
memory.c: bugfix - ref counting mismatch in memory_region_find ?
Regarding the compilation issue, I suggest
On 10.12.2013, at 12:59, Alexey Kardashevskiy a...@ozlabs.ru wrote:
On 12/10/2013 02:15 AM, Alexander Graf wrote:
On 22.07.2013, at 18:00, Fabien Chouteau chout...@adacore.com wrote:
This implementation doesn't include ring priority, TCP/IP Off-Load, QoS.
Signed-off-by: Fabien Chouteau
On Tue, 2013-12-10 at 13:38 +0100, Paolo Bonzini wrote:
Il 10/12/2013 13:37, Marcel Apfelbaum ha scritto:
Beside this it looks OK, the branch does not compile and I couldn't look
into it more...
Can you please also merge my other patch
memory.c: bugfix - ref counting mismatch in
Paolo Bonzini pbonz...@redhat.com writes:
Il 10/12/2013 12:42, Juan Quintela ha scritto:
Hi
Please, send any topic that you are interested in covering.
May not need a phone call, but I'll drop it here: what happened to
acknowledgement emails from the patches script?
Also, Anthony, it
Signed-off-by: Kevin Wolf kw...@redhat.com
---
qapi-schema.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi-schema.json b/qapi-schema.json
index 8630eb5..cec892e 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -949,7 +949,7 @@
# (only present if
On Wed, Dec 04, 2013 at 03:58:49PM +0800, Wanlong Gao wrote:
Signed-off-by: Wanlong Gao gaowanl...@cn.fujitsu.com
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
--
Eduardo
On 12/10/2013 06:02 AM, Kevin Wolf wrote:
Signed-off-by: Kevin Wolf kw...@redhat.com
---
qapi-schema.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Eric Blake ebl...@redhat.com
I grepped the tree for any other instance of '1\.8' and didn't find any
suspicious usage
CCing libvir-list.
On Wed, Dec 04, 2013 at 03:58:50PM +0800, Wanlong Gao wrote:
If the total number of the assigned numa nodes memory is not
equal to the assigned ram size, it will write the wrong data
to ACPI talb, then the guest will ignore the wrong ACPI table
and recognize all memory to
Il 28/11/2013 11:26, Michael S. Tsirkin ha scritto:
On Mon, Nov 25, 2013 at 06:43:13PM +0100, Paolo Bonzini wrote:
v2: condition enablement of new mapping to new machine types (Paolo)
v3: fix changelog
v4: rebase
v5: ensure alignment of piecetwo on 2MB GPA (Igor)
do not register
On 9 December 2013 23:33, Eduardo Habkost ehabk...@redhat.com wrote:
The default machine-type (pc-i440fx-2.0) now requires bios-256k.bin, but
make install isn't installing it, so qemu-system-x86_64 won't run out
of the box. Add it to BLOBS so it gets installed.
Signed-off-by: Eduardo Habkost
On Dec 8, 2013, at 12:30 PM, Peter Maydell wrote:
The guest might want to be able to use the command key for its won
purposes (as command if it is MacOS X, or for the Windows key if
it is a PC guest, for instance). In line with other UI frontends,
pass it through if the guest has mousegrab,
On 12/09/2013 08:17 PM, Stefan Hajnoczi wrote:
On Mon, Dec 09, 2013 at 02:06:21PM +0800, jun muzi wrote:
If mount a local file(disk) in two different dirctories, it is similar to the
network storage. Detecting identical files is still a problem.
Such as:
dd if=/dev/zero of=aa bs=1M count=10
r...@twiddle.net writes:
On 12/09/2013 10:12 AM, Peter Maydell wrote:
+static void do_gpr_ld(DisasContext *s, TCGv_i64 dest, TCGv_i64 tcg_addr,
+ int size, bool is_signed, bool extend)
+{
snip
Likewise, combine all of this with tcg_gen_qemu_ld_i64.
Cool, that cleans
r...@twiddle.net writes:
On 12/09/2013 10:12 AM, Peter Maydell wrote:
snip
+if (wback) {
+if (postindex) {
+tcg_gen_addi_i64(tcg_addr, tcg_addr, offset - (1 size));
+} else {
+tcg_gen_subi_i64(tcg_addr, tcg_addr, 1 size);
+}
Perhaps
On Tue, 10 Dec 2013 10:57:50 +0100
Kevin Wolf kw...@redhat.com wrote:
Am 09.12.2013 um 17:41 hat Luiz Capitulino geschrieben:
On Mon, 9 Dec 2013 17:23:09 +0100
Kevin Wolf kw...@redhat.com wrote:
I'm leaning slightly towards the approach that Benoît took, if only
for
the
r...@twiddle.net writes:
On 12/09/2013 10:12 AM, Peter Maydell wrote:
From: Alex Bennée alex.ben...@linaro.org
snip
+static TCGv_i64 read_cpu_reg_sp(DisasContext *s, int reg, int sf)
+{
+TCGv_i64 v = new_tmp_a64(s);
+if (sf) {
+tcg_gen_mov_i64(v, cpu_X[reg]);
+}
r...@twiddle.net writes:
On 12/09/2013 10:12 AM, Peter Maydell wrote:
From: Alex Bennée alex.ben...@linaro.org
This adds support for the load/store forms using a register offset.
snip
+/*
+ * C3.3.10 Load/store (register offset)
+ *
+ * 31 30 29 27 26 25 24 23 22 21 20 16 15 13
On Di, 2013-12-10 at 06:42 +0100, Stefan Weil wrote:
Am 10.12.2013 05:05, schrieb Dave Airlie:
Hi,
This is a repost of the latest SDL2 UI layer along with virtio-gpu,
I've merged the SDL2 base and multi-head patches into one, and I've split
out the display notifiers stuff and the sdl2
Am 10.12.2013 um 15:06 hat Luiz Capitulino geschrieben:
On Tue, 10 Dec 2013 10:57:50 +0100
Kevin Wolf kw...@redhat.com wrote:
Am 09.12.2013 um 17:41 hat Luiz Capitulino geschrieben:
On Mon, 9 Dec 2013 17:23:09 +0100
Kevin Wolf kw...@redhat.com wrote:
I'm leaning slightly
Hi all,
I've been running my OpenBIOS test suite on a recent git (commit a1d22a)
and have encountered a QEMU process segfault in 2 out of 3 of my NetBSD
5.0.2 boot attempts. Does anyone have an idea what could be causing
this? Other OSs don't seem to be affected.
Hi,
The biggest changes were in the input handling, where SDL2 has done a major
overhaul, and I've had to include a generated translation file to get from
SDL2 codes back to qemu compatible ones. I'm still not sure how the keyboard
layout code works in qemu, so there may be further work if
Vishant Singh vishant.si...@toshiba-tsip.com wrote:
Hi,
I would like to discuss about RHEV VM creation and domain joining.
Is it possible? It would be great If you can direct me to right
contact if you are not.
What is RHEVM V creation?
I guess you want to ask on a...@ovirt.org? This call
On 10 December 2013 14:24, Mark Cave-Ayland
mark.cave-ayl...@ilande.co.uk wrote:
I've been running my OpenBIOS test suite on a recent git (commit a1d22a) and
have encountered a QEMU process segfault in 2 out of 3 of my NetBSD 5.0.2
boot attempts. Does anyone have an idea what could be causing
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Rename this variable for consistency with the above defined mptimerdev
variable.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
Message-id:
From: Edgar E. Iglesias edgar.igles...@xilinx.com
We were updating the ownership bit of all descriptors if packets
get split and written through several descriptors.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Cadence GEM has a MAC level loopback mode. Implement. Use the same basic
operation as the already implemented PHY loopback.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Message-id:
8f8c2bfb15f40fb5f0d5766aa4cd3d54c596de6a.1386136219.git.peter.crosthwa...@xilinx.com
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
hw/net/cadence_gem.c | 1
From: Will Newton will.new...@linaro.org
Add floatnn_minnum() and floatnn_maxnum() functions which are equivalent
to the minNum() and maxNum() functions from IEEE 754-2008. They are
similar to min() and max() but differ in the handling of QNaN arguments.
Signed-off-by: Will Newton
From: Richard Henderson r...@twiddle.net
Retain the existing gen_aa32_* inlines, to aid compilation for A64.
Cc: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Richard Henderson r...@twiddle.net
Message-id: 1386628626-21627-1-git-send-email-...@twiddle.net
Signed-off-by: Peter Maydell
From: Will Newton will.new...@linaro.org
This adds support for the ARMv8 floating point VMAXNM and VMINNM
instructions.
Signed-off-by: Will Newton will.new...@linaro.org
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
Message-id: 1386158099-9239-6-git-send-email-will.new...@linaro.org
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Currently this just floods indicating that can_receive has been called
by the net framework. Instead, save the result of the most recent
can_receive callback as state and only print a message if the result
changes (indicating some sort of
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Return false from can_receive() when no valid buffer descriptor is
available. Ensures against mass packet droppage in some applications.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Message-id:
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Bit 27 of the RX buffer desc word 1 should be set when the packet was
accepted due to specific address register match. Implement.
This feature is absent from the Xilinx documentation (UG585) but the
behaviour is tested as accurate on real
From: Will Newton will.new...@linaro.org
The nan_exp argument is not used, so remove it.
Signed-off-by: Will Newton will.new...@linaro.org
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
Message-id: 1386158099-9239-4-git-send-email-will.new...@linaro.org
Signed-off-by: Peter Maydell
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether the written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.
Signed-off-by: Peter Crosthwaite
Provide versions of the KVM PSCI constants to non-KVM code;
this will allow us to avoid an ifdef in boards which set up
a PSCI node in the device tree.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
Message-id:
From: Will Newton will.new...@linaro.org
This adds support for the ARMv8 Advanced SIMD VMAXNM and VMINNM
instructions.
Signed-off-by: Will Newton will.new...@linaro.org
Message-id: 1386158099-9239-7-git-send-email-will.new...@linaro.org
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
From: Will Newton will.new...@linaro.org
This adds support for the VSEL floating point selection instruction
which was added in ARMv8.
Signed-off-by: Will Newton will.new...@linaro.org
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
Message-id:
Linux requires device tree CPU nodes to include a 'compatible'
string describing the CPU. Add a field in the ARMCPU struct for
this so that boards which construct a device tree can insert
the correct CPU nodes.
Note that there is currently no officially specified 'compatible'
string for the
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
The ARM A9 MPCore has a timer that is global to all cores in the cluster.
The timer is shared but each core has a private independent comparator
and interrupt.
Based on version contributed by Francois LEGAL.
Signed-off-by: François LEGAL
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
Bytes_to_copy was being updated before its final use where it
advances the rx buffer pointer. This was causing total mayhem,
where packet data for any subsequent fragments was being fetched
from the wrong place.
Reported-by: Deepika Dhamija
From: Will Newton will.new...@linaro.org
Floating point is an extension to the instruction set rather than
a coprocessor, so call it directly from the ARM and Thumb decode
functions.
Signed-off-by: Will Newton will.new...@linaro.org
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
Message-id:
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
The minimum packet size is 64, however this is before FCS stripping
occurs. So when FCS stripping the minimum packet size is 60. Fix.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
From: Jan Petrous jan.petr...@tieto.com
Linux kernel from version 3.4 requires CM_REFCNT register for sched timer
for Integrator/CP board (integrator_defconfig).
See http://infocenter.arm.com/help/topic/com.arm.doc.dui0138e/ch04s06s11.html
Signed-off-by: Jan Petrous jan.petr...@tieto.com
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
There was a replication of the rx descriptor address walking logic.
Reorder the flow control to remove. This refactoring also obsoletes
the local variables packet_desc_addr and last_desc_addr.
Signed-off-by: Peter Crosthwaite
Device trees created with create_device_tree() may not have any
entries in their reservemap, because the FDT API requires that the
reservemap is completed before any FDT nodes are added, and
create_device_tree() itself creates a node. However we were not
calling fdt_finish_reservemap(), which
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
The various Rx packet address matching mode flags were not being set in
the rx descriptor. Implement.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Message-id:
Support -cpu host in virt machine (treating it like an A15, ie
with a GIC v2 and the A15's private peripherals.)
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
Message-id: 1385140638-10444-12-git-send-email-peter.mayd...@linaro.org
8f84271da83c0e9f92aa7c1c2d0d3875bf0a5cb8:
target-mips: Use macro ARRAY_SIZE where possible (2013-12-09 16:44:04 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20131210
for you to fetch changes up to 74f1c6ddec8dc7566d9b75574bb006214cc7d3b4:
target-arm
There are a number of places where it would be convenient for ARM
code to have working definitions of KVM constants even in code
which is compiled with CONFIG_KVM not set. In this situation we
can't simply include the kernel KVM headers (which might conflict
with host header definitions or not
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
The Specific address registers can be enabled or disabled by software.
QEMU was assuming they were always enabled. Implement the
disable/enable feature. SARs are disabled by writing to the lower half
register. They are re-enabled by then
Add 'virt' platform support corresponding to arch/arm/mach-virt
in the Linux kernel tree. This has no platform-specific code but
can use any device whose kernel driver is is able to work purely
from a device tree node. We use this to instantiate a minimal
set of devices: a GIC and some virtio-mmio
From: Peter Crosthwaite peter.crosthwa...@xilinx.com
This has no real hardware analog and asserting correctness of DMA
addresses is not a perhiperal level problem. Delete.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Message-id:
On Tue, Dec 10, 2013 at 4:54 AM, Markus Armbruster arm...@redhat.com wrote
Paolo Bonzini pbonz...@redhat.com writes:
Il 10/12/2013 12:42, Juan Quintela ha scritto:
Hi
Please, send any topic that you are interested in covering.
May not need a phone call, but I'll drop it here: what
Instead of assuming that a KVM target CPU must always be a
Cortex-A15 and hardcoding this in kvm_arch_init_vcpu(),
store the KVM_ARM_TARGET_* value in the ARMCPU class,
and use that.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
Il 10/12/2013 15:53, Gerd Hoffmann ha scritto:
Hi,
If we could make a small guset visible change, it would be simpler to
always make the PCI hole 1GB in size; it is currently 256MB for i440FX
and 1.25GB for q35.
Easy for i440fx.
Tricky for q35 as the firmware knows qemu will not map
From: John Rigby john.ri...@linaro.org
If no fdt is provided on command line and the new field
get_dtb in struct arm_boot_info is set then call it to
get a device tree blob.
Signed-off-by: John Rigby john.ri...@linaro.org
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
Message-id:
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