On 2013年12月17日 15:53, Peter Lieven wrote:
Hi Fam,
On 17.12.2013 05:07, Fam Zheng wrote:
On 2013年12月16日 23:34, Peter Lieven wrote:
+static int coroutine_fn nfs_co_writev(BlockDriverState *bs,
+int64_t sector_num, int
nb_sectors,
+
On 12/17/2013 06:52 PM, Greg Kurz wrote:
On Wed, 11 Dec 2013 18:07:58 +1100
Alexey Kardashevskiy a...@ozlabs.ru wrote:
Hm. Nack. This fails:
./qemu-system-ppc64 \
-trace events=qemu_trace_events \
-L qemu-ppc64-bios/ \
-nographic \
-vga none \
-device \
On 17.12.2013 09:29, Fam Zheng wrote:
On 2013年12月17日 15:53, Peter Lieven wrote:
Hi Fam,
On 17.12.2013 05:07, Fam Zheng wrote:
On 2013年12月16日 23:34, Peter Lieven wrote:
+static int coroutine_fn nfs_co_writev(BlockDriverState *bs,
+int64_t sector_num,
于2013年12月17日 星期二 16时46分50秒,Peter Lieven写到:
On 17.12.2013 09:29, Fam Zheng wrote:
On 2013年12月17日 15:53, Peter Lieven wrote:
Hi Fam,
On 17.12.2013 05:07, Fam Zheng wrote:
On 2013年12月16日 23:34, Peter Lieven wrote:
+static int coroutine_fn nfs_co_writev(BlockDriverState *bs,
+
On 17.12.2013 09:51, Fam Zheng wrote:
于2013年 12月17日 星期二 16时46分50秒,Peter Lieven写到:
On 17.12.2013 09:29, Fam Zheng wrote:
On 2013年12月17日 15:53, Peter Lieven wrote:
Hi Fam,
On 17.12.2013 05:07, Fam Zheng wrote:
On 2013年12月16日 23:34, Peter Lieven wrote:
+static int coroutine_fn
On NetBSD int8_t and friends are preprocessor macros expanding to __int8_t
(which is a typedef provided by machine dependent headers).
include/exec/softmmu_template.h tries to safe 3 lines of code by using
preprosseor concatenation, which only will work if int8_t is not a define,
or defined to
On 2013年12月17日 16:55, Peter Lieven wrote:
On 17.12.2013 09:51, Fam Zheng wrote:
于2013年 12月17日 星期二 16时46分50秒,Peter Lieven写到:
On 17.12.2013 09:29, Fam Zheng wrote:
On 2013年12月17日 15:53, Peter Lieven wrote:
Hi Fam,
On 17.12.2013 05:07, Fam Zheng wrote:
On 2013年12月16日 23:34, Peter Lieven
On 17.12.2013 10:01, Fam Zheng wrote:
On 2013年12月17日 16:55, Peter Lieven wrote:
On 17.12.2013 09:51, Fam Zheng wrote:
于2013年 12月17日 星期二 16时46分50秒,Peter Lieven写到:
On 17.12.2013 09:29, Fam Zheng wrote:
On 2013年12月17日 15:53, Peter Lieven wrote:
Hi Fam,
On 17.12.2013 05:07, Fam Zheng wrote:
On 16/12/2013 22:32, Amit Shah wrote:
On (Sun) 15 Dec 2013 [12:26:37], Gal Hammer wrote:
Fix a bug that was introduced in commit 386a5a1e. A removal of a device
set the chr handlers to NULL. However when the device is plugged back,
its read callback is not restored so data can't be transferred
after re-check , the first bad commit is:
commit 3e469dbfe413c25d48321c3a19ddfae0727dc6e5
Author: Andrea Arcangeli aarca...@redhat.com
Date: Thu Jul 25 12:11:15 2013 +0200
exec: always use MADV_DONTFORK
MADV_DONTFORK prevents fork to fail with -ENOMEM if the default
overcommit
after re-check , the first bad commit is:
commit 3e469dbfe413c25d48321c3a19ddfae0727dc6e5
Author: Andrea Arcangeli aarca...@redhat.com
Date: Thu Jul 25 12:11:15 2013 +0200
exec: always use MADV_DONTFORK
MADV_DONTFORK prevents fork to fail with -ENOMEM if the default
overcommit
after re-check , the first bad commit is:
commit 3e469dbfe413c25d48321c3a19ddfae0727dc6e5
Author: Andrea Arcangeli aarca...@redhat.com
Date: Thu Jul 25 12:11:15 2013 +0200
exec: always use MADV_DONTFORK
MADV_DONTFORK prevents fork to fail with -ENOMEM if the default
overcommit
after re-check , the first bad commit is:
commit 3e469dbfe413c25d48321c3a19ddfae0727dc6e5
Author: Andrea Arcangeli aarca...@redhat.com
Date: Thu Jul 25 12:11:15 2013 +0200
exec: always use MADV_DONTFORK
MADV_DONTFORK prevents fork to fail with -ENOMEM if the default
overcommit
after re-check , the first bad commit is:
commit 3e469dbfe413c25d48321c3a19ddfae0727dc6e5
Author: Andrea Arcangeli aarca...@redhat.com
Date: Thu Jul 25 12:11:15 2013 +0200
exec: always use MADV_DONTFORK
MADV_DONTFORK prevents fork to fail with -ENOMEM if the default
overcommit
This patch adds native support for accessing images on NFS shares without
the requirement to actually mount the entire NFS share on the host.
NFS Images can simply be specified by an url of the form:
nfs://host/export/filename
For example:
qemu-img create -f qcow2
A single cast cache is used for both an object casting and a class
casting. In case of interface presence a class cast result may be not
the same pointer as opposite to an object casting. So do not cache cast
results for an object casting in a presence of interfaces.
Signed-off-by: Sergey
A single cast cache is used for both an object casting and a class
casting. In case of interface presence a class cast result may be not
the same pointer as opposite to an object casting. So do not cache cast
results for an object casting in a presence of interfaces.
Signed-off-by: Sergey
On Tue, Dec 17, 2013 at 7:20 PM, Sergey Fedorov s.fedo...@samsung.com wrote:
A single cast cache is used for both an object casting and a class
casting. In case of interface presence a class cast result may be not
the same pointer as opposite to an object casting. So do not cache cast
results
On 2013年12月17日 17:07, Peter Lieven wrote:
On 17.12.2013 10:01, Fam Zheng wrote:
On 2013年12月17日 16:55, Peter Lieven wrote:
On 17.12.2013 09:51, Fam Zheng wrote:
于2013年 12月17日 星期二 16时46分50秒,Peter Lieven写到:
On 17.12.2013 09:29, Fam Zheng wrote:
On 2013年12月17日 15:53, Peter Lieven wrote:
Hi
On 12/17/2013 01:40 PM, Peter Crosthwaite wrote:
On Tue, Dec 17, 2013 at 7:20 PM, Sergey Fedorov s.fedo...@samsung.com wrote:
A single cast cache is used for both an object casting and a class
casting. In case of interface presence a class cast result may be not
the same pointer as opposite
Il 16/12/2013 21:51, Matthew Rosato ha scritto:
Add the machine=...,standby-mem={size} option and associated
documentation.
See how Igor Mammedov's x86 memory hotplug instead added -m NN,maxmem=NN.
You could use these two patches:
Il 17/12/2013 05:12, Michael Tokarev ha scritto:
When you switch from bus=ahci.0 to bus=ide.0 on the qemu command line
above, it all works fine and does not spew any warnings like that
about emulation failure.
It looks like we have some uninitialized data on sata emulation
(in addition to
Il 17/12/2013 09:55, Martin Husemann ha scritto:
On NetBSD int8_t and friends are preprocessor macros expanding to __int8_t
(which is a typedef provided by machine dependent headers).
include/exec/softmmu_template.h tries to safe 3 lines of code by using
preprosseor concatenation, which
On 17.12.2013 10:46, Fam Zheng wrote:
On 2013年12月17日 17:07, Peter Lieven wrote:
On 17.12.2013 10:01, Fam Zheng wrote:
On 2013年12月17日 16:55, Peter Lieven wrote:
On 17.12.2013 09:51, Fam Zheng wrote:
于2013年 12月17日 星期二 16时46分50秒,Peter Lieven写到:
On 17.12.2013 09:29, Fam Zheng wrote:
On
On 17 December 2013 01:24, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Dec 17, 2013 at 10:58 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 17 December 2013 00:52, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Fri, Dec 13, 2013 at 8:05 PM, Peter Maydell
On (Tue) 17 Dec 2013 [08:47:34], Markus Armbruster wrote:
Amos Kong ak...@redhat.com writes:
Bugzilla: https://bugs.launchpad.net/qemu/+bug/1253563
We have a requests queue to cache the random data, but the second
will come in when the first request is returned, so we always
only have
If there is a dirty log file to be replayed in a VHDX image, it is
replayed in .vhdx_open(). However, if the file is opened read-only,
then a somewhat cryptic error message results.
This adds a more helpful error message for the user. If an image file
contains a log to be replayed, and is
On Mon, Dec 16, 2013 at 10:53:24PM +0100, Igor Mammedov wrote:
On Mon, 16 Dec 2013 22:13:30 +0100
Laszlo Ersek ler...@redhat.com wrote:
On 12/16/13 21:38, Igor Mammedov wrote:
On Mon, 16 Dec 2013 21:30:14 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Fri, Dec 13, 2013 at
Hi,
Problem is that the firmware places the xbar @ 0xb00.
Hardcoded, assuming qemu will not map ram above 0xb000.
Can't bios figure out the size of memory below 4G from fwcfg?
I refer to 7db16f2480db5e246d34d0c453cff4f58549df0e specifically.
It can, but it doesn't.
Additional
On Mon, Dec 16, 2013 at 05:00:51PM -, Chris Weltzien wrote:
if we do a reload of libvirt, some iptables rules, which are created through
/etc/libvirt/hooks/qemu are not working anymore.
Every time a other (one or two,thee) vm is affected.
Please report this to the libvirt project:
Il 16/12/2013 16:47, Igor Mammedov ha scritto:
memdev is introduced here:
http://lists.gnu.org/archive/html/qemu-devel/2013-11/msg02532.html
as for mem-path mem-prealloc, I was thinking about adding HugePageMem
backend
to handle hugepage specifics. mem-share could be a part of ShareMem
Hi,
+if test $sdlabi == 2.0; then
Please replace '==' by a single '=' here. dash (and maybe other less
sophisticated shells) don't like '=='.
I'll fix it up.
I know that sdl2.c is based on sdl.c which was coded before the
introduction of the current coding rules, but would you mind if
These allow hotplugging (and hot-unplugging without leaking an object)
virtio-rng devices. They can also be used for memory hotplug.
v1-v2: fix mistyped underscores in qapi-schema.json
Paolo Bonzini (5):
rng: initialize file descriptor to -1
qom: fix leak for objects created with -object
These two commands invoke the unparent method of Object.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hmp-commands.hx | 14 ++
hmp.c| 9 +
hmp.h| 1 +
qapi-schema.json | 14 ++
qmp-commands.hx | 24
The file descriptor is never initialized to -1, which makes rng-random
close stdin if an object is created and immediately destroyed. If we
change it to -1, we also need to protect qemu_set_fd_handler from
receiving a bogus file descriptor.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
qom/object.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/qom/object.c b/qom/object.c
index fc19cf6..68fe07a 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -988,17 +988,22 @@ static void
The object must be unref-ed when its variable goes out of scope.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
vl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index 8d5d874..6917fd1 100644
--- a/vl.c
+++ b/vl.c
@@ -2807,12 +2807,13 @@ static int
Add two commands that are the monitor counterparts of -object. The commands
have the same Visitor-based implementation, but use different kinds of
visitors so that the HMP command has a DWIM string-based syntax, while
the QMP variant accepts a stricter JSON-based properties dictionary.
On Tue, Dec 17, 2013 at 8:31 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 17 December 2013 01:24, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Dec 17, 2013 at 10:58 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 17 December 2013 00:52, Peter Crosthwaite
On 17 December 2013 04:45, Christoffer Dall christoffer.d...@linaro.org wrote:
I think this could be written slightly more clearly for the uninitiated,
but maybe I'm just not qemu-savy enough.
It was a bit compressed; I've reworded it to:
/* PSTATE isn't an architectural register for ARMv8.
On 17 December 2013 11:36, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Dec 17, 2013 at 8:31 PM, Peter Maydell peter.mayd...@linaro.org
wrote:
I'm not convinced about this at all -- this would be letting the
I know about booting Linux code spread out from boot.c
where it
On Tue, Dec 17, 2013 at 9:26 PM, Paolo Bonzini pbonz...@redhat.com wrote:
Add two commands that are the monitor counterparts of -object. The commands
have the same Visitor-based implementation, but use different kinds of
visitors so that the HMP command has a DWIM string-based syntax, while
On Tue, Dec 17, 2013 at 11:54:46AM +0100, Gerd Hoffmann wrote:
Hi,
Problem is that the firmware places the xbar @ 0xb00.
Hardcoded, assuming qemu will not map ram above 0xb000.
Can't bios figure out the size of memory below 4G from fwcfg?
I refer to
On Mon, 16 Dec 2013 15:26:37 -0800
Anthony Liguori anth...@codemonkey.ws wrote:
Igor Mammedov imamm...@redhat.com writes:
changes since v2:
* s/hotplugable/hotpluggable/
* move hotplug check to an earlier patch:
qdev: add hotpluggable property to Device
--
Refactor PCI specific
This changes vmdk_create to use bdrv_* functions to replace qemu_open
and other fd functions. The error handling are improved as well. One
difference is that bdrv_pwrite will round up buffer to sectors, so for
description file, an extra bdrv_truncate is used in the end to drop
ending zeros.
I
On Tue, Dec 17, 2013 at 9:47 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 17 December 2013 11:36, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Dec 17, 2013 at 8:31 PM, Peter Maydell peter.mayd...@linaro.org
wrote:
I'm not convinced about this at all -- this would be
From: Mian M. Hamayun m.hama...@virtualopensystems.com
This commit adds support for booting a single AArch64 CPU by setting
appropriate registers. The bootloader includes placehoders for Board-ID
that are used to implement uniform indexing across different bootloaders.
Signed-off-by: Mian M.
Add a config for aarch64-softmmu; this enables building of this target.
The resulting executable doesn't know about any 64 bit CPUs, but all
the 32 bit CPUs and board models work.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Message-id:
For AArch64 we will obviously require a different set of
primary and secondary boot loader code fragments. However currently
we hardcode the offsets into the loader code where we must write
the entrypoint and other data into arm_load_kernel(). This makes it
hard to substitute a different loader
Il 17/12/2013 12:54, Peter Crosthwaite ha scritto:
+visit_start_struct(opts_get_visitor(ov), dummy, NULL, NULL, 0, err);
+if (error_is_set(err)) {
+goto out_clean;
+}
So I have been thinking about repeated if(error_is_set(err)) { goto
foo; } and how to reduce its
From: Mian M. Hamayun m.hama...@virtualopensystems.com
Add the bare minimum set of functions needed for control of an
AArch64 KVM vcpu:
* CPU initialization
* minimal get/put register functions which only handle the
basic state of the CPU
Signed-off-by: Mian M. Hamayun
This patchset adds support for basic AArch64 KVM VM control;
it's based on current master. This is a quick resend with the very
minor nits Christoffer pointed out fixed; I'm planning to put it into
a target-arm pullreq in the next day or two.
This patch series supports:
* 64 bit KVM VM control
Enable KVM if the host and target CPU are both aarch64. Note
that host aarch64 + target arm is not valid for KVM acceleration:
the 64 bit kernel does not support the ioctl interface for
32 bit CPUs. 32 bit VMs on 64 bit hosts need to be created
using the 64 bit ioctl interface; when QEMU supports
Split ARM KVM support code which is 32 bit specific out into its
own file, which we only compile on 32 bit hosts. This will give
us a place to add the 64 bit support code without adding lots of
ifdefs to kvm.c.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Message-id:
The env-pstate field is a little odd since it doesn't strictly
speaking represent an architectural register. However it's convenient
for QEMU to use it to hold the various PSTATE architectural bits
in the same format the architecture specifies for SPSR registers
(since this is the same format the
Il 17/12/2013 00:26, Anthony Liguori ha scritto:
Sharing hot plug code is a good thing. Making hotplug a qdev-level
concept seems like a bad thing to me.
Can you explain what you mean?
The series is a net add of code so I don't think we're winning anything
by generalizing here.
Any
On Tue, Dec 17, 2013 at 10:24 PM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 17/12/2013 12:54, Peter Crosthwaite ha scritto:
+visit_start_struct(opts_get_visitor(ov), dummy, NULL, NULL, 0, err);
+if (error_is_set(err)) {
+goto out_clean;
+}
So I have been thinking about
On Tue, Dec 17, 2013 at 10:15 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
Add a config for aarch64-softmmu; this enables building of this target.
The resulting executable doesn't know about any 64 bit CPUs, but all
the 32 bit CPUs and board models work.
Signed-off-by: Peter Maydell
On Mon, 16 Dec 2013 16:26:55 -0200
Eduardo Habkost ehabk...@redhat.com wrote:
On Mon, Dec 16, 2013 at 04:01:05PM +0100, Igor Mammedov wrote:
On Sun, 15 Dec 2013 23:50:47 +0100
Andreas Färber afaer...@suse.de wrote:
Am 27.11.2013 23:28, schrieb Igor Mammedov:
Igor Mammedov (16):
On Tue, Dec 17, 2013 at 10:15 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
From: Mian M. Hamayun m.hama...@virtualopensystems.com
This commit adds support for booting a single AArch64 CPU by setting
appropriate registers. The bootloader includes placehoders for Board-ID
placeholders
Peter Crosthwaite peter.crosthwa...@xilinx.com writes:
On Tue, Dec 17, 2013 at 10:24 PM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 17/12/2013 12:54, Peter Crosthwaite ha scritto:
+visit_start_struct(opts_get_visitor(ov), dummy, NULL, NULL, 0, err);
+if (error_is_set(err)) {
+
On 17 December 2013 13:04, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Dec 17, 2013 at 10:15 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
From: Mian M. Hamayun m.hama...@virtualopensystems.com
This commit adds support for booting a single AArch64 CPU by setting
Alex,
this is mostly bugfixes and cleanup patches, except for Patch 4/8 which
implements a SIGP order code for cpu start.
regards
Jens
Cornelia Huck (1):
s390x/kvm: Fix diagnose handling.
Thomas Huth (7):
s390x/kvm: Removed duplicated SIGP defines
s390x/kvm: Removed s390_store_status
From: Cornelia Huck cornelia.h...@de.ibm.com
The instruction intercept handler for diagnose used only the displacement
when trying to calculate the function code. This is only correct for base
0, however; we need to perform a complete base/displacement address
calculation and use bits 48-63 as
From: Thomas Huth th...@linux.vnet.ibm.com
To make scripts/checkpatch.pl happy for the following patches,
the coding style in handle_sigp() has to be fixed first.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Acked-by: Cornelia Huck cornelia.h...@de.ibm.com
Signed-off-by: Jens Freimann
From: Thomas Huth th...@linux.vnet.ibm.com
I missed to set the CC in the CHSC instruction when I refactored
the CC setting in the IO instructions with the following commit:
5d9bf1c07c1369ab3506fc82cc65a10f4415d867
s390/ioinst: Moved the CC setting to the IO instruction handlers
From: Thomas Huth th...@linux.vnet.ibm.com
The SIGP order defines are also available in cpu.h,
so there is no need to re-define them in kvm.c.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Signed-off-by: Jens Freimann
From: Thomas Huth th...@linux.vnet.ibm.com
The SIGP order STORE STATUS AT ADDRESS will be handled in
kernel space, so we do not need the stub in QEMU anymore.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Signed-off-by: Jens Freimann
From: Thomas Huth th...@linux.vnet.ibm.com
This patch adds the missing START order to the SIGP instruction handler.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
---
From: Thomas Huth th...@linux.vnet.ibm.com
We've already got a helper function for calculating the
base/displacement of RS formatted instructions, so we can
get rid of the manual calculation of the SIGP order code.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck
From: Thomas Huth th...@linux.vnet.ibm.com
If SIGP is called with an unknown order code, it has to return CC1
instead of CC3 and set the invalid order bit in the return status.
Signed-off-by: Thomas Huth th...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Signed-off-by:
On 03.12.2013, at 17:11, Tom Musta tommu...@gmail.com wrote:
On 11/1/2013 8:21 AM, Tom Musta wrote:
NOTE: this is a resubmission of this patch series. Alex discovered some
corruption in the patches from my previous submission.
This patch series continues adding support for the PowerPC
On 12/16/2013 06:40 PM, Christoffer Dall wrote:
On Thu, Nov 28, 2013 at 01:33:22PM +, Peter Maydell wrote:
Add a config for aarch64-softmmu; this enables building of this target.
The resulting executable doesn't know about any 64 bit CPUs, but all
the 32 bit CPUs and board models work.
On 01.11.2013, at 14:35, Tom Musta tommu...@gmail.com wrote:
The comment preceding the float64_to_uint64 routine suggests that
the implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floating
point number to an unsigned, 64
On Tue, Dec 17, 2013 at 11:14 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 17 December 2013 13:04, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Dec 17, 2013 at 10:15 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
From: Mian M. Hamayun
On 16 December 2013 10:15, Antony Pavlov antonynpav...@gmail.com wrote:
Changes since v9:
1. rebase over Peter Crosthwaite's Fix Support for ARM CBAR and
reset-hivecs v5 patch series
2. qom-test: add canon-a1100 to arm machines list
3. include a diffstat in the cover letter (use
On Sun, Dec 8, 2013 at 2:54 AM, Xin Tong trent.t...@gmail.com wrote:
On Thu, Nov 28, 2013 at 8:12 AM, Lluís Vilanova vilan...@ac.upc.edu wrote:
Xin Tong writes:
Hi LIuis
we can probably generate vector intrinsics using the tcg, e.g. add
support to
tcg to emit vector instructions
On 17 December 2013 13:42, Alexander Graf ag...@suse.de wrote:
Softfloat really isn't my area of expertise and I'd prefer to see these
patches go in through a different tree :). Peter, do you want to take
care of this patch and Add float32_to_uint64()? Or at least give
me your reviewed-by tag
On 17.12.2013, at 14:22, Jens Freimann jf...@linux.vnet.ibm.com wrote:
From: Thomas Huth th...@linux.vnet.ibm.com
This patch adds the missing START order to the SIGP instruction handler.
Does the spec define what happens on START when the CPU is already running?
Does START modify any
On 12/17/2013 03:33 AM, Jeff Cody wrote:
If there is a dirty log file to be replayed in a VHDX image, it is
replayed in .vhdx_open(). However, if the file is opened read-only,
then a somewhat cryptic error message results.
This adds a more helpful error message for the user. If an image
On Mon, Dec 16, 2013 at 05:24:53PM -0700, Eric Blake wrote:
Is it worth tweaking docs/specs/qcow2.txt to permanently change the
incompatible_features field to be 4 bytes (76-79) and mandate that bytes
72-75 always be 0, as a conservative way to prevent other misbehavior of
programs like
On 17.12.2013, at 14:22, Jens Freimann jf...@linux.vnet.ibm.com wrote:
From: Thomas Huth th...@linux.vnet.ibm.com
I missed to set the CC in the CHSC instruction when I refactored
the CC setting in the IO instructions with the following commit:
5d9bf1c07c1369ab3506fc82cc65a10f4415d867
On 17.12.2013, at 14:52, Peter Maydell peter.mayd...@linaro.org wrote:
On 17 December 2013 13:42, Alexander Graf ag...@suse.de wrote:
Softfloat really isn't my area of expertise and I'd prefer to see these
patches go in through a different tree :). Peter, do you want to take
care of this
On Mon, Dec 16, 2013 at 05:52:08PM -0700, Eric Blake wrote:
At least libvirt 0.10.2 has a bug where it can be provoked
into attempting to search for extension headers (in particular,
the backing file format header) without first validating that
a particular file is qcow2 version 2.
On 16 December 2013 02:01, liguang lig.f...@cn.fujitsu.com wrote:
lay a foundation for allwinner A10 SoC with a cortex-a8
processor, and will add more devices later.
Thanks; applied all to target-arm.next.
-- PMM
On 16 December 2013 10:15, Antony Pavlov antonynpav...@gmail.com wrote:
+static void digic_load_rom(DigicBoardState *s, hwaddr addr,
+ hwaddr max_size, const char *def_filename)
+{
+target_long rom_size;
+const char *filename;
+
+if (bios_name) {
+
On Tue, Dec 17, 2013 at 08:57:10AM +0100, Stefan Weil wrote:
Function iscsi_read10_task got additional parameters starting with version
libiscsi 1.5.0.
libiscsi 1.4.0 is still widely used (Debian wheezy, jessie and other Linux
distributions currently provide packages for QEMU which use it),
Hi Alex,
On Tue, 17 Dec 2013 14:56:33 +0100
Alexander Graf ag...@suse.de wrote:
On 17.12.2013, at 14:22, Jens Freimann jf...@linux.vnet.ibm.com wrote:
From: Thomas Huth th...@linux.vnet.ibm.com
This patch adds the missing START order to the SIGP instruction handler.
Does the
On 17.12.2013, at 15:26, Thomas Huth th...@linux.vnet.ibm.com wrote:
Hi Alex,
On Tue, 17 Dec 2013 14:56:33 +0100
Alexander Graf ag...@suse.de wrote:
On 17.12.2013, at 14:22, Jens Freimann jf...@linux.vnet.ibm.com wrote:
From: Thomas Huth th...@linux.vnet.ibm.com
This patch adds
On 9 December 2013 12:37, Peter Maydell peter.mayd...@linaro.org wrote:
Third revision of the second chunk of A64 decoder patches:
a grabbag of miscellaneous logic and bit-twiddling operations,
plus some other minor stuff like ADR and conditional-select.
Applied to target-arm.next since all
Public bug reported:
trace-backend simple generates wrong eventid in trace/generated-
tracers.c after disable property occured in trace-events record.
Result: missing or mixing logs in trace file.
** Affects: qemu
Importance: Undecided
Status: New
--
You received this bug
On 5 December 2013 12:39, Peter Maydell peter.mayd...@linaro.org wrote:
Round three of the first-chunk of A64 decoder work, updated
following code review.
Applied to target-arm.next since all patches in this group have
now got review.
thanks
-- PMM
From: Alexander Graf ag...@suse.de
This patch adds emulation for the Data-processing (3 source)
family of instructions, namely MADD, MSUB, SMADDL, SMSUBL, SMULH,
UMADDL, UMSUBL, UMULH.
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Signed-off-by:
From: Alex Bennée a...@bennee.com
This adds support for the forms of ld/st with a 12 bit
unsigned immediate offset.
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/translate-a64.c | 89
From: Alexander Graf ag...@suse.de
Adds support for Load Register (literal), both normal
and SIMD/FP forms.
Signed-off-by: Alexander Graf ag...@suse.de
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/translate-a64.c | 47
Implement an initial minimal set of EL0-visible system registers:
* NZCV
* FPCR
* FPSR
* CTR_EL0
* DCZID_EL0
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/cpu.h | 3 ++-
target-arm/helper.c| 58 ++
As Eric and Eduardo's suggestions, use is_power_of_2 to check whether
nr_cores
and nr_threads is the power of 2 in function x86_apicid_from_cpu_idx in file
target-i386/topology.h. This check is very simple, I prefer add it in a
function to write a new function. Thanks for Eric and Eduardo.
Best
So return void.
Signed-off-by: Juan Quintela quint...@redhat.com
Reviewed-by: Orit Wasserman owass...@redhat.com
Reviewed-by: Eric Blake ebl...@redhat.com
---
include/exec/memory-internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory-internal.h
Hi
This is the last version of the bitmap patches, changes from last submission:
- cleanups: now it passes checkpatch
- all coments from Eric Paolo addressed
- fixed problem with DIRTY_MEMORY_NUM
- tested by Vinod and numbers are very good
- move bitmap operations to take long as index
- round
Signed-off-by: Juan Quintela quint...@redhat.com
Reviewed-by: Orit Wasserman owass...@redhat.com
Reviewed-by: Eric Blake ebl...@redhat.com
---
cputlb.c | 2 +-
include/exec/memory-internal.h | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/cputlb.c
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