Re: [Qemu-devel] [PATCH] spapr: fix LSI interrupt specifiers in the device tree

On 12/02/2017 08:30 PM, Greg Kurz wrote: > PAPR 2.7 C.6.9.1.2 describes the "#interrupt-cells" property of the > PowerPC External Interrupt Source Controller node as follows: > > “#interrupt-cells” > > Standard property name to define the number of cells in an interrupt- > specifier within

[Qemu-devel] [PATCH v2] Add AVX, AVX-512, MPX support to x86_cpu_dump_state

Signed-off-by: Doug Gale --- Fix MSB LSB showing when SSE is disabled target/i386/helper.c | 95 +--- 1 file changed, 83 insertions(+), 12 deletions(-) diff --git a/target/i386/helper.c b/target/i386/helper.c index

Re: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h

On Sat, Dec 02, 2017 at 11:59:20AM +1100, David Gibson wrote: > On Fri, Dec 01, 2017 at 06:29:39PM +0200, Michael S. Tsirkin wrote: > > On Thu, Nov 30, 2017 at 03:02:48PM +1100, David Gibson wrote: > > > On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote: > > > > On 29/11/2017 10:46,

[Qemu-devel] [PATCH] Add AVX, AVX-512, MPX support to x86_cpu_dump_state

Signed-off-by: Doug Gale --- target/i386/helper.c | 94 +--- 1 file changed, 82 insertions(+), 12 deletions(-) diff --git a/target/i386/helper.c b/target/i386/helper.c index f63eb3d3f4..708fe13f2f 100644 ---

Re: [Qemu-devel] [PULL 0/7] pc, pci, virtio: fixes for rc3

On Fri, Dec 01, 2017 at 06:05:25PM +, Peter Maydell wrote: > On 1 December 2017 at 17:08, Michael S. Tsirkin wrote: > > The following changes since commit c11d61271b9e6e7a1f0479ef1ca8fb55fa457a62: > > > > Update version for v2.11.0-rc3 release (2017-11-29 17:59:34 +) >

[Qemu-devel] [Bug 1321684] Re: block_stream command stalls

[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1321684 Title:

[Qemu-devel] [Bug 1318474] Re: QEMU update causes Windows reactivation

[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1318474 Title: QEMU

[Qemu-devel] [Bug 700276] Re: QEMU crashed when GDB request a big size variable information

[Expired for QEMU because there has been no activity for 60 days.] ** Changed in: qemu Status: Incomplete => Expired -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/700276 Title: QEMU

Re: [Qemu-devel] [PATCH v18 05/10] xbitmap: add more operations

Matthew Wilcox wrote: > On Fri, Dec 01, 2017 at 03:09:08PM +, Wang, Wei W wrote: > > On Friday, December 1, 2017 9:02 PM, Tetsuo Handa wrote: > > > If start == end is legal, > > > > > >for (; start < end; start = (start | (IDA_BITMAP_BITS - 1)) + 1) { > > > > > > makes this loop do

Re: [Qemu-devel] [PATCH v18 05/10] xbitmap: add more operations

Matthew Wilcox wrote: > On Thu, Nov 30, 2017 at 10:35:03PM +0900, Tetsuo Handa wrote: > > According to xb_set_bit(), it seems to me that we are trying to avoid > > memory allocation > > for "struct ida_bitmap" when all set bits within a 1024-bits bitmap reside > > in the first > > 61 bits. > >

[Qemu-devel] [PATCH v4] gdbstub: add tracing

Signed-off-by: Doug Gale --- Fix usage of %c in trace output, now uses 0x%02x Fix possible sign extended char that could cause 0xfc to say 0xfffc Add missing traces for hitting breakpoints, continuing, stepping Fix incorrect dynamic check for tracing being enabled in

Re: [Qemu-devel] [PATCH 0/5] spapr: preliminary cleanups before introducing XIVE

On Fri, Dec 01, 2017 at 05:05:59PM +0100, Cédric Le Goater wrote: > Hello, > > These are initial patches of the XIVE patchset which prepare ground > for the integration of the XIVE model. Applied to ppc-for-2.12. > > Thanks, > > C. > > Cédric Le Goater (5): > ppc/xics: introduce an

[Qemu-devel] [PATCH] qemu-img: Fixed grammatical error in dump_human_image_check

Signed-off-by: Shravan Rajinikanth --- qemu-img.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu-img.c b/qemu-img.c index 68b375f..bea9268 100644 --- a/qemu-img.c +++ b/qemu-img.c @@ -580,7 +580,7 @@ static void dump_human_image_check(ImageCheck

[Qemu-devel] [PATCH] 9pfs: Correctly handle cancelled requests

# Background I was investigating spurious, non-deterministic EINTR returns from various 9p file system operations in a Linux guest served from the qemu 9p server. ## EINTR, ERESTARTSYS and the linux kernel When a signal arrives that the Linux kernel needs to deliver to user-space while a

[Qemu-devel] [PATCH] spapr: fix LSI interrupt specifiers in the device tree

PAPR 2.7 C.6.9.1.2 describes the "#interrupt-cells" property of the PowerPC External Interrupt Source Controller node as follows: “#interrupt-cells” Standard property name to define the number of cells in an interrupt- specifier within an interrupt domain. prop-encoded-array: An integer,

Re: [Qemu-devel] [PATCH 11/25] spapr: describe the XIVE interrupt source flags

On 12/02/2017 03:48 PM, Benjamin Herrenschmidt wrote: > On Sat, 2017-12-02 at 15:38 +0100, Cédric Le Goater wrote: >> Hmm, yes. So, the current design for sPAPR handles all sources >> under the same XIVE object with a global memory region for all >> the ESBs. >> >> The first RFC had a mechanism

Re: [Qemu-devel] [PATCH 11/25] spapr: describe the XIVE interrupt source flags

On Sat, 2017-12-02 at 15:38 +0100, Cédric Le Goater wrote: > Hmm, yes. So, the current design for sPAPR handles all sources > under the same XIVE object with a global memory region for all > the ESBs. > > The first RFC had a mechanism to register source objects into > the XIVE main one,

Re: [Qemu-devel] [PATCH 10/25] spapr: add MMIO handlers for the XIVE interrupt sources

On 12/02/2017 03:28 PM, Benjamin Herrenschmidt wrote: > On Wed, 2017-11-29 at 17:23 +0100, Cédric Le Goater wrote: >> On 11/29/2017 02:56 PM, Cédric Le Goater wrote: >>> +switch (offset) { >>> +case 0: >>> +spapr_xive_source_eoi(xive, lisn); >> >> Hrm. I don't

Re: [Qemu-devel] [PATCH 14/25] spapr: push the XIVE EQ data in OS event queue

On Sat, 2017-12-02 at 08:45 -0600, Benjamin Herrenschmidt wrote: > On Fri, 2017-12-01 at 15:10 +1100, David Gibson wrote: > > > > Hm, ok. Guest endian (or at least, not definitively host-endian) data > > in a plain uint32_t makes me uncomfortable. Could we use char data[4] > > instead, to make

Re: [Qemu-devel] [PATCH 14/25] spapr: push the XIVE EQ data in OS event queue

On Fri, 2017-12-01 at 15:10 +1100, David Gibson wrote: > > Hm, ok. Guest endian (or at least, not definitively host-endian) data > in a plain uint32_t makes me uncomfortable. Could we use char data[4] > instead, to make it clear it's a byte-ordered buffer, rather than a > number as far as the

Re: [Qemu-devel] [PATCH 13/25] spapr: introduce the XIVE Event Queues

On Sat, 2017-12-02 at 08:39 -0600, Benjamin Herrenschmidt wrote: > The IVEs and EQs are managed by the virtualization controller. The VPs > (aka ENDs) typo. aka NVTs > are managed by the presentation controller. There's a VP per > real and virtual CPU.

Re: [Qemu-devel] [PATCH 15/25] spapr: notify the CPU when the XIVE interrupt priority is more privileged

On Thu, 2017-11-30 at 16:00 +1100, David Gibson wrote: > > > static uint64_t spapr_xive_icp_accept(sPAPRXiveICP *icp) > > { > > -return 0; > > +uint8_t nsr = icp->tima_os[TM_NSR]; > > + > > +qemu_irq_lower(icp->output); > > + > > +if (icp->tima_os[TM_NSR] & TM_QW1_NSR_EO) { > >

Re: [Qemu-devel] [PATCH 13/25] spapr: introduce the XIVE Event Queues

On Thu, 2017-11-30 at 15:38 +1100, David Gibson wrote: > On Thu, Nov 23, 2017 at 02:29:43PM +0100, Cédric Le Goater wrote: > > The Event Queue Descriptor (EQD) table, also known as Event Notification > > Descriptor (END), is one of the internal tables the XIVE interrupt > > controller uses to

Re: [Qemu-devel] [PATCH 11/25] spapr: describe the XIVE interrupt source flags

On 12/02/2017 03:24 PM, Benjamin Herrenschmidt wrote: > On Tue, 2017-11-28 at 17:40 +1100, David Gibson wrote: >>> @@ -368,6 +368,10 @@ static void spapr_xive_realize(DeviceState *dev, Error >>> **errp) >>> /* Allocate the IVT (Interrupt Virtualization Table) */ >>> xive->ivt =

Re: [Qemu-devel] [PATCH 10/25] spapr: add MMIO handlers for the XIVE interrupt sources

On Thu, 2017-11-30 at 15:28 +1100, David Gibson wrote: > > How does this work at the hardware level? Presumbly the actual > hardware components don't communicate with the XIVE to request edge or > level. So how does it know? Specific ranges for LSIs? If that we > should probably do the same.

Re: [Qemu-devel] [PATCH 10/25] spapr: add MMIO handlers for the XIVE interrupt sources

On Wed, 2017-11-29 at 17:23 +0100, Cédric Le Goater wrote: > On 11/29/2017 02:56 PM, Cédric Le Goater wrote: > > > > > > +switch (offset) { > > > > > > +case 0: > > > > > > +spapr_xive_source_eoi(xive, lisn); > > > > > > > > > > Hrm. I don't love that you're dealing with clearing

Re: [Qemu-devel] [PATCH 09/25] spapr: introduce handlers for XIVE interrupt sources

On Tue, 2017-11-28 at 18:18 +, Cédric Le Goater wrote: > AFAICT, it doesn't. LSI events are configured as the other XIVE interrupts. > The level is converted in the P bit and the Q bit should always be zero. > So I should be able to simplify the proposed model which still is mimicking > XICS

Re: [Qemu-devel] [PATCH 11/25] spapr: describe the XIVE interrupt source flags

On Tue, 2017-11-28 at 17:40 +1100, David Gibson wrote: > > @@ -368,6 +368,10 @@ static void spapr_xive_realize(DeviceState *dev, Error > > **errp) > > /* Allocate the IVT (Interrupt Virtualization Table) */ > > xive->ivt = g_malloc0(xive->nr_irqs * sizeof(XiveIVE)); > > > > +/*

Re: [Qemu-devel] [PATCH 10/25] spapr: add MMIO handlers for the XIVE interrupt sources

On Tue, 2017-11-28 at 17:38 +1100, David Gibson wrote: > Hrm. I don't love that you're dealing with clearing that LSI bit > here, but setting it at a different level. > > The state machines are doing my head in a bit, is there any way > you could derive the STATUS_SENT bit from the PQ bits?

Re: [Qemu-devel] [PATCH v2 6/7] maint: Fix macros with broken 'do/while(0); ' usage

Eric Blake wrote: > The point of writing a macro embedded in a 'do { ... } while (0)' > loop (particularly if the macro has multiple statements or would > otherwise end with an 'if' statement) is so that the macro can be > used as a drop-in statement with the caller supplying

Re: [Qemu-devel] [PATCH 1/1] main loop: remove useless code

On 2 December 2017 at 07:41, FelixYao wrote: > hi Paolo Bonzini: > > Those codes seem useless, Could it be removed? > > Signed-off-by: FelixYao > --- > vl.c | 4 > 1 file changed, 4 deletions(-) > > diff --git a/vl.c b/vl.c > index 1ad1c04..5bed4c2

Re: [Qemu-devel] [PATCH 1/1] vhost-scsi: add missing virtqueue_size parameter

On Fri, Dec 01, 2017 at 04:15:38PM +0100, Eric Farman wrote: > Commit 5c0919d02066 ("virtio-scsi: Add virtqueue_size parameter allowing > virtqueue size to be set.") introduced a new parameter to virtio-scsi. > Later, commit 920036106044 ("vhost-user-scsi: add missing virtqueue_size > param")