On Sat, Jan 09, 2021 at 12:38:15AM +0300, Roman Bolshakov wrote:
> QEMU documentation can't be opened if QEMU is run from build tree
> because executables are placed in the top of build tree after conversion
> to meson.
>
> Signed-off-by: Roman Bolshakov
> ---
> ui/cocoa.m | 2 +-
> 1 file
On Fri, Dec 18, 2020 at 06:13:47PM -0800, Hill Ma wrote:
> This prevents illegal instruction on cpus do not support xgetbv.
>
> Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
> Signed-off-by: Hill Ma
> ---
> target/i386/hvf/x86_cpuid.c | 11 ---
> 1 file changed, 8 insertions(+),
On Fri, Jan 8, 2021 at 10:58 AM Eduardo Habkost wrote:
>
> On Fri, Jan 08, 2021 at 07:09:52PM +0100, Philippe Mathieu-Daudé wrote:
> > When decodetree.py was added in commit 568ae7efae7, QEMU was
> > using Python 2 which happily reads UTF-8 files in text mode.
> > Python 3 requires either UTF-8
[Expired for QEMU because there has been no activity for 60 days.]
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Title:
Can't
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Title:
Assertion
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https://bugs.launchpad.net/bugs/1689003
Title:
USB
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https://bugs.launchpad.net/bugs/1687599
Title:
Bind 2nd
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Title:
when
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https://bugs.launchpad.net/bugs/1695169
Title:
qga fail
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https://bugs.launchpad.net/bugs/1706825
Title:
qemu-user
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** Changed in: qemu
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https://bugs.launchpad.net/bugs/1702621
Title:
colo:
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https://bugs.launchpad.net/bugs/1687569
Title:
when
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https://bugs.launchpad.net/bugs/1723731
Title:
Qemu turns
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https://bugs.launchpad.net/bugs/1728635
Title:
qemu-io
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https://bugs.launchpad.net/bugs/1698574
Title:
slow boot
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** Changed in: qemu
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Title:
Rapid
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https://bugs.launchpad.net/bugs/1702798
Title:
colo:
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** Changed in: qemu
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https://bugs.launchpad.net/bugs/1689245
Title:
qcow2
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Title:
Win 10
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Title:
POWER8:
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Title:
Read
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Title:
VFIO
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Title:
qemu:
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https://bugs.launchpad.net/bugs/1719339
Title:
Hi Peter,
On Fri, Jan 8, 2021 at 10:49 PM Peter Maydell wrote:
>
> On Thu, 17 Dec 2020 at 05:28, Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > The endianness of data exchange between tx and rx fifo is incorrect.
> > Earlier bytes are supposed to show up on MSB and later bytes on LSB,
> > ie:
Alistair Francis writes:
> Whoops, I thought I had already reviewed this commit.
You had provided quite extensive review with lots of useful comments,
but never added the magic tag for this commit :-)
--
-keith
signature.asc
Description: PGP signature
On 1/8/21 2:31 PM, Greg Kurz wrote:
Since commit 1e8b5b1aa16b ("spapr: Allow memory unplug to always succeed")
trying to unplug memory from a guest that doesn't support it (eg. rhel6)
no longer generates an error like it used to. Instead, it leaves the
memory around : only a subsequent reboot
We do have some code, that is giving different results, between the
peeked and the actual:
https://github.com/FreeRTOS/FreeRTOS-Plus-
TCP/blob/9a25860e761036a9eb780799c9db632e3eff60c9/portable/NetworkInterface/MPS2_AN385/NetworkInterface.c#L237
We also have a fix to circumvent the problem by
On Thu, Jan 7, 2021 at 11:02 AM Atish Patra wrote:
>
> On Thu, 2021-01-07 at 09:19 -0800, Alistair Francis wrote:
> > On Wed, Dec 23, 2020 at 11:26 AM Atish Patra
> > wrote:
> > >
> > > As per the privilege specification, any access from S/U mode should
> > > fail
> > > if no pmp region is
On Fri, Jan 8, 2021 at 3:05 PM Alex Bennée wrote:
>
> From: Kito Cheng
>
> This could made testing more easier and ARM/AArch64 has supported on
> their linux user mode too, so I think it should be reasonable.
>
> Verified GCC testsuite with newlib/semihosting.
>
> Signed-off-by: Kito Cheng
>
On Fri, Jan 8, 2021 at 3:06 PM Alex Bennée wrote:
>
> From: Keith Packard
>
> Adapt the arm semihosting support code for RISCV. This implementation
> is based on the standard for RISC-V semihosting version 0.2 as
> documented in
>
>
On Sat, 9 Jan 2021, Roman Bolshakov wrote:
On Fri, Jan 08, 2021 at 03:00:07PM +, Peter Maydell wrote:
On Fri, 8 Jan 2021 at 13:50, Peter Maydell wrote:
On Sat, 2 Jan 2021 at 15:14, Roman Bolshakov wrote:
ui/cocoa.m:1188:44: warning: 'openFile:' is deprecated: first deprecated in
From: Keith Packard
Adapt the arm semihosting support code for RISCV. This implementation
is based on the standard for RISC-V semihosting version 0.2 as
documented in
https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
Signed-off-by: Keith Packard
Message-Id:
From: Kito Cheng
This could made testing more easier and ARM/AArch64 has supported on
their linux user mode too, so I think it should be reasonable.
Verified GCC testsuite with newlib/semihosting.
Signed-off-by: Kito Cheng
Reviewed-by: Keith Packard
Message-Id:
fdctrl_format_sector was added in
baca51faff ("updated floppy driver: formatting code, disk geometry auto detect
(Jocelyn Mayer)")
The single callsite is guarded by a check:
fdctrl->data_state & FD_STATE_FORMAT
However, the only place where the FD_STATE_FORMAT flag is set (in
From: Keith Packard
This makes all of the internal interfaces architecture-independent and
renames the internal functions to use the 'common_semi' prefix instead
of 'arm' or 'arm_semi'.
To do this, some new architecture-specific internal helper functions
were created:
static inline
From: Keith Packard
Part of Semihosting for AArch32 and AArch64 Release 2.0
Signed-off-by: Keith Packard
Message-Id: <20210107170717.2098982-10-kei...@keithp.com>
Signed-off-by: Alex Bennée
---
hw/semihosting/common-semi.c | 4
1 file changed, 4 insertions(+)
diff --git
From: Keith Packard
The public API is now defined in
hw/semihosting/common-semi.h. do_common_semihosting takes CPUState *
instead of CPUARMState *. All internal functions have been renamed
common_semi_ instead of arm_semi_ or arm_. Aside from the API change,
there are no functional changes in
I had a similar issue in the past with the acceptance tests.
Some VMs send UTF-8 output in their console and the acceptance test
script would bail out if the locale was not UTF-8.
I sent a patch on the ml but it probably got lost:
From: Keith Packard
This commit renames two files which provide ARM semihosting support so
that they can be shared by other architectures:
1. target/arm/arm-semi.c -> hw/semihosting/common-semi.c
2. linux-user/arm/semihost.c -> linux-user/semihost.c
The build system was modified use a
From: Keith Packard
env->boot_info is only set in some ARM startup paths, so we cannot
rely on it to support the SYS_HEAPINFO semihosting function. When not
available, fallback to finding a RAM memory region containing the
current stack and use the base of that.
Signed-off-by: Keith Packard
While GDB can work with any XML description given to it there is
special handling for SVE registers on the GDB side which makes the
users life a little better. The changes aren't that major and all the
registers save the $vg reported the same. All that changes is:
- report
On 1/8/21 11:51 AM, Peter Maydell wrote:
> In commit cd8be50e58f63413c0 we converted the A32 coprocessor
> insns to decodetree. This accidentally broke XScale/iWMMXt insns,
> because it moved the handling of "cp insns which are handled
> by looking up the cp register in the hashtable" from after
From: Keith Packard
Part of Semihosting for AArch32 and AArch64 Release 2.0
Signed-off-by: Keith Packard
Message-Id: <20210107170717.2098982-9-kei...@keithp.com>
Signed-off-by: Alex Bennée
---
hw/semihosting/common-semi.c | 21 +++--
1 file changed, 19 insertions(+), 2
From: Keith Packard
These are part of Semihosting for AArch32 and AArch64 Release 2.0
Signed-off-by: Keith Packard
Message-Id: <20210107170717.2098982-8-kei...@keithp.com>
Signed-off-by: Alex Bennée
---
include/qemu/timer.h | 2 ++
hw/semihosting/common-semi.c | 16
This adds a new tests that allows us to test softmmu only features
including watchpoints. To do achieve this we need to:
- add _exit: labels to the boot codes
- write a memory.py test case
- plumb the test case into the build system
- tweak the run_test script to:
- re-direct output
GNU Global is another tags engine which is more like cscope in being
able to support finding both references and definitions. You will be
un-surprised to know it also integrates well with Emacs.
The main benefit of integrating it into find-src-path is it takes less
time to rebuild the database
This helps with debugging.
Signed-off-by: Alex Bennée
Message-Id: <20201214153012.12723-2-alex.ben...@linaro.org>
Message-Id: <20201218112707.28348-2-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/guest-debug/run-test.py | 1 +
1 file changed, 1 insertion(+)
diff --git
We won't attempt to run the test now it's gated on a newer version of
gdb.
This reverts commit a930cadd83b4681a98ce72abf530a791ee2e42a6.
Signed-off-by: Alex Bennée
Message-Id: <20201218112707.28348-4-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/multiarch/Makefile.target |
If you kill the inferior from GDB we end up leaving our socket lying
around. Fix this by calling gdb_exit() first.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201214153012.12723-7-alex.ben...@linaro.org>
Message-Id:
From: Philippe Mathieu-Daudé
Debian 9 base container has been removed in commits
e3755276d1f and c9d78b06c06. Remove the last remnants.
Fixes: e3755276d1f ("tests/docker: Remove old Debian 9 containers")
Signed-off-by: Philippe Mathieu-Daudé
Message-Id:
gdb_exit() has never needed anything from env and I doubt we are going
to start now.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201214153012.12723-5-alex.ben...@linaro.org>
Message-Id:
The support of socket based debugging which we need for linux-user
testing is only really stable as of 8.3.1 so lets gate our use of GDB
on having a relatively modern version.
For direct testing you can just point to a locally compiled version of
gdb via configure, e.g.:
../../configure
Despite it's name it didn't actually clean-up so let us document
gdb_exit() better and use that.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201214153012.12723-6-alex.ben...@linaro.org>
Message-Id:
From: Lirong Yuan
This allows gdb to access the target’s auxiliary vector,
which can be helpful for telling system libraries important details
about the hardware, operating system, and process.
[AJB: minor tweaks to test case, update MAINTAINERS]
Signed-off-by: Lirong Yuan
Signed-off-by: Alex
Hi,
This is gathering together my maintainer trees into one place in
advance of putting together a pull request next week. There are:
- gdbstub: more tests and tweaks to SVE handling for ARM
- semihosting: common code and enabling for RiscV
- some minor test and devtool tweaks
Last chance
On 21-01-08 22:30:59, Alex Bennée wrote:
>
> Ben Widawsky writes:
>
> > On 21-01-08 12:19:35, Alex Bennée wrote:
> >> GNU Global is another tags engine which is more like cscope in being
> >> able to support finding both references and definitions. You will be
> >> un-surprised to know it also
Public bug reported:
=== Reproducer ===
cat << EOF | ../build/qemu-system-i386 -machine q35 \
-nodefaults -device rtl8139,netdev=net0 \
-netdev user,id=net0 -display none -qtest stdio
outl 0xcf8 0x8804
outb 0xcfc 0x26
outl 0xcf8 0x8817
outb 0xcfc 0xff
write 0x1 0x1 0x42
write 0x5 0x1
On 1/8/21 8:51 AM, Leif Lindholm wrote:
> When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the
> TminLine field in bits [37:32].
> Extend the ctr field to be able to hold this context.
>
> Signed-off-by: Leif Lindholm
> ---
> target/arm/cpu.h | 2 +-
> 1 file changed, 1
Keith Packard writes:
> This series adds support for RISC-V Semihosting, version 0.2 as
> specified here:
>
> https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
>
> This specification references the ARM semihosting release 2.0 as
> specified here:
>
>
Ben Widawsky writes:
> On 21-01-08 12:19:35, Alex Bennée wrote:
>> GNU Global is another tags engine which is more like cscope in being
>> able to support finding both references and definitions. You will be
>> un-surprised to know it also integrates well with Emacs.
>>
>> The main benefit of
On Fri, 8 Jan 2021 at 22:17, BALATON Zoltan wrote:
>
> Use the PCI_BUS type cast macro to convert result of qdev_get_child_bus().
> Also remove the check for NULL afterwards which should not be needed
> because sysbus_create_simple() uses error_abort and we create the PCI
> host object here
On Fri, 8 Jan 2021 at 22:17, BALATON Zoltan wrote:
>
> This reverts commit e6d5106786 which was added mistakenly. While this
> change works it was suggested during review that keeping dependencies
> explicit for each board may be better than listing them in a common
> option so keep the previous
On Fri, 8 Jan 2021 at 22:17, BALATON Zoltan wrote:
>
> This reverts commit 038da2adf that was mistakenly added, this
> dependency is still needed to get libfdt dependencies even if fdt.o is
> not needed by sam460ex.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/ppc/Kconfig | 1 +
> 1 file
On Fri, 8 Jan 2021 at 21:47, Roman Bolshakov wrote:
>
> On Fri, Jan 08, 2021 at 03:05:55PM +, Peter Maydell wrote:
> > This menu bar breakage appears to be caused by this patch. I have
> > no idea why, because the patch looks pretty harmless. Nonetheless,
> > I'm going to have to drop it from
This reverts commit 038da2adf that was mistakenly added, this
dependency is still needed to get libfdt dependencies even if fdt.o is
not needed by sam460ex.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index
Use the PCI_BUS type cast macro to convert result of qdev_get_child_bus().
Also remove the check for NULL afterwards which should not be needed
because sysbus_create_simple() uses error_abort and we create the PCI
host object here that's expected to have a PCI bus so this shouldn't
fail. Even if
Accidentally the wrong version of this series was committed, this
series fixes that up to the last version that was meant to be merged.
This v2 is rebased on Peter's UIC series and clarifies commit message
of last patch.
Based-on: <20210108171212.16500-1-peter.mayd...@linaro.org>
BALATON Zoltan
This reverts commit e6d5106786 which was added mistakenly. While this
change works it was suggested during review that keeping dependencies
explicit for each board may be better than listing them in a common
option so keep the previous version and revert this change.
Signed-off-by: BALATON Zoltan
On Fri, 8 Jan 2021, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
Reviewed-by: BALATON Zoltan
Regards,
BALATON Zoltan
---
v1->v2 changes:
* fix typo
On Fri, Jan 08, 2021 at 03:05:55PM +, Peter Maydell wrote:
> On Fri, 8 Jan 2021 at 15:00, Peter Maydell wrote:
> >
> > On Fri, 8 Jan 2021 at 13:50, Peter Maydell wrote:
> > >
> > > On Sat, 2 Jan 2021 at 15:14, Roman Bolshakov
> > > wrote:
> > > >
> > > > ui/cocoa.m:1188:44: warning:
QEMU documentation can't be opened if QEMU is run from build tree
because executables are placed in the top of build tree after conversion
to meson.
Signed-off-by: Roman Bolshakov
---
ui/cocoa.m | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index
On Fri, Jan 8, 2021 at 3:59 PM Thomas Huth wrote:
>
> There was a race condition in the first test where there was already the
> "crw" output in the dmesg, but the "0.0.4711" entry has not been created
> in the /sys fs yet. Fix it by waiting until it is there.
>
> The second test has even more
On Fri, Jan 08, 2021 at 03:00:07PM +, Peter Maydell wrote:
> On Fri, 8 Jan 2021 at 13:50, Peter Maydell wrote:
> >
> > On Sat, 2 Jan 2021 at 15:14, Roman Bolshakov wrote:
> > >
> > > ui/cocoa.m:1188:44: warning: 'openFile:' is deprecated: first deprecated
> > > in macOS 11.0 - Use
On 08/01/21 20:08, huang...@chinatelecom.cn wrote:
QEMU enable the dirty ring feature by specifing the "-accel" sub-parameter.
https://lore.kernel.org/qemu-devel/20210108165050.406906-10-pet...@redhat.com/
Libvirt use "-machine accel=kvm" option to specify the accelerator by default,
which is
And add a couple of FreeBSD people I also forgot to CC.
Warner
On Fri, Jan 8, 2021 at 12:56 PM Peter Maydell
wrote:
> Adding the people to the CC list who were on the previous discussion
> thread...
>
> -- PMM
>
>
> On Fri, 8 Jan 2021 at 19:43, Warner Losh wrote:
> >
> > The FreeBSD project
Hello,
I would really appreciate if anyone could confirm that someone is
actually taking a look at this case.
If you need more information / test, again feel free to ask!
Regards,
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
On 1/8/21 9:51 AM, Peter Maydell wrote:
> In commit cd8be50e58f63413c0 we converted the A32 coprocessor
> insns to decodetree. This accidentally broke XScale/iWMMXt insns,
> because it moved the handling of "cp insns which are handled
> by looking up the cp register in the hashtable" from after
On 08/01/21 20:29, Roman Bolshakov wrote:
Paolo,
I tried to use extract_all_objects() to get all object files directly
but it doesn't work on dependency objects defined via
declare_dependency(). It works only on regular targets (libs and
executables). And as far as I understand the intention to
On Mon, 21 Dec 2020 at 15:24, Philippe Mathieu-Daudé wrote:
> On 12/21/20 6:28 AM, Guenter Roeck wrote:
> > 84: ec432000mar acc0, r2, r3
> >
> >
> > This is supposed to be a DSP or iWMMXt coprocessor instruction.
> > I did notice that the
Adding the people to the CC list who were on the previous discussion thread...
-- PMM
On Fri, 8 Jan 2021 at 19:43, Warner Losh wrote:
>
> The FreeBSD project has rewritten bsd-user. We've been working on this for
> quite some time (the earliest commits date from 2013). Maybe a dozen people
>
On Fri, 8 Jan 2021 at 18:56, Guenter Roeck wrote:
>
> On 1/8/21 9:25 AM, Peter Maydell wrote:
> > On Mon, 21 Dec 2020 at 16:01, Guenter Roeck wrote:
> >> Something like the following should do.
> >>
> >> qemu-system-arm -M z2 -kernel arch/arm/boot/zImage -no-reboot \
> >> -initrd
In commit cd8be50e58f63413c0 we converted the A32 coprocessor
insns to decodetree. This accidentally broke XScale/iWMMXt insns,
because it moved the handling of "cp insns which are handled
by looking up the cp register in the hashtable" from after the
call to the legacy disas_xscale_insn() decode
On Thu, Jan 07, 2021 at 08:41:50PM +0100, Paolo Bonzini wrote:
> Il gio 7 gen 2021, 20:36 Roman Bolshakov ha scritto:
>
> > > No I think that Meson should simply explode link_whole libraries to their
> > > constituent objects. This way duplicates are avoided.
> > >
> >
> > Ok. I've looked
On 1/8/21 5:20 AM, David Hildenbrand wrote:
> This series fixes booting current upstream Linux kernel compiled by
> clang-11 and clang-12 under TCG.
>
> Decided to pull in already separatly sent patches. The last patch is
> not required to fix the boot issues, but related to patch #3.
>
> Latest
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> In our EXECUTE fast path, we have to ignore the content of r0, if
> specified by b1 or b2.
>
> Fixes: d376f123c7de ("target/s390x: Re-implement a few EXECUTE target insns
> directly")
> Signed-off-by: David Hildenbrand
> ---
>
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> Using get_address() with register identifiers comming from an "r" field
> is wrong: if the "r" field designates "r0", we don't read the content
> and instead assume 0 - which should only be applied when the register
> was specified via "b" or "x".
>
>
The FreeBSD project has rewritten bsd-user. We've been working on this for
quite some time (the earliest commits date from 2013). Maybe a dozen people
have worked on this over time, and there's 3 or 4 active developers focused
on FreeBSD changes at the moment.
For a while, we'd merge in upstream
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> RISBHG is broken and currently hinders clang-11 builds of upstream kernels
> from booting: the kernel crashes early, while decompressing the image.
>
> [...]
>Kernel fault: interruption code 0005 ilc:2
>Kernel random base:
>
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> Looks like something went wrong whiel touching that line. Instead of "r1"
> we need a new temporary. Also, we have to pass MO_TEQ, to indicate that
> we are working with 64-bit values. Let's revert these changes.
>
> Fixes: ff26d287bddc
** Changed in: qemu
Status: New => In Progress
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https://bugs.launchpad.net/bugs/1904954
Title:
lan9118 bug peeked received message size not equal to actual received
message
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequency and duty_cycle. Both are computed using inputs
from software side.
This module does not model detail pulse signals since it is
On Fri, Jan 8, 2021 at 1:45 AM David Hildenbrand wrote:
>
> On 08.01.21 03:20, Nick Desaulniers wrote:
> > On Thu, Jan 7, 2021 at 3:27 PM David Hildenbrand
> > wrote:
> >>
> >>
> >>> Am 08.01.2021 um 00:21 schrieb Nick Desaulniers :
> >>>
> >>> On Thu, Jan 7, 2021 at 3:13 PM David Hildenbrand
QEMU enable the dirty ring feature by specifing the "-accel" sub-parameter.
https://lore.kernel.org/qemu-devel/20210108165050.406906-10-pet...@redhat.com/
Libvirt use "-machine accel=kvm" option to specify the accelerator by default,
which is incompatible with above option.
This patch introduce
We add a qtest for the PWM in the previous patch. It proves it works as
expected.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
Reviewed-by: Peter Maydell
---
tests/qtest/meson.build| 1 +
tests/qtest/npcm7xx_pwm-test.c | 490
A device shouldn't access its parent object which is QOM internal.
Instead it should use type cast for this purporse. This patch fixes this
issue for all NPCM7XX Devices.
Signed-off-by: Hao Wu
Reviewed-by: Peter Maydell
---
hw/arm/npcm7xx_boards.c | 2 +-
hw/mem/npcm7xx_mc.c | 2 +-
The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores it in the ADC_DATA register when enabled.
Users can alter input value by using qom-set QMP command.
Reviewed-by: Havard Skinnemoen
This patch allows NPCM7XX CLK module to compute clocks that are used by
other NPCM7XX modules.
Add a new struct NPCM7xxClockConverterState which represents a
single converter. Each clock converter in CLK module represents one
converter in NPCM7XX CLK Module(PLL, SEL or Divider). Each converter
This patch makes NPCM7XX Timer to use a the timer clock generated by the
CLK module instead of the magic number TIMER_REF_HZ.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx.c | 5
hw/timer/npcm7xx_timer.c | 39
This patch series include a few more NPCM7XX devices including
- Analog Digital Converter (ADC)
- Pulse Width Modulation (PWM)
We also modified the CLK module to generate clock values using qdev_clock.
These clocks are used to determine various clocks in NPCM7XX devices.
Thank you for your
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