On Jul 6 19:34, Jinhao Fan wrote:
> at 2:43 AM, Keith Busch wrote:
>
> > On Tue, Jul 05, 2022 at 07:11:36PM +0200, Klaus Jensen wrote:
> >> On Jul 5 22:24, Jinhao Fan wrote:
> >>> @@ -1374,7 +1374,14 @@ static void nvme_enqueue_req_completion(NvmeCQueue
> >>> *cq, NvmeRequest *req)
> >>>
>
On Mon, Jul 04, 2022 at 01:25:14PM +0300, Roman Kagan wrote:
> It's possible to create non-working configurations by attaching a device
> to a derivative of PCIe slot (pcie-root-port, ioh3420, etc) and
> specifying a slot number other that zero, e.g.:
>
> -device pcie-root-port,id=s0,... \
>
On Wed, Jul 06, 2022 at 10:43:12PM +0300, Roman Kagan wrote:
> On Wed, Jul 06, 2022 at 09:38:39PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> > On 7/4/22 13:25, Roman Kagan wrote:
> > > It's possible to create non-working configurations by attaching a device
> > > to a derivative of PCIe slot
From: Vladimir Sementsov-Ogievskiy
Do not merge: this is a copy of Vladimir's fix that will be taken in
through the iotests tree.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Signed-off-by: John Snow
---
tests/qemu-iotests/tests/copy-before-write | 5 +
1 file changed, 5 insertions(+)
The old CentOS image didn't work anymore because it was already EOL at
the beginning of 2022.
Signed-off-by: John Snow
Reviewed-by: Thomas Huth
---
tests/vm/centos | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/vm/centos b/tests/vm/centos
index
The fedora container has since been split apart, so there's no suitable
nearby target that would support "test-mingw" as it requires both x32
and x64 support -- so either fedora-cross-win32 nor fedora-cross-win64
would be truly suitable.
Just remove this test as superfluous with our current CI
Do not merge: Staged in Hanna's branch.
Signed-off-by: John Snow
---
tests/qemu-iotests/108 | 5 +
1 file changed, 5 insertions(+)
diff --git a/tests/qemu-iotests/108 b/tests/qemu-iotests/108
index 9e923d6a59f..54e935acf28 100755
--- a/tests/qemu-iotests/108
+++ b/tests/qemu-iotests/108
@@
This checksum changes weekly; use a fixed point image and update the
checksum so we don't have to re-download it quite so much.
Note: Just like the centos.aarch64 test, this test currently seems very
flaky when run as a TCG test.
Signed-off-by: John Snow
---
tests/vm/ubuntu.aarch64 | 8
18.04 has fallen out of our support window, so move ubuntu.aarch64
forward to ubuntu 20.04, which is now our oldest supported Ubuntu
release.
Signed-off-by: John Snow
---
tests/vm/ubuntu.aarch64 | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
In some container environments, there may be references to block devices
witnessable from a container through /proc/self/mountinfo that reference
devices we simply don't have access to in the container, and cannot
provide information about.
Instead of failing the entire fsinfo command, return
If the initial setup fails, you've permanently altered the state of the
downloaded image in an unknowable way. Use 'cp' like our other test
setup scripts do.
Signed-off-by: John Snow
Reviewed-by: Thomas Huth
---
tests/vm/centos | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Do not merge; staged in Hanna's branch.
Signed-off-by: John Snow
---
tests/qemu-iotests/223.out | 4 ++--
tests/qemu-iotests/307.out | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/qemu-iotests/223.out b/tests/qemu-iotests/223.out
index 06479415312..26fb347c5da
Note: patches 11-13 are included for testing simplicity, they shouldn't
be merged. They will be included in a forthcoming block PR.
This patch series attempts to improve the reliability of several of the
VM test targets. In particular, both CentOS 8 tests are non-functional
because CentOS 8 was
If you try to run a 16 or 32 threaded test, you're going to run out of
memory very quickly with qom-test and a few others. Bump the memory
limit to try to scale with larger-core machines.
Granted, this means that a 16 core processor is going to ask for 16GB,
but you *probably* meet that
This is listed twice by accident; we require genisoimage to run the
test, so remove the unconditional entry.
Signed-off-by: John Snow
Reviewed-by: Thomas Huth
---
tests/vm/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/vm/Makefile.include
Ubuntu 18.04 is out of our support window, and Ubuntu 20.04 does not
support i386 anymore. The debian project does, but they do not provide
any cloud images for it, a new expect-style script would have to be
written.
Since we have i386 cross-compiler tests hosted on GitLab CI, we don't
need to
One method to enable PCI bus mastering for IDE controllers, often used
by x86 firmware, is to write 0x7 to the PCI command register. Neither
the PIIX3 specification nor actual hardware (a Tyan S1686D system)
permit modification of the Memory Space Enable (MSE) bit, 1, and thus
the command
CHS-based disk utilities and operating systems may adjust the logical
geometry of a hard drive to cope with the expectations or limitations
of software using the ATA INITIALIZE_DEVICE_PARAMETERS command.
Prior to this patch, INITIALIZE_DEVICE_PARAMETERS was a nop that
always returned success,
Verify correction of EXECUTE DEVICE DIAGNOSTIC introduced in commit
72423831c3 (hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE
DIAGNOSTIC, 2022-05-28).
Signed-off-by: Lev Kujawski
---
tests/qtest/ide-test.c | 33 +
1 file changed, 33 insertions(+)
diff
Prior to this patch, cmd_exec_dev_diagnostic relied upon
ide_set_signature to clear the device register. While the
preservation of the drive bit by ide_set_signature is necessary for
the DEVICE RESET, IDENTIFY DEVICE, and READ SECTOR commands,
ATA/ATAPI-6 specifies that "DEV shall be cleared to
Devices like the PIIX3/4 IDE controller do not support certain modes
of operation, such as memory space accesses, and indicate this lack of
support by hardwiring the applicable bits to zero. Extend the QEMU
PCI device testing framework to accommodate such devices.
* tests/qtest/libqos/pci.h: Add
Change 'tmp_path' into an array of two members to accommodate another
disk image of size TEST_IMAGE_SIZE. This facilitates testing ATA
protocol aspects peculiar to secondary devices on the same controller.
Signed-off-by: Lev Kujawski
---
tests/qtest/ide-test.c | 38
Eliminate the remaining TODOs in hw/ide/piix.c by:
* Using pci_set_{size} functions to write the PIIX PCI configuration
space instead of manipulating it directly as an array; and
* Documenting the default register values by reference to the
controlling specification.
Signed-off-by: Lev
://gitlab.com/danielhb/qemu.git tags/pull-ppc-20220706
for you to fetch changes up to 0b83377f46042529adbbf3a77f7ffb6f1e8a0aaa:
target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 (2022-07-06 10:30:01
-0300)
ppc patch queue for 2022
Signed-off-by: Iris Chen
---
Addressing all comments.
In reponse to this comment:
"Something wrong will occur if all block_protect[0123] are zeroes",
the code actually ignores num_protected_sectors when block_protect_value = 0
which happens when block_protect[0123] are zeroes.
You can refer to
Seen on my ubuntu 22.04 laptop:
86/591 qemu:qtest+qtest-i386 / qtest-i386/qos-test ERROR
10.74s killed by signal 6 SIGABRT
# child process (/i386/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-net-pci/virti
'linux' is not usable as identifier, because C compilers targeting
Linux predefine it as a macro expanding to 1. Add it to
@polluted_words. 'unix' is already there.
Suggested-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
Signed-off-by: zhenwei pi
---
scripts/qapi/common.py | 2 +-
1
Hey Alistair,
On Tue, Jul 05, 2022 at 03:09:09AM +0200, Jason A. Donenfeld wrote:
> Hi Alistair,
>
> On Wed, Jun 29, 2022 at 4:09 AM Alistair Francis wrote:
> > I have a Linux 5.8 test case that is failing due to this patch.
>
> Before I started fixing things in random.c, there were a lot of
v3 -> v4:
- Separate qapi script change from qga.
v2 -> v3:
- Rename 'GuestOsType' to 'GuestCpuStatsType'.
- Add 'linux' into polluted_words, rename 'linuxos' to 'linux'. Remove
'windows' from 'GuestCpuStatsType', because currently we don't use it.
v1 -> v2:
- Konstantin & Marc-André pointed
On 7/6/22 21:08, Thomas Huth wrote:
From: Philippe Mathieu-Daudé
If we don't need to emulate any target, we certainly don't need TCG.
This should also help to compile again with
".../configure --enable-tools --disable-system --disable-user"
on systems that do not have a TCG backend.
A vCPU thread always reaches 100% utilization when:
- guest uses idle=poll
- disable HLT vm-exit
- enable MWAIT
Add new guest agent command 'guest-get-cpustats' to get guest CPU
statistics, we can know the guest workload and how busy the CPU is.
Reviewed-by: Marc-André Lureau
Signed-off-by:
On Sat, Jul 02, 2022 at 11:30:16PM +0900, Akihiko Odaki wrote:
> Reviewed-by: Akihiko Odaki
Just checking in on the status of this: do I need to submit a pull request?
Or will this patch be picked up in a miscellaneous pull queue eventually?
>
> On 2022/07/02 13:43, Peter Delevoryas wrote:
> >
On 7/6/22 22:17, Peter Maydell wrote:
On Wed, 6 Jul 2022 at 10:11, Richard Henderson
wrote:
We can reuse the SVE functions for implementing moves to/from
horizontal tile slices, but we need new ones for moves to/from
vertical tile slices.
Signed-off-by: Richard Henderson
+/*
+ * Move
On Sat, Jul 02, 2022 at 11:56:04AM -0700, Peter Delevoryas wrote:
> I like to build QEMU from the root source directory, rather than cd'ing
> into the build directory. This code may as well include a search path
> for that, so that you can run avocado tests individually without
> specifying "-p
On Wed, Jul 06, 2022 at 09:46:48AM -0700, Peter Delevoryas wrote:
> On Wed, Jul 06, 2022 at 09:02:14AM +0100, Daniel P. Berrangé wrote:
> > On Tue, Jul 05, 2022 at 02:46:59PM -0700, Peter Delevoryas wrote:
> > > I noticed that I can't run any avocado tests on macOS because the QMP
> > > unix
/vivier/qemu-m68k.git tags/m68k-for-7.1-pull-request
for you to fetch changes up to a988465d0eb7e2ee31a3679bbe3fbe71681820da:
m68k: virt: pass RNG seed via bootinfo block (2022-07-06 12:30:41 +0200)
Pull request m68k 20220706
pass RNG
Relocate the ioport80 functionality within hw/i386/pc.c into a new ISA
POST card device (postcard.c) that is capable of being instantiated at
different ports as well, such as for the following platforms [1]:
0x84 for COMPAQ
0x90 for PS/2 (ISA)
0x300 for AWARD BIOS
0x680 for PS/2 (MCA)
Verify that port 0x80 behavior corresponds with i440FX hardware.
Despite the name of the device, said behavior is implemented by the
system board and does not depend upon the actual presence of a POST
card.
In particular:
a) Writes to port 0x80 are retained and may be read afterwards.
b) Word
On 29/6/22 18:08, Daniel P. Berrangé wrote:
Currently we check status of each submodule, before actually checking
if we're in a git repo. These status commands will all fail, but we
are hiding their output so we don't see it currently.
Signed-off-by: Daniel P. Berrangé
---
In order to make it thread safe, implement a "fake rwlock",
where we allow reads under BQL *or* job_mutex held, but
writes only under BQL *and* job_mutex.
The only write we have is in child_job_set_aio_ctx, which always
happens under drain (so the job is paused).
For this reason, introduce
Am 05/07/2022 um 15:07 schrieb Stefan Hajnoczi:
> On Wed, Jun 29, 2022 at 10:15:35AM -0400, Emanuele Giuseppe Esposito wrote:
>> Change the job_{lock/unlock} and macros to use job_mutex.
>>
>> Now that they are not nop anymore, remove the aiocontext
>> to avoid deadlocks.
>>
>> Therefore:
>> -
Change the job_{lock/unlock} and macros to use job_mutex.
Now that they are not nop anymore, remove the aiocontext
to avoid deadlocks.
Therefore:
- when possible, remove completely the aiocontext lock/unlock pair
- if it is used by some other function too, reduce the locking
section as much as
On 5/7/22 10:36, Richard Henderson wrote:
There is nothing in this environment variable that cannot
be done better with -d flags. There is nothing special
about TCI that warrants this hack.
Moreover, it does not compile -- remove it.
Reported-by: Song Gao
Signed-off-by: Richard Henderson
Once job lock is used and aiocontext is removed, mirror has
to perform job operations under the same critical section,
using the helpers prepared in previous commit.
Note: at this stage, job_{lock/unlock} and job lock guard macros
are *nop*.
Signed-off-by: Emanuele Giuseppe Esposito
On 4/7/22 09:08, Richard Henderson wrote:
Use the pre-packaged toolchain provided by Loongson via github.
Signed-off-by: Richard Henderson
---
configure | 5
tests/docker/Makefile.include | 2 ++
job_event_* functions can all be static, as they are not used
outside job.c.
Same applies for job_txn_add_job().
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
include/qemu/job.h | 18 --
job.c
On 4/7/22 12:59, Pavel Dovgalyuk wrote:
ping
This is the only non-reviewed patch in the series.
I've been looking for doc/datasheets but no luck (except the Linux
kernel comments).
What kind of testing are you doing?
On 20.06.2022 15:05, Pavel Dovgalyuk wrote:
This patch adds Cavium
On Wed, Jul 06, 2022 at 07:21:31PM +0200, Cédric Le Goater wrote:
> Some more controllers have been modeled recently. Reflect that in the
> list of supported devices. New machines were also added.
Looks good, thanks for this!
Reviewed-by: Peter Delevoryas
>
> Signed-off-by: Cédric Le Goater
Same as AIO_WAIT_WHILE macro, but if we are in the Main loop
do not release and then acquire ctx_ 's aiocontext.
Once all Aiocontext locks go away, this macro will replace
AIO_WAIT_WHILE.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Vladimir
These public functions are not used anywhere, thus can be dropped.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
blockjob.c | 30 --
include/block/blockjob.h | 36 +---
2 files changed, 13
iostatus is the only field (together with .job) that needs
protection using the job mutex.
It is set in the main loop (GLOBAL_STATE functions) but read
in I/O code (block_job_error_action).
In order to protect it, change block_job_iostatus_set_err
to block_job_iostatus_set_err_locked(), always
From: Matheus Ferst
Implements the Convert Binary Coded Decimal To Declets instruction.
Since libdecnumber doesn't expose the methods for direct conversion
(decDigitsToDPD, BCD2DPD, etc.), the BCD values are converted to
decimal32 format, from which the declets are extracted.
Where the behavior
They all are called with job_lock held, in job_event_*_locked()
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
blockjob.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/blockjob.c b/blockjob.c
index
Now that the API offers also _locked() functions, take advantage
of it and give also the caller control to take the lock and call
_locked functions.
This makes sense especially when we have for loops, because it
makes no sense to have:
for(job = job_next(); ...)
where each job_next() takes the
job mutex will be used to protect the job struct elements and list,
replacing AioContext locks.
Right now use a shared lock for all jobs, in order to keep things
simple. Once the AioContext lock is gone, we can introduce per-job
locks.
To simplify the switch from aiocontext to job lock,
These public functions are not used anywhere, thus can be dropped.
Also, since this is the final job API that doesn't use AioContext
lock and replaces it with job_lock, adjust all remaining function
documentation to clearly specify if the job lock is taken or not.
Signed-off-by: Emanuele Giuseppe
Not sure what the atomic here was supposed to do, since job.busy
is protected by the job lock. Since the whole function
is called under job_mutex, just remove the atomic.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Emanuele Giuseppe Esposito
---
blockjob.c | 2 +-
1 file changed, 1
From: Matheus Ferst
Adds an insns_flags2 for the BCD assist instructions introduced in
Power ISA 2.06. These instructions are not listed in the manuals for
e5500[1] and e6500[2], so the flag is only added for POWER7/8/9/10
models.
[1]
With "intact" we mean that all job.h functions implicitly
take the lock. Therefore API callers are unmodified.
This means that:
- many static functions that will be always called with job lock held
become _locked, and call _locked functions
- all public functions take the lock internally if
The same job lock is being used also to protect some of blockjob fields.
Categorize them just as done in job.h.
Signed-off-by: Emanuele Giuseppe Esposito
---
include/block/blockjob.h | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/include/block/blockjob.h
From: Víctor Colombo
Signed-off-by: Víctor Colombo
Reviewed-by: Matheus Ferst
Message-Id: <20220629162904.105060-7-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/insn32.decode | 5
target/ppc/translate/fp-impl.c.inc | 41
Just as done with job.h, create _locked() functions in blockjob.h
These functions will be later useful when caller has already taken
the lock. All blockjob _locked functions call job _locked functions.
Note: at this stage, job_{lock/unlock} and job lock guard macros
are *nop*.
Signed-off-by:
We are always using the given bs AioContext, so there is no need
to take the job ones (which is identical anyways).
This also reduces the point we need to check when protecting
job.aio_context field.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Emanuele Giuseppe Esposito
---
block/commit.c | 4
From: Paolo Bonzini
We want to make sure access of job->aio_context is always done
under either BQL or job_mutex. The problem is that using
aio_co_enter(job->aiocontext, job->co) in job_start and job_enter_cond
makes the coroutine immediately resume, so we can't hold the job lock.
And caching it
From: Matheus Ferst
And also move the insn to decodetree
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-6-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h | 2 +-
In this series, we want to remove the AioContext lock and instead
use the already existent job_mutex to protect the job structures
and list. This is part of the work to get rid of AioContext lock
usage in favour of smaller granularity locks.
In order to simplify reviewer's job, job lock/unlock
Categorize the fields in struct Job to understand which ones
need to be protected by the job mutex and which don't.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
include/qemu/job.h | 61 +++---
1 file changed, 36
Add missing job synchronization in the unit tests, with
explicit locks.
We are deliberately using _locked functions wrapped by a guard
instead of a normal call because the normal call will be removed
in future, as the only usage is limited to the tests.
In other words, if a function like
From: Matheus Ferst
And also move the insn to decodetree.
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-3-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h | 2 +-
This comment applies more on job, it was left in blockjob as in the past
the whole job logic was implemented there.
Note: at this stage, job_{lock/unlock} and job lock guard macros
are *nop*.
No functional change intended.
Signed-off-by: Emanuele Giuseppe Esposito
---
blockjob.c | 20
From: Pali Rohár
Commit 80d11f4467c4 ("Add definitions for Freescale PowerPC implementations")
changed core type of MPC8555 and MPC8560 from e500v1 to e500v2.
But both MPC8555 and MPC8560 have just e500v1 cores, there are no features
of e500v2 cores. It can be verified by reading NXP
From: Matheus Ferst
Also drop VECTOR_FOR_INORDER_I usage since there is no need to access
the elements in any particular order, and move the instruction to
decodetree.
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-2-matheus.fe...@eldorado.org.br>
From: Murilo Opsfelder Araujo
All ppc CPUs represent hardware that exists in the real world, i.e.: we
do not have a "max" CPU with all possible emulated features enabled.
Return the default CPU type for the machine because that has greater
chance of being useful as the "max" CPU.
Resolves:
Both blockdev.c and job-qmp.c have TOC/TOU conditions, because
they first search for the job and then perform an action on it.
Therefore, we need to do the search + action under the same
job mutex critical section.
Note: at this stage, job_{lock/unlock} and job lock guard macros
are *nop*.
From: Matheus Ferst
Implements the following Power ISA v2.06 instruction:
addg6s: Add and Generate Sixes
Signed-off-by: Matheus Ferst
Signed-off-by: Víctor Colombo
Reviewed-by: Víctor Colombo
Message-Id: <20220629162904.105060-10-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique
From: Alexey Kardashevskiy
PAPR 2.8 (2018) defines an extension to return 64bit value for
the largest TCE block in "ibm,query-pe-dma-window". Recent Linux kernels
support this already.
This adds the extension and supports the older format.
This advertises a bigger window for the new format as
From: Víctor Colombo
Signed-off-by: Víctor Colombo
Reviewed-by: Matheus Ferst
Message-Id: <20220629162904.105060-6-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/insn32.decode | 4
target/ppc/translate/fp-impl.c.inc | 35
From: Thomas Huth
QEMU emulates a *lot* of PowerPC-based machines - having a CPU
that is named "default" and cannot be used with most of those
machines sounds just wrong. Thus let's remove this old and confusing
alias now.
Signed-off-by: Thomas Huth
Reviewed-by: Greg Kurz
Reviewed-by: Cédric
From: Alexey Kardashevskiy
PAPR+/LoPAPR says:
===
The platform must restore the default DMA window for the PE on a call
to the ibm,remove-pe-dma-window RTAS call when all of the following
are true:
a. The call removes the last DMA window remaining for the PE.
b. The DMA window being removed is
From: Víctor Colombo
Signed-off-by: Víctor Colombo
Reviewed-by: Matheus Ferst
Message-Id: <20220629162904.105060-3-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/insn32.decode | 8 +++
target/ppc/internal.h | 3 --
From: Víctor Colombo
Signed-off-by: Víctor Colombo
Reviewed-by: Matheus Ferst
Message-Id: <20220629162904.105060-4-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/insn32.decode | 4 +++
target/ppc/translate/fp-impl.c.inc | 46
From: Matheus Ferst
Implements the Convert Declets To Binary Coded Decimal instruction.
Since libdecnumber doesn't expose the methods for direct conversion
(decDigitsFromDPD, DPD2BCD, etc), a positive decimal32 with zero
exponent is used as an intermediate value to convert the declets.
From: Víctor Colombo
Some lines in insn32.decode have inconsistent alignment when compared
to others.
Fix this by changing the alignment of some lines, making it more
consistent throughout the file.
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
Message-Id:
It's unneeded. No other PCIE_BUS implements this interface.
Reviewed-by: Frederic Barrat
Fixes: 4f9924c4d4cf ("ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge")
Signed-off-by: Daniel Henrique Barboza
Message-Id: <20220621173436.165912-9-danielhb...@gmail.com>
---
hw/pci-host/pnv_phb4.c |
From: Alexey Kardashevskiy
It keeps repeating, move it to the header. This uses __builtin_ffsll() to
allow using the macros in #define.
This is not using the QEMU's FIELD macros as this would require changing
all such macros found in skiboot (the PPC PowerNV firmware).
Signed-off-by: Alexey
From: Víctor Colombo
Signed-off-by: Víctor Colombo
Reviewed-by: Matheus Ferst
Message-Id: <20220629162904.105060-5-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/insn32.decode | 1 +
target/ppc/translate/fp-impl.c.inc | 38
From: Alexey Kardashevskiy
The new PAPR 2.12 defines a watchdog facility managed via the new
H_WATCHDOG hypercall.
This adds H_WATCHDOG support which a proposed driver for pseries uses:
https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=303120
This was tested by running QEMU with a
The function is working today by getting all the child objects of the
chip, interacting with each of them to check whether the child is a PHB,
and then doing what needs to be done.
We have all the chip PHBs in the phbs[] array so interacting with all
child objects is unneeded. Open code
From: Matheus Ferst
And also move the insn to decodetree and remove the now unused
avr_qw_not, avr_qw_cmpu, and avr_qw_add methods.
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-8-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique
From: Víctor Colombo
Add mffsce test to check both the return value and the new fpscr
stored in the cpu.
Signed-off-by: Víctor Colombo
Reviewed-by: Matheus Ferst
Message-Id: <20220629162904.105060-8-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
From: Matheus Ferst
And also move the insns to decodetree.
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-7-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h | 4 +--
It's unneeded. No other PCIE_BUS implements this interface.
Reviewed-by: Frederic Barrat
Fixes: 9ae1329ee2fe ("ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge")
Signed-off-by: Daniel Henrique Barboza
Message-Id: <20220621173436.165912-8-danielhb...@gmail.com>
---
hw/pci-host/pnv_phb3.c |
pnv_ics_resend() is scrolling through all the child objects of the chip
to search for the PHBs. It's faster and simpler to just use the phbs[]
array.
pnv_ics_resend_child() was folded into pnv_ics_resend() since it's too
simple to justify its own function.
Reviewed-by: Cédric Le Goater
From: Matheus Ferst
And also move the insn to decodetree.
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-5-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h | 2 +-
From: Matheus Ferst
And also move the insns to decodetree and remove the now unused
avr_qw_addc method.
Signed-off-by: Matheus Ferst
Reviewed-by: Víctor Colombo
Message-Id: <20220606150037.338931-4-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h
It is not advisable to execute an object_dynamic_cast() to poke into
bus->qbus.parent and follow it up with a C cast into the PnvPHB type we
think we got.
In fact this is not needed. There is nothing sophisticated being done
with the PHB object retrieved during root_port_realize() for both PHB3
Creating a root port is something related to the PHB, not the PEC. It
also makes the logic more in line with what pnv-phb3 does.
Reviewed-by: Frederic Barrat
Reviewed-by: Cédric Le Goater
Signed-off-by: Daniel Henrique Barboza
Message-Id: <20220621173436.165912-2-danielhb...@gmail.com>
---
From: Víctor Colombo
FPSCR_* bit values in QEMU are in the 'inverted' order from what Power
ISA defines (e.g. FPSCR.FI is bit 46 but is defined as 17 in cpu.h).
Now that PPC_BIT_NR macro was introduced to fix this situation for the
MSR bits, we can use it for the FPSCR bits too.
Also, adjust
It's inneficient to scroll all child objects when we have all PHBs
available in chip8->phbs[].
pnv_chip_power8_pic_print_info_child() ended up folded into
pic_print_info() for simplicity.
Reviewed-by: Frederic Barrat
Signed-off-by: Daniel Henrique Barboza
Message-Id:
At this moment we leave the pnv-phb3(4)-root-port unattached in QOM:
/unattached (container)
(...)
/device[2] (pnv-phb3-root-port)
/bus master container[0] (memory-region)
/bus master[0] (memory-region)
/pci_bridge_io[0] (memory-region)
/pci_bridge_io[1]
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