Re: [qemu-web PATCH] blog: KVM Forum 2024 CFP

2024-05-06 Thread Thomas Huth
On 06/05/2024 12.13, Paolo Bonzini wrote: Add a new post linking to the KVM Forum 2024 Call for Presentations. Thanks to Stefan Hajnoczi for providing a draft of this post! Cc: Stefan Hajnoczi Signed-off-by: Paolo Bonzini --- _posts/2024-05-06-kvm-forum-cfp.md | 36

Re: [PATCH v4 06/17] xen: mapcache: Break out xen_ram_addr_from_mapcache_single

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Break out xen_ram_addr_from_mapcache_single(), a multi-cache aware version of xen_ram_addr_from_mapcache. No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 17 +++-- 1 file

Re: [PATCH v4 09/17] xen: mapcache: Break out xen_invalidate_map_cache_single()

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Break out xen_invalidate_map_cache_single(). No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 25 +++-- 1 file changed, 15 insertions(+), 10 deletions(-)

Re: [PATCH v4 07/17] xen: mapcache: Refactor xen_replace_cache_entry_unlocked

2024-05-06 Thread Philippe Mathieu-Daudé
On 2/5/24 08:32, Edgar E. Iglesias wrote: On Wed, May 1, 2024 at 10:46 PM Stefano Stabellini wrote: On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Add MapCache argument to xen_replace_cache_entry_unlocked in preparation for supporting multiple map caches. No

Call for Presentations: KVM Forum 2024

2024-05-06 Thread Paolo Bonzini
### KVM Forum 2024 September 22-23, 2024 Brno, Czech Republic https://kvm-forum.qemu.org/ ### KVM Forum is an annual event that presents a rare opportunity for developers and users to discuss the state of Linux virtualization technology and plan

[qemu-web PATCH] blog: KVM Forum 2024 CFP

2024-05-06 Thread Paolo Bonzini
Add a new post linking to the KVM Forum 2024 Call for Presentations. Thanks to Stefan Hajnoczi for providing a draft of this post! Cc: Stefan Hajnoczi Signed-off-by: Paolo Bonzini --- _posts/2024-05-06-kvm-forum-cfp.md | 36 ++ 1 file changed, 36 insertions(+)

Re: [PATCH-for-9.1 v2 2/3] migration: Remove RDMA protocol handling

2024-05-06 Thread Jinpu Wang
Hi Peter, hi Daniel, On Fri, May 3, 2024 at 4:33 PM Peter Xu wrote: > > On Fri, May 03, 2024 at 08:40:03AM +0200, Jinpu Wang wrote: > > I had a brief check in the rsocket changelog, there seems some > > improvement over time, > > might be worth revisiting this. due to socket abstraction, we

Re: [PATCH 1/3] qapi/vfio: Add VFIO device migration state change QAPI event

2024-05-06 Thread Avihai Horon
On 06/05/2024 7:52, Markus Armbruster wrote: External email: Use caution opening links or attachments Avihai Horon writes: On 01/05/2024 14:50, Joao Martins wrote: External email: Use caution opening links or attachments On 30/04/2024 06:16, Avihai Horon wrote: Add a new QAPI event

Re: [PATCH 1/3] qapi/vfio: Add VFIO device migration state change QAPI event

2024-05-06 Thread Avihai Horon
On 06/05/2024 7:35, Markus Armbruster wrote: External email: Use caution opening links or attachments Avihai Horon writes: On 02/05/2024 14:19, Markus Armbruster wrote: External email: Use caution opening links or attachments Avihai Horon writes: Add a new QAPI event for VFIO device

Re: [PATCH v4 14/17] xen: Add xen_mr_is_memory()

2024-05-06 Thread Philippe Mathieu-Daudé
On 2/5/24 09:26, David Hildenbrand wrote: On 30.04.24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Add xen_mr_is_memory() to abstract away tests for the xen_memory MR. Signed-off-by: Edgar E. Iglesias --- [...]   #endif diff --git a/system/physmem.c b/system/physmem.c index

Re: [PATCH v4 13/17] softmmu: Pass RAM MemoryRegion and is_write xen_map_cache()

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Propagate MR and is_write to xen_map_cache(). This is in preparation for adding support for grant mappings. No functional change. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 10 ++

Re: [PATCH v4 08/17] xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Add MapCache argument to xen_invalidate_map_cache_entry_unlocked. This is in preparation for supporting multiple map caches. No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 21

Re: [PATCH v4 05/17] xen: mapcache: Refactor xen_remap_bucket for multi-instance

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Add MapCache argument to xen_remap_bucket in preparation to support multiple map caches. No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 9 + 1 file changed, 5 insertions(+),

Re: [PATCH v4 04/17] xen: mapcache: Refactor xen_map_cache for multi-instance

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Make xen_map_cache take a MapCache as argument. This is in prepaparation to support multiple map caches. No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 35

Re: [PATCH v4 03/17] xen: mapcache: Refactor lock functions for multi-instance

2024-05-06 Thread Philippe Mathieu-Daudé
On 30/4/24 18:49, Edgar E. Iglesias wrote: From: "Edgar E. Iglesias" Make the lock functions take MapCache * as argument. This is in preparation for supporting multiple caches. No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-mapcache.c | 34

Re: [PATCH 3/4] hw/char: Add QOM property for STM32L4x5 USART clock frequency

2024-05-06 Thread Philippe Mathieu-Daudé
(+Luc & Damien for Clock API) On 6/5/24 11:34, Philippe Mathieu-Daudé wrote: Hi, On 5/5/24 16:05, Inès Varhol wrote: Signed-off-by: Inès Varhol ---   hw/char/stm32l4x5_usart.c | 12   1 file changed, 12 insertions(+) diff --git a/hw/char/stm32l4x5_usart.c

Re: [PATCH v5 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-05-06 Thread Anthony Harivel
Anthony Harivel, Apr 26, 2024 at 10:36: > > Hi Paolo, > > Daniel P. Berrangé, Apr 25, 2024 at 17:42: > > On Thu, Apr 25, 2024 at 05:34:52PM +0200, Anthony Harivel wrote: > > > Hi Daniel, > > > > > > Daniel P. Berrangé, Apr 18, 2024 at 18:42: > > > > > > > > +if (kvm_is_rapl_feat_enable(cs))

Re: [PATCH 2/4] hw/gpio: Handle clock migration in STM32L4x5 gpios

2024-05-06 Thread Philippe Mathieu-Daudé
Hi Inès, On 5/5/24 16:05, Inès Varhol wrote: Fixes: 1cdcfb6e93 ("hw/gpio: Implement STM32L4x5 GPIO") Signed-off-by: Inès Varhol --- hw/gpio/stm32l4x5_gpio.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/gpio/stm32l4x5_gpio.c b/hw/gpio/stm32l4x5_gpio.c index

Re: [PATCH 3/4] hw/char: Add QOM property for STM32L4x5 USART clock frequency

2024-05-06 Thread Philippe Mathieu-Daudé
Hi, On 5/5/24 16:05, Inès Varhol wrote: Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 12 1 file changed, 12 insertions(+) diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c index fc5dcac0c4..ee7727481c 100644 --- a/hw/char/stm32l4x5_usart.c +++

Re: [PATCH V8 6/8] physmem: Add helper function to destroy CPU AddressSpace

2024-05-06 Thread Peter Maydell
On Mon, 6 May 2024 at 10:06, Salil Mehta wrote: > > Hi Peter, > > Thanks for the review. > > > From: Peter Maydell > > When do we need to destroy a single address space in this way that means > > we need to keep a count of how many ASes the CPU currently has? The > > commit message talks

RE: [PATCH V8 3/8] hw/acpi: Update ACPI GED framework to support vCPU Hotplug

2024-05-06 Thread Salil Mehta via
> From: Zhao Liu > Sent: Monday, May 6, 2024 10:06 AM > > Hi Salil, > > On Fri, May 03, 2024 at 07:59:32PM +, Salil Mehta wrote: > > Date: Fri, 3 May 2024 19:59:32 + > > From: Salil Mehta > > Subject: RE: [PATCH V8 3/8] hw/acpi: Update ACPI GED framework to > > support

[PATCH v5 07/10] memory: Add Error** argument to memory_get_xlat_addr()

2024-05-06 Thread Cédric Le Goater
Let the callers do the reporting. This will be useful in vfio_iommu_map_dirty_notify(). Cc: "Michael S. Tsirkin" Cc: Paolo Bonzini Cc: David Hildenbrand Reviewed-by: Peter Xu Signed-off-by: Cédric Le Goater --- include/exec/memory.h | 15 ++- hw/vfio/common.c | 13

[PATCH v5 09/10] vfio: Also trace event failures in vfio_save_complete_precopy()

2024-05-06 Thread Cédric Le Goater
vfio_save_complete_precopy() currently returns before doing the trace event. Change that. Signed-off-by: Cédric Le Goater --- hw/vfio/migration.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/hw/vfio/migration.c b/hw/vfio/migration.c index

[PATCH v5 02/10] vfio: Add Error** argument to vfio_devices_dma_logging_start()

2024-05-06 Thread Cédric Le Goater
This allows to update the Error argument of the VFIO log_global_start() handler. Errors detected when device level logging is started will be propagated up to qemu_savevm_state_setup() when the ram save_setup() handler is executed. The vfio_set_migration_error() call becomes redundant in

[PATCH v5 06/10] vfio: Reverse test on vfio_get_dirty_bitmap()

2024-05-06 Thread Cédric Le Goater
It will simplify the changes coming after. Signed-off-by: Cédric Le Goater --- hw/vfio/common.c | 22 +- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index

[PATCH v5 10/10] vfio: Extend vfio_set_migration_error() with Error* argument

2024-05-06 Thread Cédric Le Goater
vfio_set_migration_error() sets the 'return' error on the migration stream if a migration is in progress. To improve error reporting, add a new Error* argument to also set the Error object on the migration stream, if a migration is progress. Signed-off-by: Cédric Le Goater --- Changes in v5:

[PATCH v5 08/10] vfio: Add Error** argument to .get_dirty_bitmap() handler

2024-05-06 Thread Cédric Le Goater
Let the callers do the error reporting. Add documentation while at it. Signed-off-by: Cédric Le Goater --- Changes in v5: - Replaced error_setg() by error_setg_errno() in vfio_devices_query_dirty_bitmap() and vfio_legacy_query_dirty_bitmap() - ':' -> '-' in vfio_iommu_map_dirty_notify()

[PATCH v5 03/10] vfio: Extend migration_file_set_error() with Error** argument

2024-05-06 Thread Cédric Le Goater
Use it to update the current error of the migration stream if available and if not, simply print out the error. Next changes will update with an error to report. Signed-off-by: Cédric Le Goater --- include/migration/misc.h | 2 +- hw/vfio/common.c | 2 +- hw/vfio/migration.c | 4

[PATCH v5 05/10] vfio: Add Error** argument to .vfio_save_config() handler

2024-05-06 Thread Cédric Le Goater
Use vmstate_save_state_with_err() to improve error reporting in the callers and store a reported error under the migration stream. Add documentation while at it. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater --- include/hw/vfio/vfio-common.h | 25 -

[PATCH v5 04/10] vfio: Use new Error** argument in vfio_save_setup()

2024-05-06 Thread Cédric Le Goater
Add an Error** argument to vfio_migration_set_state() and adjust callers, including vfio_save_setup(). The error will be propagated up to qemu_savevm_state_setup() where the save_setup() handler is executed. Modify vfio_vmstate_change_prepare() and vfio_vmstate_change() to store a reported error

[PATCH v5 01/10] vfio: Add Error** argument to .set_dirty_page_tracking() handler

2024-05-06 Thread Cédric Le Goater
We will use the Error object to improve error reporting in the .log_global*() handlers of VFIO. Add documentation while at it. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater --- Changes in v5: - Fixed typo in set_dirty_page_tracking documentation

[PATCH v5 00/10] vfio: Improve error reporting (part 2)

2024-05-06 Thread Cédric Le Goater
Hello, The motivation behind these changes is to improve error reporting to the upper management layer (libvirt) with a more detailed error, this to let it decide, depending on the reported error, whether to try migration again later. It would be useful in cases where migration fails due to lack

Re: [PATCH RESEND] virtio-net: fix bug 1451 aka "assert(!virtio_net_get_subqueue(nc)->async_tx.elem); "

2024-05-06 Thread Jason Wang
On Tue, Apr 30, 2024 at 6:54 PM Alexey Dobriyan wrote: > > Reproducer from https://gitlab.com/qemu-project/qemu/-/issues/1451 > creates small packet (1 segment, len = 10 == n->guest_hdr_len), > then destroys queue. > > "if (n->host_hdr_len != n->guest_hdr_len)" is triggered, if body creates >

RE: [PATCH V8 6/8] physmem: Add helper function to destroy CPU AddressSpace

2024-05-06 Thread Salil Mehta via
Hi Peter, Thanks for the review. > From: Peter Maydell > Sent: Saturday, May 4, 2024 2:41 PM > > On Tue, 12 Mar 2024 at 02:02, Salil Mehta > wrote: > > > > Virtual CPU Hot-unplug leads to unrealization of a CPU object. This > > also involves destruction of the CPU AddressSpace. Add

Re: [PATCH V8 3/8] hw/acpi: Update ACPI GED framework to support vCPU Hotplug

2024-05-06 Thread Zhao Liu
Hi Salil, On Fri, May 03, 2024 at 07:59:32PM +, Salil Mehta wrote: > Date: Fri, 3 May 2024 19:59:32 + > From: Salil Mehta > Subject: RE: [PATCH V8 3/8] hw/acpi: Update ACPI GED framework to support > vCPU Hotplug > > Hello, > > Sorry, I missed this earlier. > > > From: Zhao Liu > >

[PATCH v6 1/7] docs/migration: add qpl compression feature

2024-05-06 Thread Yuan Liu
add Intel Query Processing Library (QPL) compression method introduction Signed-off-by: Yuan Liu Reviewed-by: Nanhai Zou --- docs/devel/migration/features.rst| 1 + docs/devel/migration/qpl-compression.rst | 262 +++ 2 files changed, 263 insertions(+) create mode

[PATCH v6 5/7] migration/multifd: implement initialization of qpl compression

2024-05-06 Thread Yuan Liu
the qpl initialization includes memory allocation for compressed data and the qpl job initialization. the qpl job initialization will check if the In-Memory Analytics Accelerator(IAA) device is available and use the IAA device first. If the platform does not have IAA device or the IAA device is

[PATCH v6 7/7] tests/migration-test: add qpl compression test

2024-05-06 Thread Yuan Liu
add qpl to compression method test for multifd migration the qpl compression supports software path and hardware path(IAA device), and the hardware path is used first by default. If the hardware path is unavailable, it will automatically fallback to the software path for testing. Signed-off-by:

[PATCH v6 6/7] migration/multifd: implement qpl compression and decompression

2024-05-06 Thread Yuan Liu
each qpl job is used to (de)compress a normal page and it can be processed independently by the IAA hardware. All qpl jobs are submitted to the hardware at once, and wait for all jobs completion. If hardware path(IAA) is not available, use software for compression and decompression.

[PATCH v6 4/7] migration/multifd: add qpl compression method

2024-05-06 Thread Yuan Liu
add the Query Processing Library (QPL) compression method Introduce the qpl as a new multifd migration compression method, it can use In-Memory Analytics Accelerator(IAA) to accelerate compression and decompression, which can not only reduce network bandwidth requirement but also reduce host

[PATCH v6 3/7] configure: add --enable-qpl build option

2024-05-06 Thread Yuan Liu
add --enable-qpl and --disable-qpl options to enable and disable the QPL compression method for multifd migration. The Query Processing Library (QPL) is an open-source library that supports data compression and decompression features. It is based on the deflate compression algorithm and use Intel

[PATCH v6 2/7] migration/multifd: put IOV initialization into compression method

2024-05-06 Thread Yuan Liu
Different compression methods may require different numbers of IOVs. Based on streaming compression of zlib and zstd, all pages will be compressed to a data block, so two IOVs are needed for packet header and compressed data block. Signed-off-by: Yuan Liu Reviewed-by: Nanhai Zou ---

Re: [PATCH v2] MAINTAINERS: Update my email address

2024-05-06 Thread Philippe Mathieu-Daudé
On 5/5/24 09:23, Bin Meng wrote: From: Bin Meng The old Wind River email address (bin.m...@windriver.com) is no longer available due to an internal infrastructure change within the company. While a new email address (bin.meng...@windriver.com) has been assigned to me, I am unable to find a way

[PATCH v2 4/6] target/i386/kvm: Save/load MSRs of kvmclock2 (KVM_FEATURE_CLOCKSOURCE2)

2024-05-06 Thread Zhao Liu
MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to kvmclock2 (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSRs just like kvmclock MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 2 files changed, 18

[PATCH v2 5/6] target/i386/kvm: Drop workaround for KVM_X86_DISABLE_EXITS_HTL typo

2024-05-06 Thread Zhao Liu
The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit 77d361b13c19 ("linux-headers: Update to kernel mainline commit b357bf602"). Drop the related workaround. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 4 1 file changed, 4 deletions(-) diff --git a/target/i386/kvm/kvm.c

[PATCH v2 1/6] target/i386/kvm: Add feature bit definitions for KVM CPUID

2024-05-06 Thread Zhao Liu
Add feature definitions for KVM_CPUID_FEATURES in CPUID ( CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of offset calculations. Signed-off-by: Zhao Liu --- v2: Fixed a typo. v1: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*. (Xiaoyao) --- hw/i386/kvm/clock.c |

[PATCH v2 6/6] target/i386/confidential-guest: Fix comment of x86_confidential_guest_kvm_type()

2024-05-06 Thread Zhao Liu
Update the comment to match the X86ConfidentialGuestClass implementation. Reported-by: Xiaoyao Li Signed-off-by: Zhao Liu Reviewed-by: Pankaj Gupta --- target/i386/confidential-guest.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/confidential-guest.h

[PATCH v2 3/6] target/i386/kvm: Only save/load kvmclock MSRs when kvmclock enabled

2024-05-06 Thread Zhao Liu
MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old) kvmclock feature (KVM_FEATURE_CLOCKSOURCE). So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is enabled. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 12 1 file changed, 8

[PATCH v2 0/6] target/i386: Misc cleanup on KVM PV defs and outdated comments

2024-05-06 Thread Zhao Liu
Hi, This is my v2 cleanup series. Compared with v1 [1], only tags (R/b, S/b) updates, and a typo fix, no code change. This series picks cleanup from my previous kvmclock [2] (as other renaming attempts were temporarily put on hold). In addition, this series also include the cleanup on a

[PATCH v2 2/6] target/i386/kvm: Remove local MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME definitions

2024-05-06 Thread Zhao Liu
These 2 MSRs have been already defined in kvm_para.h (standard-headers/ asm-x86/kvm_para.h). Remove QEMU local definitions to avoid duplication. Reviewed-by: Xiaoyao Li Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git

[PATCH 1/3] vfio: Make VFIOIOMMUClass::attach_device() and its wrapper return bool

2024-05-06 Thread Zhenzhong Duan
Make VFIOIOMMUClass::attach_device() and its wrapper function vfio_attach_device() return bool. This is to follow the coding standand to return bool if 'Error **' is used to pass error. Suggested-by: Cédric Le Goater Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-common.h | 4

[PATCH 3/3] vfio: Make VFIOIOMMUClass::add_window() and its wrapper return bool

2024-05-06 Thread Zhenzhong Duan
Make VFIOIOMMUClass::add_window() and its wrapper function vfio_container_add_section_window() return bool. This is to follow the coding standand to return bool if 'Error **' is used to pass error. Suggested-by: Cédric Le Goater Signed-off-by: Zhenzhong Duan ---

[PATCH 2/3] vfio: Make VFIOIOMMUClass::setup() return bool

2024-05-06 Thread Zhenzhong Duan
This is to follow the coding standand to return bool if 'Error **' is used to pass error. Suggested-by: Cédric Le Goater Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-container-base.h | 2 +- hw/vfio/container.c | 10 +- hw/vfio/spapr.c

[PATCH 0/3] Cleanup VFIOIOMMUClass callback return with bool

2024-05-06 Thread Zhenzhong Duan
Hi This is a cleanup series to change VFIOIOMMUClass callbacks to return bool when the error is passed through errp parameter. See discussion at https://lists.gnu.org/archive/html/qemu-devel/2024-04/msg04782.html It looks many functions in VFIO sub-system need same change, so this can be a

[PATCH v3] mc146818rtc: add a way to generate RTC interrupts via QMP

2024-05-06 Thread Daniil Tatianin
This can be used to force-synchronize the time in guest after a long stop-cont pause, which can be useful for serverless-type workload. Also add a comment to highlight the fact that this (and one other QMP command) only works for the MC146818 RTC controller. Signed-off-by: Daniil Tatianin ---

[PATCH v2 17/25] target/i386: move C0-FF opcodes to new decoder (except for x87)

2024-05-06 Thread Paolo Bonzini
The shift instructions are rewritten instead of reusing code from the old decoder. Rotates use CC_OP_ADCOX more extensively and generally rely more on the optimizer, so that the code generators are shared between the immediate-count and variable-count cases. In particular, this makes gen_RCL and

[PATCH v2 15/25] target/i386: move 60-BF opcodes to new decoder

2024-05-06 Thread Paolo Bonzini
Compared to the old decoder, the main differences in translation are for the little-used ARPL instruction. IMUL is adjusted a bit to share more code to produce flags, but is otherwise very similar. Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.h | 3 +

[PATCH v2 05/25] target/i386: cleanup cc_op changes for REP/REPZ/REPNZ

2024-05-06 Thread Paolo Bonzini
gen_update_cc_op must be called before control flow splits. Do it where the jump on ECX!=0 is translated. On the other hand, remove the call before gen_jcc1, which takes care of it already, and explain why REPZ/REPNZ need not use CC_OP_DYNAMIC---the translation block ends before any

[PATCH v2 21/25] target/i386: port extensions of one-byte opcodes to new decoder

2024-05-06 Thread Paolo Bonzini
A few two-byte opcodes are simple extensions of existing one-byte opcodes; they are easy to decode and need no change to emit.c.inc. Port them to the new decoder. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.h | 1 +

[PATCH v2 09/25] target/i386: clarify the "reg" argument of functions returning CCPrepare

2024-05-06 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 2cd7868d596..7efd12cbe7e 100644 --- a/target/i386/tcg/translate.c +++

[PATCH v2 19/25] target/i386: move remaining conditional operations to new decoder

2024-05-06 Thread Paolo Bonzini
Move long-displacement Jcc, SETcc and CMOVcc to the new decoder. While filling in the tables makes the code seem longer, the new emitters are all just one line of code. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.h | 1 +

[PATCH v2 20/25] target/i386: move BSWAP to new decoder

2024-05-06 Thread Paolo Bonzini
Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 4 +++- target/i386/tcg/decode-new.c.inc | 9 + target/i386/tcg/emit.c.inc | 11 +++ 3 files changed, 23 insertions(+), 1 deletion(-) diff --git

[PATCH v2 13/25] target/i386: extract gen_far_call/jmp, reordering temporaries

2024-05-06 Thread Paolo Bonzini
Extract the code into new functions, and swap T0/T1 so that T0 corresponds to the first immediate in the instruction stream. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 93 + 1 file changed, 53 insertions(+),

[PATCH v2 18/25] target/i386: merge and enlarge a few ranges for call to disas_insn_new

2024-05-06 Thread Paolo Bonzini
Since new opcodes are not going to be added in translate.c, round the case labels that call to disas_insn_new(), including whole sets of eight opcodes when possible. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 5 ++--- 1 file changed, 2

[PATCH v2 06/25] target/i386: pull cc_op update to callers of gen_jmp_rel{, _csize}

2024-05-06 Thread Paolo Bonzini
gen_update_cc_op must be called before control flow splits. Doing it in gen_jmp_rel{,_csize} may hide bugs, instead assert that cc_op is clean---even if that means a few more calls to gen_update_cc_op(). With this new invariant, setting cc_op to CC_OP_DYNAMIC is unnecessary since the caller

[PATCH v2 08/25] target/i386: do not use s->T0 and s->T1 as scratch registers for CCPrepare

2024-05-06 Thread Paolo Bonzini
Instead of using s->T0 or s->T1, create a scratch register when computing the C, NC, L or LE conditions. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/target/i386/tcg/translate.c

[PATCH v2 22/25] target/i386: remove now-converted opcodes from old decoder

2024-05-06 Thread Paolo Bonzini
Send all converted opcodes to disas_insn_new() directly from the big decoding switch statement; once more, the debugging/bisecting logic disappears. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/helper.h| 11 -

[PATCH v2 07/25] target/i386: extend cc_* when using them to compute flags

2024-05-06 Thread Paolo Bonzini
Instead of using s->tmp0 or s->tmp4 as the result, just extend the cc_* registers in place. It is harmless and, if multiple setcc instructions are used, the optimizer will be able to remove the redundant ones. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 44

[PATCH v2 25/25] target/i386: remove duplicate prefix decoding

2024-05-06 Thread Paolo Bonzini
Now that a bulk of opcodes go through the new decoder, it is sensible to do some cleanup. Go immediately through disas_insn_new and only jump back after parsing the prefixes. disas_insn() now only contains the three sigsetjmp cases, and they are more easily managed if they are inlined into

[PATCH v2 23/25] target/i386: decode x87 instructions in a separate function

2024-05-06 Thread Paolo Bonzini
These are unlikely to be converted to the table-based decoding soon (perhaps there could be generic ESC decoding in decode-new.c.inc for the Mod/RM byte, but not operand decoding), so keep them separate from the remaining legacy-decoded instructions. Acked-by: Richard Henderson Signed-off-by:

[PATCH v2 16/25] target/i386: generalize gen_movl_seg_T0

2024-05-06 Thread Paolo Bonzini
In the new decoder it is sometimes easier to put the segment in T1 instead of T0, usually because another operand was loaded by common code in T0. Genrealize gen_movl_seg_T0 to allow using any source. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c

[PATCH v2 14/25] target/i386: allow instructions with more than one immediate

2024-05-06 Thread Paolo Bonzini
While keeping decode->immediate for convenience and for 4-operand instructions, store the immediate in X86DecodedOp as well. This enables instructions with more than one immediate such as ENTER. It can also be used for far calls and jumps. Reviewed-by: Richard Henderson Signed-off-by: Paolo

[PATCH v2 24/25] target/i386: split legacy decoder into a separate function

2024-05-06 Thread Paolo Bonzini
Split the bits that have some duplication with disas_insn_new, from those that should be the main topic of the conversion. This is the first step towards removing duplicate decoding of prefixes between disas_insn and disas_insn_new. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini

[PATCH v2 10/25] target/i386: cleanup *gen_eob*

2024-05-06 Thread Paolo Bonzini
Create a new wrapper for syscall/sysret, and do not go through multiple layers of wrappers. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/translate.c

[PATCH v2 11/25] target/i386: reintroduce debugging mechanism

2024-05-06 Thread Paolo Bonzini
Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 27 +++ target/i386/tcg/decode-new.c.inc | 3 +++ 2 files changed, 30 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index e36ed4dcc10..705e8f3ef49 100644 ---

[PATCH v2 02/25] target/i386: use TSTEQ/TSTNE to check flags

2024-05-06 Thread Paolo Bonzini
The new conditions obviously come in handy when testing individual bits of EFLAGS, and they make it possible to remove the .mask field of CCPrepare. Lowering to shift+and is done by the optimizer if necessary. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini ---

[PATCH v2 03/25] target/i386: remove mask from CCPrepare

2024-05-06 Thread Paolo Bonzini
With the introduction of TSTEQ and TSTNE the .mask field is always -1, so remove all the now-unnecessary code. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 81 + 1 file changed, 27 insertions(+), 54

[PATCH v2 12/25] target/i386: move 00-5F opcodes to new decoder

2024-05-06 Thread Paolo Bonzini
Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 2 +- target/i386/tcg/decode-new.c.inc | 120 ++ target/i386/tcg/emit.c.inc | 202 +++ 3 files changed, 323 insertions(+), 1 deletion(-) diff

[PATCH v2 04/25] target/i386: cc_op is not dynamic in gen_jcc1

2024-05-06 Thread Paolo Bonzini
Resetting cc_op to CC_OP_DYNAMIC should be done at control flow junctions, which is not the case here. This translation block is ending and the only effect of calling set_cc_op() would be a discard of s->cc_srcT. This discard is useless (it's a temporary, not a global) and in fact prevents

[PATCH v2 01/25] target/i386: use TSTEQ/TSTNE to test low bits

2024-05-06 Thread Paolo Bonzini
When testing the sign bit or equality to zero of a partial register, it is useful to use a single TSTEQ or TSTNE operation. It can also be used to test the parity flag, using bit 0 of the population count. Do not do this for target_ulong-sized values however; the optimizer would produce a

[PATCH v2 00/25] target/i386: convert 1-byte opcodes to new decoder

2024-05-06 Thread Paolo Bonzini
This series includes changes to the x86 TCG decoder that switch the 1-byte opcodes to the table-driven decoder (except for x87). A few easy 2-byte opcodes are also converted (BSWAP, SETcc, CMOVcc, MOVZX/MOVSX and those that are extensions of 1-byte opcodes like PUSH/POP FS/GS, LFS/LGS/LSS).

[PATCH] hw/nvme: fix mo field in io mgnt send

2024-05-06 Thread Klaus Jensen
= (cdw10 & 0xff); +uint8_t mo = cdw10 & 0xf; switch (mo) { case NVME_IOMS_MO_NOP: --- base-commit: 84b0eb1826f690aa8d51984644318ee6c810f5bf change-id: 20240506-fix-ioms-mo-97098c6c5396 Best regards, -- Klaus Jensen

[PULL 09/46] avr: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with AVR. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/avr-softmmu/default.mak | 5

[PULL 10/46] cris: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with CRIS. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/cris-softmmu/default.mak | 5

[PULL 35/46] qemu-option: remove QemuOpt from typedefs.h

2024-05-06 Thread Paolo Bonzini
QemuOpt is basically an internal data structure. It has no business being defined except if you need functions from include/qemu/option.h. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- include/qemu/option.h | 2 ++ include/qemu/typedefs.h | 1 - 2 files changed, 2

[PULL 41/46] display: remove GraphicHwOps from typedefs.h

2024-05-06 Thread Paolo Bonzini
Basically all uses of GraphicHwOps are defining an instance of it, which requires the full definition of the struct. It is pointless to have it in typedefs.h. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- hw/display/vga_int.h| 1 + include/qemu/typedefs.h | 1 - 2

[PULL 08/46] arm: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
For ARM targets, boards that require TCG are already using "default y". Switch ARM_VIRT to the same selection mechanism. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/arm-softmmu/default.mak | 3 ++- .gitlab-ci.d/buildtest.yml |

[PULL 13/46] loongarch: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with Loongarch. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini ---

[PULL 43/46] pci: remove some types from typedefs.h

2024-05-06 Thread Paolo Bonzini
For types that are embedded in structs defined by pci.h, the definition is pretty much required to be available. Remove them from typedefs.h. Signed-off-by: Paolo Bonzini --- include/hw/pci/pcie.h | 3 +++ include/hw/pci/pcie_aer.h | 38 ++---

[PULL 45/46] migration: do not include coroutine_int.h

2024-05-06 Thread Paolo Bonzini
Migration code needs no private fields of the coroutine backend. Include the "regular" coroutine.h header. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- migration/migration.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migration/migration.h

[PULL 26/46] xtensa: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with Xtensa. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/xtensa-softmmu/default.mak |

[PULL 23/46] sh4: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with SH. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/sh4-softmmu/default.mak | 7

[PULL 21/46] rx: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with RX. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/rx-softmmu/default.mak | 3 ++-

[PULL 11/46] hppa: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with PARISC. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/hppa-softmmu/default.mak | 5

[PULL 17/46] mips: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with MIPS. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/mips-softmmu/common.mak |

[PULL 44/46] kvm: move target-dependent interrupt routing out of kvm-all.c

2024-05-06 Thread Paolo Bonzini
Let hw/hyperv/hyperv.c and hw/intc/s390_flic.c handle (respectively) SynIC and adapter routes, removing the code from target-independent files. This also removes the only occurrence of AdapterInfo outside s390 code, so remove that from typedefs.h. Signed-off-by: Paolo Bonzini ---

[PULL 40/46] qapi/machine: remove types from typedefs.h

2024-05-06 Thread Paolo Bonzini
They are needed in very few places, which already depends on other generated QAPI files. The benefit of having these types in typedefs.h is small. Signed-off-by: Paolo Bonzini --- include/hw/core/cpu.h | 1 + include/qemu/typedefs.h | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-)

[PULL 15/46] microblaze: switch boards to "default y"

2024-05-06 Thread Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with Microblaze. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini ---

[PULL 42/46] tcg: remove CPU* types from typedefs.h

2024-05-06 Thread Paolo Bonzini
hw/core/cpu.h is already using struct forward declarations in some cases to avoid inclusions, and otherwise CPUAddressSpace and CPUJumpCache are only used together with their definition. CPUTLBEntryFull is always used when their definition is available. Remove all three from typedefs.h.

[PULL 46/46] qga/commands-posix: fix typo in qmp_guest_set_user_password

2024-05-06 Thread Paolo Bonzini
qga/commands-posix.c does not compile on FreeBSD due to a confusion between "chpasswdata" (wrong) and "chpasswddata" (used in the #else branch). Fixes: 0e5b75a390 ("qga/commands-posix: qmp_guest_set_user_password: use ga_run_command helper") Reviewed-by: Thomas Huth Signed-off-by: Paolo Bonzini

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