should
not break compatibility (even if we technical don't guarantee it) unless
we absolutely have to.
Regards,
Anthony Liguori
However, what we have is send bytes, parse them on the destination,
hope the format matches. Hence, anything that makes the format less
declarative adds
,
Anthony Liguori
That is the other possibility, yes. But in this case -nodefaults must not
create spapr-nvram automatically and if we do that, we'll break existing
setups.
Alex
/* hcall-vio */
spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
diff --git a/include/hw
);
^
cc1: all warnings being treated as errors
make[1]: *** [exec.o] Error 1
[...]
Fix has been on list for a while:
https://lists.nongnu.org/archive/html/qemu-devel/2013-09/msg04685.html
Well who's picking it up?
I'll push this morning.
Regards,
Anthony Liguori
S. Tsirkin m...@redhat.com
How in the world did this get reviewed by's
Regards,
Anthony Liguori
---
hw/i386/ssdt-pcihp.hex.generated | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/i386/ssdt-pcihp.hex.generated
b/hw/i386/ssdt-pcihp.hex.generated
index
the code can be reused for Q35?
That doesn't seem acceptable to me.
Regards,
Anthony Liguori
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
include/hw/acpi/pcihp.h | 72 +++
hw/acpi/pcihp.c | 312
hw/acpi
of the series.
This is a huge series and I still am not convinced this is the right
path forward. The alternative to this series is a small set of changes
to SeaBIOS to support PCI bridge hotplug, no?
Or 10k SLOC of code into QEMU that includes breaking migration
compatibility.
Regards,
Anthony
. This leaves the website exposed to
outages due to DNS issues or IP address changes. For example, if the
web server IP address needs to change we cannot guarantee qemu.org will
point to it!
The newer qemu-project.org domain name is owned by Anthony Liguori
anth...@codemonkey.ws. You can
On Thu, Oct 10, 2013 at 3:25 PM, Mike Day ncm...@ncultra.org wrote:
[RFC] SPAPR-PCI Hotplug Support in Qemu
Background:
ppc64 has a unique bus structure for PCI slots: each slot is connected
to its PHB by a pci switch. This is true in some IBM hardware as well as
paravirtual hardware
From: Anthony Liguori aligu...@amazon.com
Amazon is now funding my work as QEMU maintainer so update addresses
accordingly.
Signed-off-by: Anthony Liguori aligu...@amazon.com
---
MAINTAINERS | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/MAINTAINERS b
comments, I think this needs a v2.
Regards,
Anthony Liguori
vfio-pci updates include:
- Forgotten MSI affinity patch posted several months ago
- Lazy option ROM loading to delay load until after device/bus resets
- Error reporting cleanups
- PCI hot reset support introduced with Linux v3.12
All of Paul's emails are bouncing and he hasn't been active for
some time.
Signed-off-by: Anthony Liguori anth...@codemonkey.ws
---
MAINTAINERS | 21 +
1 file changed, 5 insertions(+), 16 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5c3c70c..ab8166a 100644
On Tue, Oct 1, 2013 at 1:27 AM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 01/10/2013 00:57, Anthony Liguori ha scritto:
On Mon, Sep 30, 2013 at 5:43 PM, Paolo Bonzini pbonz...@redhat.com
mailto:pbonz...@redhat.com wrote:
Il 01/10/2013 00:08, Anthony Liguori ha scritto
,
Anthony Liguori
Paolo
ping to see where things stand on this bugfix ...
First time pull requests take a little more time due to a security process
I follow. Bare with me, I should have it processed in the next couple days.
Regards,
Anthony Liguori
--
paul moore
security and virtualization @ redhat
Should be better now.
Regards,
Anthony Liguori
On Tue, Oct 1, 2013 at 1:12 PM, Lucas Meneghel Rodrigues l...@redhat.comwrote:
Hello:
In the daily qemu.git autotest run, I started to see the following problem
while checking out the qemu.git tree and checking out the submodules:
$ git
that has virtio
,especiall virtio-blk, working in polling mode.
Look for papers on the ELVIS project.
Regards,
Anthony Liguori
Thanks for your time!
Best Wishes,
Yaohui Hu
On Sat, Sep 28, 2013 at 8:54 AM, Anthony Liguori anth...@codemonkey.wswrote:
Hi Yaohui,
Yes, there is a flag
Wouldn't this be logical as a machine option? They way you are introducing
it makes it impossible to control with -global.
Regards,
Anthony Liguori
On Mon, Sep 30, 2013 at 5:46 AM, Gerd Hoffmann kra...@redhat.com wrote:
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
hw/i386/pc_piix.c
On Mon, Sep 30, 2013 at 5:43 PM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 01/10/2013 00:08, Anthony Liguori ha scritto:
Wouldn't this be logical as a machine option? They way you are
introducing it makes it impossible to control with -global.
You still have -bios.
Which cannot
Hi Yaohui,
Yes, there is a flag associated both with the used and the avail rings to
disable notifications. This can be used to implement polling.
There have been multiple research projects/papers that have experimented
with polling.
Regards,
Anthony Liguori
On Fri, Sep 27, 2013 at 1:56 PM
or stack
switching are probably not allowed under Native Client since they are
unsafe!
I'm pretty sure coroutines would provide difficult to port too.
Regards,
Anthony Liguori
Maybe I'm wrong and it's possible, but the first thing to check is the
constraints that Native Client puts
: Supported
F: qemu-seccomp.c
F: include/sysemu/seccomp.h
You should be sending a pull request Eduardo.
Regards,
Anthony Liguori
---
qemu-seccomp.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/qemu-seccomp.c b/qemu-seccomp.c
index 37d38f8..69cee44 100644
Found this by enabling C++ errors. The bool and enum arguments
are mistakenly flipped.
Signed-off-by: Anthony Liguori anth...@codemonkey.ws
---
hmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hmp.c b/hmp.c
index 2a90295..5891507 100644
--- a/hmp.c
+++ b/hmp.c
vmstate_register(NULL, 0, vmstate_sclpconsole, scon);
If I understand Anthony correctly a vmstate_register() call means you didn't
convert something to QOM correctly :).
In this case, the line is just wrong. In console_class_init, you
should assign dc-vmsd = vmstate_slcpconsole.
Regards,
Anthony
=x86_64-linux-gnu --target=x86_64-linux-gnu
Thread model: posix
gcc version 4.6.1 (Ubuntu/Linaro 4.6.1-9ubuntu3)
Regards,
Anthony Liguori
/mjt
The following changes since commit 2d1fe1873a984d1c2c89ffa3d12949cafc718551:
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130910
=Google_Summer_of_Code_2011diff=prevoldid=1694
Thanks for reporting.
Anthony, please disable that user account. I started fixing the
vandalized pages.
Done. Thanks for reporting!
Regards,
Anthony Liguori
up.
Please send a v2 pull request without the cover letter reply and I'll
process it.
Regards,
Anthony Liguori
Christian Borntraeger (2):
s390/dump: zero out padding bytes in notes sections
s390/ipl: Update
changed the subject and CCed him to
grab his attention.
Ack. I think it's a great idea.
Regards,
Anthony Liguori
Paolo
On Thu, Sep 5, 2013 at 7:30 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 19 August 2013 14:51, Anthony Liguori anth...@codemonkey.ws wrote:
My IBM email address will be unaccessible after August 23rd, 2013.
Signed-off-by: Anthony Liguori anth...@codemonkey.ws
--- a/.mailmap
+++ b
This makes get_maintainers.pl behave a little better.
Reported-by: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Anthony Liguori anth...@codemonkey.ws
---
.mailmap | 1 +
1 file changed, 1 insertion(+)
diff --git a/.mailmap b/.mailmap
index 7b91a95..28defa1 100644
--- a/.mailmap
+++ b
this feedback earlier.
This conflicts badly with a pull request from Michael Tsirkin that I
merged already. Can you rebase against master and resubmit?
Thanks!
Regards,
Anthony Liguori
git://github.com/stefanha/qemu.git net
for you to fetch changes up to e21f6f23606e90f5cc6df2d9b1d8b862b54d2796
. Even with all the use of volatile in the
world, there's no guarantee this is going to crash.
Regards,
Anthony Liguori
+}
+
+static void setup_signal_handlers(void)
+{
+struct sigaction action;
+
+memset(action, 0, sizeof(action));
+sigfillset(action.sa_mask
smaller
pool of submaintainers and I've met most in person at some point so
I'm going to try to keep it as tight as possible.
Regards,
Anthony Liguori
--
MST
On Wed, Sep 4, 2013 at 11:08 AM, Andreas Färber afaer...@suse.de wrote:
Am 04.09.2013 15:11, schrieb Anthony Liguori:
On Wed, Sep 4, 2013 at 6:47 AM, Michael S. Tsirkin m...@redhat.com wrote:
I noticed recent merges of the pci tree have this text:
# gpg: Signature made Sun 01 Sep 2013 03
?
- machine flag to indicate compat level
- machine reset evaluates compat level, adjusts VM accordingly
- rtas call merely modifies machine flag and triggers a reset
- optional: QMP notifier when the rtas call changed the machine flag
Regards,
Anthony Liguori
Alex
=optimized out, argv=optimized out, envp=optimized out)
at /home/anthony/git/qemu/vl.c:4435
(gdb)
Regards,
Anthony Liguori
On Fri, Aug 30, 2013 at 9:30 AM, Kevin Wolf kw...@redhat.com wrote:
The following changes since commit b5d54bd42158b90b239bb6ce9c13072eb3a53fd2:
Merge remote-tracking
,
Anthony Liguori
+
+cs = CPU(cpu);
+ss = icp-ss[cs-cpu_index];
+
+assert(cs-cpu_index icp-nr_servers);
+if (icpkvm-kernel_xics_fd == -1) {
+abort();
+}
+
+if (icpkvm-kernel_xics_fd != -1) {
+int ret;
+struct kvm_enable_cap xics_enable_cap
,
Anthony Liguori
On Wed, Aug 28, 2013 at 10:30 AM, Xie, Huawei huawei@intel.com wrote:
I know it is PFN, that is why I want to use the high 12bit for combined write
in another reply, to fully address 64 bit address.
Is the 16TB address space what it is originally designed
On Wed, Aug 28, 2013 at 4:02 PM, H. Peter Anvin h...@zytor.com wrote:
On 08/28/2013 10:35 AM, Anthony Liguori wrote:
Yes, it was originally designed with the 16TB limit in mind.
PCI doesn't support 64-bit PIO operations so it would have required a
high/low register and additional magic.
s
the watchdog aspect of this, having a portable
panic notifier and the ability to enhance it to include more
information (like the backtrace, etc.) is pretty darn useful.
Regards,
Anthony Liguori
Daniel
--
|: http://berrange.com -o-http://www.flickr.com/photos/dberrange/ :|
|: http
.
Ack, but the current watchdog does not work for Windows guests and is
not aware of guest time.
That's why I think having a virtio-ilo makes sense. This is not a
solved problem today.
Regards,
Anthony Liguori
[Note what I say applies to the qemu watchdog device. The Linux
watchdog daemon
have
an issue if the IRQ comes too quickly to indicate the request has
completed. This is what -win2k-hack is for. That may also work here too.
Regards,
Anthony Liguori
I will try an alternative BIOS, maybe this fixes it, if not I will try
to do some regression tests, first trying 1.4.0
at this point.
Regards,
Anthony Liguori
== Support in libvirt for current functionality ==
libvirt will add a panic-notifier/ element, and possibly a capability
for it accessible via virsh capabilities. There are two possibilities:
1) On QEMU 1.5.4/1.6.1 and newer (and on QEMU 1.6.0 with a machine
than NACK, don't even
bother sending the email in the first place.
Regards,
Anthony Liguori
No words have been spent on NAKs yet (... since my subscription, that
is). Is this stuff formalized somewhere?
Sorry for wasting time...
Thanks,
Laszlo
Laszlo Ersek ler...@redhat.com writes:
On 08/22/13 18:44, Anthony Liguori wrote:
pvpanic has been a failure. It's a poorly designed device with even
worse semantics.
I disagree somewhat.
Requiring a separate ioport is not ideal, I admit. Configuration over
ACPI is good OTOH (it seems
...
pvpanic is not going to be present on S390, PPC, ARM, or MIPS because of
the fact that it's x86 specific.
That means at some point there's going to have to be another device to
support these platforms and libvirt will need to deal with that too.
Regards,
Anthony Liguori
multiple cases where a naive watchdog
has a problem in the field when the system is under heavy load.
A PV watchdog actually makes sense because it can be defined based on
guest run time instead of wall clock time.
Regards,
Anthony Liguori
Paolo
On Thu, Aug 22, 2013 at 3:36 PM, Laszlo Ersek ler...@redhat.com wrote:
On 08/22/13 22:09, Anthony Liguori wrote:
The difference is that ACPI or platform devices in general are
unexpected to be added. By definition it means that the motherboard has
most likely been changed.
You could
,server,nowait -vnc :1 -m 1024 --enable-kvm
-cpu host
You need to specify a keymap with -k
Regards,
Anthony Liguori
Client is e.g. Ultra VNC 32 bit under Windows XP V 1.0.8.0 = Just enter
the IP::Port and connect. Or RealVNC in the same way.
Client OS has german keyboard and german keyboard
My IBM email address will be unaccessible after August 23rd, 2013.
Signed-off-by: Anthony Liguori anth...@codemonkey.ws
---
.mailmap| 2 +-
MAINTAINERS | 14 +++---
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/.mailmap b/.mailmap
index 9797802..7b91a95 100644
of QEMU.
IBM remains just as committed as ever to QEMU and KVM if not more. I'm
excited to continue to get to work with the IBM team in a different
capacity.
If you have any questions or concerns, please feel free to reach out to
me privately and I'll do my best to answer them.
Regards,
Anthony
?
Is the JSON mode of qemu-img info not sufficient for libvirt's purposes?
Is there additional logic behind having a libqemublock?
Regards,
Anthony Liguori
Laszlo Ersek (7):
add skeleton for BSD licensed raw BlockDriver
raw_bsd: emit debug events in bdrv_co_readv() and bdrv_co_writev
is essentially what Alexey's patch turns -cpu POWER7
into.
Regards,
Anthony Liguori
He makes a very valid point. The ability to specify a specific revision
of the processor is pointless for pretty much any use case we have in
mind at the moment, and is even more pointless as long as we emulate
them
was intended to be GPLv2.
Can you send a patch to add your copyright to this file? I added the
BSD license that most folks Signed-off-by but you should add your GPLv2
copyright (making the file effectively GPLv2).
Regards,
Anthony Liguori
Andreas Färber afaer...@suse.de writes:
Am 15.08.2013 15:12, schrieb Anthony Liguori:
Everyone is talking past each other and no one is addressing the real
problem. There are two distinct issues here:
1) We have two ABIs that cannot be changed unless there's a very good
reason
live migration and savevm.
* BSDs now support the GTK+ user interface.
* Support for the pc machine type in Xen
* Support for TUN/TAP on Mac OS X
* And lots more...
Regards,
Anthony Liguori
Happy hacking!
Regards,
Anthony Liguori
is permitted). This is how PAPR defines the
reconfiguration
reboot (for that and other things).
I don't think the model changes. It's just a flag in the power8 vcpu state.
No different IMHO between jumping from real mode to protected mode to
long mode on x86.
Regards,
Anthony Liguori
IE
Already in 1.6:
commit a7d6b9f084765a834110bb9a2a0329b1a96de792
Author: Andreas Färber afaer...@suse.de
Date: Mon Aug 5 22:59:46 2013 +0200
target-ppc: Fix POWER7+ model
Regards,
Anthony Liguori
On Wed, Aug 14, 2013 at 8:55 AM, Alexander Graf ag...@suse.de wrote:
On 05.08.2013, at 22
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Pulled. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
Applied. Thanks.
Regards,
Anthony Liguori
I'm confident there's a way to get hardware keycodes on OS X. There
is on every other UI platform that I know of. That's the best way to
solve this.
Regards,
Anthony Liguori
On Wed, Aug 14, 2013 at 1:02 PM, Alexander Graf ag...@suse.de wrote:
On 04.08.2013, at 20:52, Programmingkid wrote
Context matching caused the 'has_pvpanic = true' to be applied to
the 1.6 machine type instead of the 1.5 machine type.
Reported-by: Markus Armbruster arm...@redhat.com
Reported-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Anthony Liguori aligu...@us.ibm.com
---
hw/i386/pc_piix.c | 2
);
}
I'd prefer we stick to the minimal fix. If you want to refactor the
code lets do it separately. I just sent a patch fixing the merge
problem.
Regards,
Anthony Liguori
@@ -265,8 +265,8 @@ static void pc_init_pci_1_4(QEMUMachineInitArgs *args)
{
x86_cpu_compat_set_features(n270
seem acceptable to me.
We made a mistake with 1.5, now we have to live with it.
Regards,
Anthony Liguori
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
with
it down the road.
Having target-ppc call into virtio is a layering violation. This
approach keeps the dependencies cleaner.
Regards,
Anthony Liguori
If we consider that virtio byte order is global, can't you make it a
global that is *set* by the architecture rather than *polled* by
virtio
://github.com/rth7680/qemu.git for-1.6
I don't see a published branch of this name in the tree.
Regards,
Anthony Liguori
for you to fetch changes up to 31e846e8f3885f82df7cc96f0a14a6665b42388e:
tcg/mips: fix invalid op definition errors (2013-08-08 06:11:19 -1000
this should be applied for 1.6, this way we won't
have this problem from 1.7 and on.
This is not for 1.6. It's far too late to make a change like this.
Regards,
Anthony Liguori
Michael S. Tsirkin (2):
memory: export target page size
loader: put FW CFG ROM files into RAM
exec.c
This breaks migration and is unneeded with modern SeaBIOS.
Signed-off-by: Anthony Liguori aligu...@us.ibm.com
---
v1 - v2
- Still load external DSDT for q35
---
hw/i386/pc_piix.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 95c45b8..311574a
name
‘MemoryRegionOps’
make[1]: *** [exec.o] Error 1
make: *** [subdir-alpha-linux-user] Error 2
Regards,
Anthony Liguori
---
exec.c|3 ++-
include/exec/ioport.h |2 ++
ioport.c | 16
3 files changed, 20 insertions(+), 1 deletions
Michael S. Tsirkin m...@redhat.com writes:
On Mon, Aug 12, 2013 at 09:01:44AM -0500, Anthony Liguori wrote:
This breaks migration and is unneeded with modern SeaBIOS.
Signed-off-by: Anthony Liguori aligu...@us.ibm.com
Hmm don't we want to keep it around for machine types
1.4.0 and 1.5.0
top-post.
Regards,
Anthony Liguori
---
Changes in v2:
- avoid breakage in ioport.h for user build
exec.c|3 ++-
include/exec/ioport.h |4
ioport.c | 16
3 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/exec.c
Michael S. Tsirkin m...@redhat.com writes:
On Mon, Aug 12, 2013 at 10:20:41AM -0500, Anthony Liguori wrote:
Michael S. Tsirkin m...@redhat.com writes:
On Mon, Aug 12, 2013 at 09:01:44AM -0500, Anthony Liguori wrote:
This breaks migration and is unneeded with modern SeaBIOS.
Signed
://wiki.qemu.org/ChangeLog/Next
The following changes have been made since v1.6.0-rc2:
- pc: drop external DSDT loading (Anthony Liguori)
- hw/misc: make pvpanic known to user (Marcel Apfelbaum)
- hw/misc: don't create pvpanic device by default (Marcel Apfelbaum)
- pc: Remove PCLMULQDQ from Westmere
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