Now that we use PCIIOMMUOps to convey information about usable IOVA
ranges we do not to implement the iommu_set_iova_ranges IOMMU MR
callback.
Signed-off-by: Eric Auger
---
hw/virtio/virtio-iommu.c | 67
1 file changed, 67 deletions(-)
diff --git a/hw
to the physical IOMMU.
Signed-off-by: Eric Auger
---
include/hw/virtio/virtio-iommu.h | 9
hw/virtio/virtio-iommu.c | 87
2 files changed, 96 insertions(+)
diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-iommu.h
index 83a52cc446
As we have just removed the only implementation of
iommu_set_iova_ranges IOMMU MR callback in the virtio-iommu,
let's remove the call to the memory wrapper. Usable IOVA ranges
are now conveyed through the PCIIOMMUOps in VFIO-PCI.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 10 --
1
Introduce a new HostIOMMUDevice callback that allows to
retrieve the usable IOVA ranges.
Implement this callback in the legacy VFIO and IOMMUFD VFIO
host iommu devices. This relies on the VFIODevice agent's
base container iova_ranges resource.
Signed-off-by: Eric Auger
---
include/sysemu
Store the agent device (VFIO or VDPA) in the host IOMMU device.
This will allow easy access to some of its resources.
Signed-off-by: Eric Auger
---
include/sysemu/host_iommu_device.h | 1 +
hw/vfio/container.c| 1 +
hw/vfio/iommufd.c | 2 ++
3 files changed, 4
Since the host IOVA ranges are now passed through the
PCIIOMMUOps set_host_resv_regions and we have removed
the only implementation of iommu_set_iova_range() in
the virtio-iommu and the only call site in vfio/common,
let's retire the IOMMU MR API and its memory wrapper.
Signed-off-by: Eric Auger
. virtio_iommu_set_host_iova_ranges() reuse the
implementation of virtio_iommu_set_iova_ranges() which will be
removed in subsequent patches. rebuild_resv_regions() is just moved.
Signed-off-by: Eric Auger
---
hw/virtio/virtio-iommu.c | 151 ++-
1 file changed, 117
://github.com/eauger/qemu/tree/iommufd_nesting_preq_v7_resv_regions_v2
Eric Auger (7):
HostIOMMUDevice: Store the VFIO/VDPA agent
virtio-iommu: Implement set|unset]_iommu_device() callbacks
HostIOMMUDevice: Introduce get_iova_ranges callback
virtio-iommu: Compute host reserved regions
> - drop VTDHostIOMMUDevice and save HostIOMMUDevice in hash table (Eric)
> - move patch5 after patch1 (Eric)
> - squash patch3 and 4, squash patch12 and 13 (Eric)
> - refine comments (Eric)
> - collect Eric's R-B
for the whole series:
Reviewed-by: Eric Auger
I exercised
On 6/6/24 11:26, Eric Auger wrote:
> Hi Zhenzhong,
> On 6/3/24 08:10, Zhenzhong Duan wrote:
>> It calls iommufd_backend_get_device_info() to get host IOMMU
>> related information and translate it into HostIOMMUDeviceCaps
>> for query with .get_cap().
>>
>&g
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> It calls iommufd_backend_get_device_info() to get host IOMMU
> related information and translate it into HostIOMMUDeviceCaps
> for query with .get_cap().
>
> Introduce macro VTD_MGAW_FROM_CAP to get MGAW which equals to
> (aw_bits - 1).
>
>
On 6/4/24 10:48, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v6 18/19] intel_iommu: Implement
>> [set|unset]_iommu_device() callbacks
>>
>>
>>
>> On 6/4/24 07:40, Duan, Zhenzhong wrote:
&g
On 6/4/24 10:46, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v6 11/19] backends/iommufd: Implement
>> HostIOMMUDeviceClass::get_cap() handler
>>
>>
>>
>> On 6/4/24 05:23, Duan, Zhenzhong
On 6/4/24 07:46, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v6 18/19] intel_iommu: Implement
>> [set|unset]_iommu_device() callbacks
>>
>>
>>
>> On 6/3/24 08:10, Zhenzhong Duan wr
On 6/4/24 07:40, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v6 18/19] intel_iommu: Implement
>> [set|unset]_iommu_device() callbacks
>>
>> Hi Zhenzhong,
>>
>> On 6/3/24 08:10, Zhenzhong D
On 6/4/24 05:23, Duan, Zhenzhong wrote:
> Hi Cédric, Eric,
>
>> -Original Message-
>> From: Cédric Le Goater
>> Subject: Re: [PATCH v6 11/19] backends/iommufd: Implement
>> HostIOMMUDeviceClass::get_cap() handler
>>
>> On 6/3/24 13:32,
Hi,
On 6/4/24 09:51, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v6 09/19] vfio/iommufd: Implement
>> HostIOMMUDeviceClass::realize() handler
>>
>>
>>
>> On 6/4/24 04:58, Duan, Zhenzhong wro
Hi Zhenzhong,
On 6/4/24 04:45, Duan, Zhenzhong wrote:
> Hi Eric,
>
>> -Original Message-----
>> From: Eric Auger
>> Subject: Re: [PATCH v6 07/19] vfio/container: Implement
>> HostIOMMUDeviceClass::realize() handler
>>
>> Hi Zhenzhong,
>>
>&
On 6/4/24 04:58, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v6 09/19] vfio/iommufd: Implement
>> HostIOMMUDeviceClass::realize() handler
>>
>> Hi Zhenzhong,
>>
>>
On 6/3/24 08:10, Zhenzhong Duan wrote:
> From: Yi Liu
>
> Implement [set|unset]_iommu_device() callbacks in Intel vIOMMU.
> In set call, a new structure VTDHostIOMMUDevice which holds
> a reference to HostIOMMUDevice is stored in hash table
> indexed by PCI BDF.
>
> Signed-off-by: Yi Liu
>
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> If check fails, host device (either VFIO or VDPA device) is not
> compatible with current vIOMMU config and should not be passed to
> guest.
>
> Only aw_bits is checked for now, we don't care other capabilities
we don't care about other caps
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> Create host IOMMU device instance in vfio_attach_device() and call
> .realize() to initialize it further.
I would squash this with the previous patch
Eric
>
> Suggested-by: Cédric Le Goater
> Signed-off-by: Zhenzhong Duan
> ---
>
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> From: Yi Liu
>
> Implement [set|unset]_iommu_device() callbacks in Intel vIOMMU.
> In set call, a new structure VTDHostIOMMUDevice which holds
> a reference to HostIOMMUDevice is stored in hash table
> indexed by PCI BDF.
maybe precise that
gt; +pci_device_get_iommu_bus_devfn(dev, _bus, NULL, NULL);
> +if (iommu_bus && iommu_bus->iommu_ops->unset_iommu_device) {
> +return iommu_bus->iommu_ops->unset_iommu_device(pci_get_bus(dev),
> +
> iommu_bus->iommu_opaque,
> +dev->devfn);
> +}
> +}
> +
> void pci_setup_iommu(PCIBus *bus, const PCIIOMMUOps *ops, void *opaque)
> {
> /*
Besides
Reviewed-by: Eric Auger
Eric
vfio_unregister_err_notifier(vdev);
> @@ -3280,7 +3288,8 @@ static void vfio_exitfn(PCIDevice *pdev)
> vfio_teardown_msi(vdev);
> vfio_pci_disable_rp_atomics(vdev);
> vfio_bars_exit(vdev);
> -vfio_migration_exit(>vbasedev);
> +vfio_migration_exit(vbasedev);
> +pci_device_unset_iommu_device(pdev);
> }
>
> static void vfio_pci_reset(DeviceState *dev)
Reviewed-by: Eric Auger
Eric
by: Yi Liu
> Signed-off-by: Yi Sun
> Signed-off-by: Nicolin Chen
> Signed-off-by: Zhenzhong Duan
Reviewed-by: Eric Auger
Eric
> ---
> hw/pci/pci.c | 48 +---
> 1 file changed, 45 insertions(+), 3 deletions(-)
>
> diff --git
On 6/3/24 08:10, Zhenzhong Duan wrote:
> This helper get the highest 1 bit position of the upper bound.
>
> If the range is empty or upper bound is zero, -1 is returned.
>
> Suggested-by: Cédric Le Goater
> Signed-off-by: Zhenzhong Duan
Reviewed-by: Eric Auger
Eric
>
On 6/3/24 08:10, Zhenzhong Duan wrote:
> HostIOMMUDeviceCaps's elements map to the host IOMMU's capabilities.
> Different platform IOMMU can support different elements.
>
> Currently only two elements, type and aw_bits, type hints the host
> platform IOMMU type, i.e., INTEL vtd, ARM smmu, etc;
u/iommufd.h
> +++ b/include/sysemu/iommufd.h
> @@ -1,9 +1,23 @@
> +/*
> + * iommufd container backend declaration
> + *
> + * Copyright (C) 2024 Intel Corporation.
> + * Copyright Red Hat, Inc. 2024
> + *
> + * Authors: Yi Liu
> + * Eric Auger
On 6/3/24 08:10, Zhenzhong Duan wrote:
> Introduce HostIOMMUDevice as an abstraction of host IOMMU device.
>
> Introduce .realize() to initialize HostIOMMUDevice further after
> instance init.
>
> Introduce a macro CONFIG_HOST_IOMMU_DEVICE to define the usage
> for VFIO, and VDPA in the future.
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> Hi,
>
> This series introduce a HostIOMMUDevice abstraction and sub-classes.
> Also HostIOMMUDeviceCaps structure in HostIOMMUDevice and a new interface
> between vIOMMU and HostIOMMUDevice.
I think we should have a textual description of
On 6/3/24 08:10, Zhenzhong Duan wrote:
> Suggested-by: Cédric Le Goater
> Signed-off-by: Zhenzhong Duan
> ---
> backends/iommufd.c | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --git a/backends/iommufd.c b/backends/iommufd.c
> index c7e969d6f7..f2f7a762a0 100644
>
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> It calls iommufd_backend_get_device_info() to get host IOMMU
> related information and translate it into HostIOMMUDeviceCaps
> for query with .get_cap().
>
> Introduce macro VTD_MGAW_FROM_CAP to get MGAW which equals to
> (aw_bits - 1).
>
>
Hi Zhenzhong,
On 6/3/24 08:10, Zhenzhong Duan wrote:
> Utilize range_get_last_bit() to get host IOMMU address width and
> package it in HostIOMMUDeviceCaps for query with .get_cap().
>
> Signed-off-by: Zhenzhong Duan
> ---
> hw/vfio/container.c | 26 ++
> 1 file changed,
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
> but not nested instances.
> This patch series adds support for nested translation in SMMUv3,
> this is controlled by property “arm-smmuv3.stage=nested”, and
> advertised to
Hi Mostafa,
On 4/29/24 05:24, Mostafa Saleh wrote:
> Use the new SMMU property to make the SMMU OAS match the CPU PARANGE.
> That's according to SMMU manual ARM IHI 0070F.b:
> 6.3.6 SMMU_IDR5, OAS must match the system physical address size.
>
> Signed-off-by: Mostafa Saleh
> ---
>
Hi Mostafa,
On 4/29/24 05:24, Mostafa Saleh wrote:
> Add property that sets the OAS of the SMMU, this in not used in this
> patch.
>
> Signed-off-by: Mostafa Saleh
> ---
> hw/arm/smmuv3-internal.h | 3 ++-
> hw/arm/smmuv3.c | 29 -
> include/hw/arm/smmuv3.h
;
>
> cfg->oas = oas2bits(CD_IPS(cd));
> -cfg->oas = MIN(oas2bits(SMMU_IDR5_OAS), cfg->oas);
> +cfg->oas = MIN(oas2bits(oas), cfg->oas);
> cfg->tbi = CD_TBI(cd);
> cfg->asid = CD_ASID(cd);
> cfg->affd = CD_AFFD(cd);
> @@ -759,6 +772,14 @@ static int decode_cd(SMMUv3State *s, SMMUTransCfg *cfg,
> goto bad_cd;
> }
>
> +/*
> + * An address greater than 48 bits in size can only be output from a
> + * TTD when, in SMMUv3.1 and later, the effective IPS is 52 and a
> 64KB
> + * granule is in use for that translation table
> + */
> +if (tt->granule_sz != 16) {
> +cfg->oas = MIN(cfg->oas, 48);
> +}
> tt->tsz = tsz;
> tt->ttb = CD_TTB(cd, i);
>
Reviewed-by: Eric Auger
Eric
Eric
On 4/29/24 05:23, Mostafa Saleh wrote:
> QEMU doesn's support memory attributes, so FWB is NOP, this
> might change in the future if memory attributre would be supported.
if mem attributes get supported
>
> Signed-off-by: Mostafa Saleh
> ---
> hw/arm/smmuv3.c | 8
> 1 file changed, 8
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> Everything is in place, add the last missing bits:
> - Handle fault checking according to the actual PTW event and not the
> the translation stage.
missing the "why". Can't it be moved in a separate patch?
> - Consolidate parsing of STE cfg
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> IOMMUTLBEvent only understands IOVA, for stage-2 only SMMUs keep
> the implementation, while only notify for stage-1 invalidation
> in case of nesting.
>
> Signed-off-by: Mostafa Saleh
> ---
> hw/arm/smmuv3.c | 23 +++
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> Some commands need rework for nesting, as they used to assume S1
> and S2 are mutually exclusive:
>
> - CMD_TLBI_NH_ASID: Consider VMID if stage-2 is supported
> - CMD_TLBI_NH_ALL: Consider VMID if stage-2 is supported, otherwise
> invalidate
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> When nested translation is requested, do the following:
>
> - Translate stage-1 IPA using stage-2 to a physical address.
stage-1 table address IPA into PA through S2 stage
> - Translate stage-1 table walks using stage-2.
output of S1 stage
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> In the previous patch, comine_tlb() was added which combines 2 TLB
> entries into one, which chooses the granule and level from the
> smallest entry.
>
> This means that a nested translation, an entry can be cached with the
> granule of stage-2
Hi Mostafa,
On 5/16/24 17:20, Mostafa Saleh wrote:
> Hi Eric,
>
> On Wed, May 15, 2024 at 03:48:05PM +0200, Eric Auger wrote:
>> Hi Mostafa,
>>
>> On 4/29/24 05:23, Mostafa Saleh wrote:
>>> This patch adds support for nested(combined) TLB entries.
>
On 4/29/24 05:23, Mostafa Saleh wrote:
> In the previous patch, comine_tlb() was added which combines 2 TLB
combine
> entries into one, which chooses the granule and level from the
> smallest entry.
>
> This means that a nested translation, an entry can be cached with the
that with nested
Hi Mostafa,
On 4/29/24 05:23, Mostafa Saleh wrote:
> This patch adds support for nested(combined) TLB entries.
space between nested and (.
> The main function combine_tlb() is not used here but in the next
> patches, but to simplify the patches it is introduced first.
>
> Main changes:
> 1) New
_entry->entry.perm;
> -entry.translated_addr = cached_entry->entry.translated_addr +
> -(addr & cached_entry->entry.addr_mask);
> +entry.translated_addr = CACHED_ENTRY_TO_ADDR(cached_entry, addr);
> entry.addr_mask = cached_entry->entry.addr_mask;
8 +132,8 @@ typedef struct SMMUPciBus {
>
> typedef struct SMMUIOTLBKey {
> uint64_t iova;
> -uint16_t asid;
> -uint16_t vmid;
> +int asid;
> +int vmid;
> uint8_t tg;
> uint8_t level;
> } SMMUIOTLBKey;
> @@ -205,11 +205,11 @@ IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t
> sid);
> SMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTransCfg *cfg,
> SMMUTransTableInfo *tt, hwaddr iova);
> void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, SMMUTLBEntry
> *entry);
> -SMMUIOTLBKey smmu_get_iotlb_key(uint16_t asid, uint16_t vmid, uint64_t iova,
> +SMMUIOTLBKey smmu_get_iotlb_key(int asid, int vmid, uint64_t iova,
> uint8_t tg, uint8_t level);
> void smmu_iotlb_inv_all(SMMUState *s);
> -void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid);
> -void smmu_iotlb_inv_vmid(SMMUState *s, uint16_t vmid);
> +void smmu_iotlb_inv_asid(SMMUState *s, int asid);
> +void smmu_iotlb_inv_vmid(SMMUState *s, int vmid);
> void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova,
> uint8_t tg, uint64_t num_pages, uint8_t ttl);
>
Reviewed-by: Eric Auger
Eric
mented, CLASS values are
the same for stage 1 and stage2. This will change later on.
Besides
Reviewed-by: Eric Auger
Eric
>
> Signed-off-by: Mostafa Saleh
> ---
> hw/arm/smmuv3-internal.h | 6 ++
> hw/arm/smmuv3.c | 6 +-
> 2 files changed, 11 insertio
ve_complete_precopy(QEMUFile *f, void
> *opaque)
>
> qemu_put_be64(f, VFIO_MIG_FLAG_END_OF_STATE);
> ret = qemu_file_get_error(f);
> -if (ret) {
> -return ret;
> -}
>
> trace_vfio_save_complete_precopy(vbasedev->name, ret);
>
Reviewed-by: Eric Auger
Eric
ror_report_err(local_err);
> return ret;
> }
> }
> @@ -236,7 +238,8 @@ vfio_legacy_set_dirty_page_tracking(const
> VFIOContainerBase *bcontainer,
>
> static int vfio_legacy_query_dirty_bitmap(const VFIOContainerBase
> *bcontainer,
>VFIOBitmap *vbmap,
> - hwaddr iova, hwaddr size)
> + hwaddr iova, hwaddr size,
> + Error **errp)
> {
> const VFIOContainer *container = container_of(bcontainer, VFIOContainer,
>bcontainer);
> @@ -264,9 +267,10 @@ static int vfio_legacy_query_dirty_bitmap(const
> VFIOContainerBase *bcontainer,
> ret = ioctl(container->fd, VFIO_IOMMU_DIRTY_PAGES, dbitmap);
> if (ret) {
> ret = -errno;
> -error_report("Failed to get dirty bitmap for iova: 0x%"PRIx64
> -" size: 0x%"PRIx64" err: %d", (uint64_t)range->iova,
> -(uint64_t)range->size, errno);
> +error_setg_errno(errp, errno,
> + "Failed to get dirty bitmap for iova: 0x%"PRIx64
> + " size: 0x%"PRIx64, (uint64_t)range->iova,
> + (uint64_t)range->size);
> }
>
> g_free(dbitmap);
Reviewed-by: Eric Auger
Eric
t; - " virtio-mem): %" HWADDR_PRIx "",
> +error_setg(errp, "iommu map to discarded memory (e.g., unplugged"
> + " via virtio-mem): %" HWADDR_PRIx "",
> iotlb->translated_addr);
> return false;
> }
> @@ -2228,7 +2228,7 @@ bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void
> **vaddr,
> * check that it did not truncate too much.
> */
> if (len & iotlb->addr_mask) {
> -error_report("iommu has granularity incompatible with target AS");
> +error_setg(errp, "iommu has granularity incompatible with target
> AS");
> return false;
> }
>
Reviewed-by: Eric Auger
Eric
ADDR_PRIx") = %d (%s)",
> + bcontainer, iova, iotlb->addr_mask + 1, ret,
> + strerror(-ret));
> +}
> +
> +out_unlock:
> rcu_read_unlock();
>
> out:
Reviewed-by: Eric Auger
Eric
t VMStateDescription
> vmstate_vfio_pci_config = {
> }
> };
>
> -static void vfio_pci_save_config(VFIODevice *vbasedev, QEMUFile *f)
> +static int vfio_pci_save_config(VFIODevice *vbasedev, QEMUFile *f, Error
> **errp)
> {
> VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
>
> -vmstate_save_state(f, _vfio_pci_config, vdev, NULL);
> +return vmstate_save_state_with_err(f, _vfio_pci_config, vdev,
> NULL,
> + errp);
> }
>
> static int vfio_pci_load_config(VFIODevice *vbasedev, QEMUFile *f)
Looks good to me
Reviewed-by: Eric Auger
Eric
Hi Cédric,
On 5/14/24 17:31, Cédric Le Goater wrote:
> Add an Error** argument to vfio_migration_set_state() and adjust
> callers, including vfio_save_setup(). The error will be propagated up
> to qemu_savevm_state_setup() where the save_setup() handler is
> executed.
>
> Modify
;
>
> WITH_QEMU_LOCK_GUARD(>qemu_file_lock) {
> if (s->to_dst_file) {
> -qemu_file_set_error(s->to_dst_file, err);
> +qemu_file_set_error_obj(s->to_dst_file, ret, err);
> +} else if (err) {
> +error_report_err(err);
> }
> }
> }
Reviewed-by: Eric Auger
Eric
_dma_logging_stop(bcontainer);
> } else {
> -ret = vfio_container_set_dirty_page_tracking(bcontainer, false,
> NULL);
> +ret = vfio_container_set_dirty_page_tracking(bcontainer, false,
> + _err);
> }
&g
ainer,
> ret = ioctl(container->fd, VFIO_IOMMU_DIRTY_PAGES, );
> if (ret) {
> ret = -errno;
> -error_report("Failed to set dirty tracking flag 0x%x errno: %d",
> - dirty.flags, errno);
> +error_setg_errno(errp, errno, "Failed to set dirty tracking flag
> 0x%x",
> + dirty.flags);
> }
>
> return ret;
Besides
Reviewed-by: Eric Auger
Eric
; +event.u.f_access.addr2 = ptw_info.addr;
> event.u.f_access.rnw = flag & 0x1;
> }
> break;
> @@ -970,6 +973,7 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion
> *mr, hwaddr addr,
> if (PTW_RECORD_FAULT(cfg)) {
> event.type = SMMU_EVT_F_PERMISSION;
> event.u.f_permission.addr = addr;
> +event.u.f_permission.addr2 = ptw_info.addr;
> event.u.f_permission.rnw = flag & 0x1;
> }
> break;
>
After taking into account above comments,
Reviewed-by: Eric Auger
Eric
ive IPA size for the given CD.
>
> However, this check was missing.
>
> There is already a similar check for stage-2 against effective PA.
>
> Signed-off-by: Mostafa Saleh
Reviewed-by: Eric Auger
Eric
> ---
> hw/arm/smmu-common.c | 10 ++
> 1 file changed, 10 insertions(+)
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
> but not nested instances.
> This patch series adds support for nested translation in SMMUv3,
> this is controlled by property “arm-smmuv3.stage=nested”, and
> advertised to
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> Some commands need rework for nesting, as they used to assume S1
> and S2 are mutually exclusive:
>
> - CMD_TLBI_NH_ASID: Consider VMID if stage-2 is supported
> - CMD_TLBI_NH_ALL: Consider VMID if stage-2 is supported, otherwise
> invalidate
_cmdq_tlbi_nh_asid(uint16_t asid) "asid=%d"
> smmuv3_cmdq_tlbi_s12_vmid(uint16_t vmid) "vmid=%d"
> diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
> index 03ff0f02ba..df166d8477 100644
> --- a/include/hw/arm/smmu-common.h
> +++ b/include/hw/arm/smmu-common.h
> @@ -230,7 +230,8 @@ void smmu_iotlb_inv_asid(SMMUState *s, int asid);
> void smmu_iotlb_inv_vmid(SMMUState *s, int vmid);
> void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova,
> uint8_t tg, uint64_t num_pages, uint8_t ttl);
> -
> +void smmu_iotlb_inv_ipa(SMMUState *s, int vmid, dma_addr_t ipa, uint8_t tg,
> +uint64_t num_pages, uint8_t ttl);
> /* Unmap the range of all the notifiers registered to any IOMMU mr */
> void smmu_inv_notifiers_all(SMMUState *s);
Besides looks good to me
smmu_hash_remove_by_vmid_ipa
Reviewed-by: Eric Auger
Eric
>
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> When nested translation is requested, do the following:
>
> - Translate stage-1 IPA using stage-2 to a physical address.
> - Translate stage-1 PTW walks using stage-2.
> - Combine both to create a single TLB entry, for that we choose
> the
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> According to the user manual (ARM IHI 0070 F.b),
s/user manual/ARM SMMU architecture specification
> In "5.2 Stream Table Entry":
> [51:6] S1ContextPtr
> If Config[1] == 1 (stage 2 enabled), this pointer is an IPA translated by
> stage 2 and
d with ASID=-1 meaning stage-2.
> Represent ASID/VMID everywhere as int.
small conflict due to
0b796f3810 hw/arm/smmu: Avoid using inlined functions with external
linkage again
Besides
Reviewed-by: Eric Auger
Eric
>
> Signed-off-by: Mostafa Saleh
> ---
> hw/arm/smmu-common
Hi Mostafa,
On 4/2/24 20:47, Mostafa Saleh wrote:
> Hi Eric,
>
> On Tue, Apr 02, 2024 at 07:15:20PM +0200, Eric Auger wrote:
>> Hi Mostafa,
>>
>> On 3/25/24 11:13, Mostafa Saleh wrote:
>>> TLBs for nesting will be extended to be combined, a new index is ad
Hi Mostafa,
On 3/25/24 11:13, Mostafa Saleh wrote:
> TLBs for nesting will be extended to be combined, a new index is added
> "stage", with 2 valid values:
> - SMMU_STAGE_1: Meaning this translates VA to PADDR, this entry can
>be cached from fully nested configuration or from stage-1 only.
>
"%s sid=0x%x STE bypass iova:0x%"PRIx64" is_write=%d"
> smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool
> is_write) "%s sid=0x%x abort on iova:0x%"PRIx64" is_write=%d"
> -smmuv3_translate_success(const char *n, uint16_t sid, uint64_t
this is useful for:
> - Doing tricks with bit masks, where BIT(0) is stage-1 and BIT(1) is
>stage-2 and both is nested.
> - Tracing, as stage is printed as int.
>
> Signed-off-by: Mostafa Saleh
Reviewed-by: Eric Auger
Eric
> ---
> hw/arm/smmu-common.c |
From: Haibo Xu
Introduce query support for KVM_CAP_ARM_EL2.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/kvm.c | 5 +
target/arm/kvm_arm.h | 12
2 files
-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v2 -> v3:
- tweak the commit message and explain why we do not proceed
the same way as kvm_arm_pmu_set_irq (Peter)
v1 -> v2:
- [Miguel] replaced the has_virt_extensions by the maintenance irq
intid property.
From: Haibo Xu
Up to now virt support on guest has been only supported with TCG.
Now it becomes feasible to use it with KVM acceleration.
Also check only in-kernel GICv3 is used along with KVM EL2.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v2 ->
-enforcement
Signed-off-by: Eric Auger
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index c59ea55cd8..d46839f1d9
From: Haibo Xu
KVM_CAP_ARM_EL2 must be supported by the cpu to enable ARM_FEATURE_EL2.
In case the host does support NV, expose the feature.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v2 -> v3:
- check pmu->has_el2 on kvm_arch_init_vcpu() when s
This series adds ARM Nested Virtualization support in KVM mode.
This is a respin of previous contributions from Miguel [1] and Haibo [2].
This was tested with Marc's v11 [3] on Ampere HW with fedora L1 guest and
L2 guests booted without EDK2. However it does not work yet with
EDK2 but it looks
hw/arm/smmu-common.c:139:17: note: 'smmu_hash_remove_by_vmid' declared here
> static gboolean smmu_hash_remove_by_vmid(gpointer key, gpointer value,
> ^
>
> Fixes: ccc3ee3871 ("hw/arm/smmuv3: Add CMDs related to stage-2")
> Signed-off-by: Philippe Mathieu-Daudé
> R
Hi Peter,
On 3/5/24 17:46, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> From: Haibo Xu
>>
>> Allow virt arm machine to set the intid for the KVM GIC maintenance
>> interrupt.
>>
>> Signed-off-by: Haibo Xu
>> Signed-off-
Hi Peter,
On 3/5/24 17:57, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> This series adds ARM Nested Virtualization support in KVM mode.
>> This is a respin of previous contributions from Miguel [1] and Haibo [2].
>>
>> This was tested with
Hi Peter,
On 3/5/24 17:49, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> From: Haibo Xu
>>
>> KVM_CAP_ARM_EL2 must be supported by the cpu to enable ARM_FEATURE_EL2.
>> In case the host does support NV, expose the feature.
>>
>>
Hi Peter,
On 3/5/24 17:46, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> From: Haibo Xu
>>
>> Allow virt arm machine to set the intid for the KVM GIC maintenance
>> interrupt.
>>
>> Signed-off-by: Haibo Xu
>> Signed-off-
Hi,
On 3/19/24 19:07, Daniel P. Berrangé wrote:
> On Tue, Mar 19, 2024 at 06:58:33PM +0100, Eric Auger wrote:
>> Hi Daniel,
>>
>> On 3/19/24 16:22, Daniel P. Berrangé wrote:
>>> On Wed, Feb 21, 2024 at 01:34:31AM -0500, Shaoqin Huang wrote:
>>>> The KVM_A
Hi Daniel,
On 3/19/24 16:22, Daniel P. Berrangé wrote:
> On Wed, Feb 21, 2024 at 01:34:31AM -0500, Shaoqin Huang wrote:
>> The KVM_ARM_VCPU_PMU_V3_FILTER provides the ability to let the VMM decide
>> which PMU events are provided to the guest. Add a new option
>> `kvm-pmu-filter` as -cpu
Hi Shaoqin,
On 3/12/24 08:48, Shaoqin Huang wrote:
> The KVM_ARM_VCPU_PMU_V3_FILTER provides the ability to let the VMM decide
> which PMU events are provided to the guest. Add a new option
> `kvm-pmu-filter` as -cpu sub-option to set the PMU Event Filtering.
> Without the filter, all PMU events
Hi Peter,
On 2/29/24 12:00, Peter Maydell wrote:
> On Thu, 29 Feb 2024 at 02:32, Shaoqin Huang wrote:
>>
>> Hi Peter,
>>
>> On 2/22/24 22:28, Peter Maydell wrote:
>>> On Wed, 21 Feb 2024 at 06:34, Shaoqin Huang wrote:
The KVM_ARM_VCPU_PMU_V3_FILTER provides the ability to let the VMM
On 3/19/24 04:46, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v1 08/11] vfio/pci: Allocate and initialize
>> HostIOMMUDevice after attachment
>>
>>
>>
>> On 2/28/24 04:58, Zhen
Hi Zhenzhong,
On 3/19/24 06:44, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v1 05/11] vfio: Introduce host_iommu_device_create
>> callback
>>
>>
>>
>> On 2/28/24 04:58, Zhenzhong Duan wro
Hi Joao,
On 3/18/24 16:09, Joao Martins wrote:
> On 18/03/2024 07:54, Eric Auger wrote:
>> Hi Zhenzhong,
>>
>> On 2/28/24 04:59, Zhenzhong Duan wrote:
>>> Introduce a helper function iommufd_device_get_info() to get
>>> host IOMMU related information through
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Hi,
>
> Based on Joao's suggestion, the iommufd nesting prerequisite series [1]
> is further splitted to host IOMMU device abstract part and vIOMMU
> check/sync part. This series implements the 1st part.
>
> This split also faciliates the dirty tracking
Hi Zhenzhong,
On 2/28/24 04:59, Zhenzhong Duan wrote:
> Introduce a helper function iommufd_device_get_info() to get
> host IOMMU related information through iommufd uAPI.
Looks strange to have this patch in this series. I Would rather put it
in your second series alongs with its user.
Eric
>
>
Hi Zhenzhong,
On 2/28/24 04:58, Zhenzhong Duan wrote:
> From: Yi Liu
>
> This adds pci_device_set/unset_iommu_device() to set/unset
> HostIOMMUDevice for a given PCIe device. Caller of set
> should fail if set operation fails.
>
> Extract out pci_device_get_iommu_bus_devfn() to facilitate
>
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Introduce host_iommu_device_create callback and a wrapper for it.
>
> This callback is used to allocate a host iommu device instance and
> initialize it based on type.
>
> Signed-off-by: Zhenzhong Duan
> ---
> include/hw/vfio/vfio-common.h | 1
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Signed-off-by: Zhenzhong Duan
> ---
> hw/vfio/pci.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 4fa387f043..6cc7de5d10 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -3006,6 +3006,9 @@
On 3/18/24 14:52, Eric Auger wrote:
> Hi ZHenzhong,
>
> On 2/28/24 04:58, Zhenzhong Duan wrote:
>> Introduce host_iommu_device_create callback and a wrapper for it.
>>
>> This callback is used to allocate a host iommu device instance and
>> initialize i
Eric
>
> Introduce a helper function host_iommu_base_device_init to initialize it.
>
> Suggested-by: Eric Auger
> Signed-off-by: Zhenzhong Duan
> ---
> include/sysemu/host_iommu_device.h | 22 ++
> 1 file changed, 22 insertions(+)
> create mode 100644 i
Hi ZHenzhong,
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Introduce host_iommu_device_create callback and a wrapper for it.
>
> This callback is used to allocate a host iommu device instance and
> initialize it based on type.
>
> Signed-off-by: Zhenzhong Duan
> ---
> include/hw/vfio/vfio-common.h
On 2/28/24 04:58, Zhenzhong Duan wrote:
> This handle points to either IOMMULegacyDevice or IOMMUFDDevice variant,
> neither both.
I would reword into:
store an handle to the HostIOMMUDevice the VFIODevice is associated with
. Its actual nature depends on the backend in use (VFIO or IOMMUFD).
Hi Michael,
On 3/13/24 12:17, Michael S. Tsirkin wrote:
> On Wed, Mar 13, 2024 at 07:54:11AM +, Duan, Zhenzhong wrote:
>>
>>> -Original Message-
>>> From: Michael S. Tsirkin
>>> Subject: Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and
>>> sync host IOMMU cap/ecap
>>>
>>>
On 3/13/24 22:06, Cédric Le Goater wrote:
> Make sure variable contents is freed if scanf fails.
>
> Cc: Eric Auger
> Cc: Yi Liu
> Cc: Zhenzhong Duan
> Fixes: CID 1540007
> Fixes: 5ee3dc7af785 ("vfio/iommufd: Implement the iommufd backend")
> Signed-
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