On Thu, Apr 11, 2024 at 5:06 PM Zack Buhman wrote:
>
> I noticed the recent SH4 patches are included in the 9.0.0-rc3 release.
>
> Is it appropriate that I request a wiki.qemu.org account so that I may
> document these changes in https://wiki.qemu.org/ChangeLog/9.0 in a manner
> that is
-sta...@nongnu.org
Signed-off-by: Max Filippov
---
Changes v1->v2:
- split into a separate patch
- add PPC, SPARC and big-endian MIPS
linux-user/syscall.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
in
sysv IPC structures")
Signed-off-by: Max Filippov
---
Changes v1->v2:
- split into a separate patch
linux-user/syscall.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index e384e1424890..d9bfd31c1cad 100644
---
On Fri, Mar 29, 2024 at 5:48 AM Philippe Mathieu-Daudé
wrote:
>
> Hi Max,
>
> On 29/3/24 07:31, Max Filippov wrote:
> > - target_ipc_perm::mode and target_ipc_perm::__seq fields are 32-bit wide
> >on xtensa and thus need to use tswap32
> > - target_msqid_ds::msg_
http://nsz.repo.hu/git/?p=libc-test
Cc: qemu-sta...@nongnu.org
Fixes: a3da8be5126b ("target/xtensa: linux-user: fix sysv IPC structures")
Signed-off-by: Max Filippov
---
linux-user/syscall.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/
On Thu, Mar 21, 2024 at 8:50 AM Philippe Mathieu-Daudé
wrote:
>
> Extract the MMU API and expose it via "mmu.h" so we can
> reuse the methods in target/xtensa/ files.
The MMU/MPU are replaceable configuration blocks in the xtensa
architecture, their internals don't have architecture-wide
On Mon, Jan 22, 2024 at 10:42 AM Peter Maydell wrote:
>
> On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
> >
> > Whether TLB ways 5 and 6 are variable is not a property of the TLB
> > instance or a TLB entry instance, it's a property of the xtensa core
> > confi
On Mon, Jan 22, 2024 at 10:29 AM Peter Maydell wrote:
>
> On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
> >
> > Make separation of alternative xtensa memory management options state
> > explicit.
> >
> > Signed-off-by: Max Filippov
> >
to the XtensaConfig and use it instead of
removed fields.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.h | 3 +--
target/xtensa/mmu_helper.c | 38 ++--
target/xtensa/overlay_tool.h | 15 --
3 files changed, 24 insertions(+), 32
Hello,
this series separates xtensa MMU and MPU states and improves variable
TLB way logic.
Max Filippov (2):
target/xtensa: wrap MMU and MPU state into structures
target/xtensa: tidy TLB way variability logic
target/xtensa/cpu.h | 21 +++---
target/xtensa/mmu_helper.c | 74
Make separation of alternative xtensa memory management options state
explicit.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.h| 18 +
target/xtensa/mmu_helper.c | 40 +++---
2 files changed, 34 insertions(+), 24 deletions(-)
diff
Hello,
this series adds xtensa core 'sample_controller32' with 32 foreground
entry MPU, adds missing translation for the 'wsr.mpucfg' opcode and
makes xtensa/tcg/tests work with the new core.
Max Filippov (4):
target/xtensa: add translation for wsr.mpucfg
target/xtensa: import
-off-by: Max Filippov
---
tests/tcg/xtensa/test_sr.S | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/tests/tcg/xtensa/test_sr.S b/tests/tcg/xtensa/test_sr.S
index 34441c7afff7..661ef6c66ed1 100644
--- a/tests/tcg/xtensa/test_sr.S
+++ b/tests/tcg/xtensa/test_sr.S
.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/linker.ld.S | 34 +++---
1 file changed, 11 insertions(+), 23 deletions(-)
diff --git a/tests/tcg/xtensa/linker.ld.S b/tests/tcg/xtensa/linker.ld.S
index ac89b0054ee4..0e21eee31ccc 100644
--- a/tests/tcg/xtensa
Although MPUCFG is not writable, the opcode wsr.mpucfg is defined and it
just does nothing. Define wsr.mpucfg as nop.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
Add a test reading *TLB ways 0..15.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_mmu.S | 11 +++
1 file changed, 11 insertions(+)
diff --git a/tests/tcg/xtensa/test_mmu.S b/tests/tcg/xtensa/test_mmu.S
index 1006c8cf77b2..94cd09563c7a 100644
--- a/tests/tcg/xtensa/test_mmu.S
helpers that requested TLB way is valid and return 0 or do
nothing when it's not.
Cc: qemu-sta...@nongnu.org
Fixes: b67ea0cd7441 ("target-xtensa: implement memory protection options")
Signed-off-by: Max Filippov
---
target/xtensa/mmu_helper.c | 47 --
1 fi
that recognizes valid instruction breakpoints.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.c| 1 +
target/xtensa/cpu.h| 4
target/xtensa/dbg_helper.c | 46 +-
target/xtensa/helper.c | 12 ++
target/xtensa/translate.c | 17
When icount and ibreak exceptions are due to happen on the same address
icount has higher precedence.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_break.S | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/tests/tcg/xtensa/test_break.S b/tests
Hello,
this series makes target/xtensa use generic instruction breakpoint
infrastructure removing its use of tb_invalidate_phys_addr. It also adds
a new TCG test checking relative priority of icount and ibreak exceptions
for target/xtensa.
Max Filippov (2):
target/xtensa: use generic
On Tue, Nov 28, 2023 at 10:06 AM Richard Henderson
wrote:
> On 11/28/23 05:08, Philippe Mathieu-Daudé wrote:
> > (In sysemu there is a single use in Xtensa tb_invalidate_virtual_addr).
>
> I suspect that should be migrated to use the common HW breakpoint support.
I'm taking a look.
--
Thanks.
Max Filippov (1):
linux-user: xtensa: fix signal delivery in FDPIC
linux-user/xtensa/signal.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
On Sun, Nov 19, 2023 at 10:52 AM Max Filippov wrote:
>
> The following changes since commit b411438aa4ecaf4bbde90e20283e5899fec10f58:
>
> target/xtensa: Use tcg_gen_sextract_i32 (2023-10-21 19:17:28 -0700)
>
> are available in the Git repository at:
>
> https://github.
Max Filippov (1):
linux-user: xtensa: fix signal delivery in FDPIC
linux-user/xtensa/signal.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
On Sun, Nov 12, 2023 at 8:51 AM Richard Henderson
wrote:
>
> On 11/11/23 03:22, Max Filippov wrote:
> > In FDPIC signal handlers are passed around as FD pointers. Actual code
> > address and GOT pointer must be fetched from memory by the QEMU code
> > that implement
ivery to FDPIC process")
Cc: qemu-sta...@nongnu.org
Fixes: d2796be69d7c ("linux-user: add support for xtensa FDPIC")
Signed-off-by: Max Filippov
---
linux-user/xtensa/signal.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/linux-us
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
Typo in subject: s/XTFPAG/XTFPGA/
Otherwise:
Acked-by: Max Filippov
--
Thanks.
-- Max
On Mon, Oct 23, 2023 at 9:10 AM Philippe Mathieu-Daudé
wrote:
>
> Inspired-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/xtensa/translate.c | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
On Thu, Oct 19, 2023 at 11:29 AM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 12 +---
> 1 file changed, 1 insertion(+), 11 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
tensa/op_helper.c | 8
> target/xtensa/translate.c | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
On Tue, Jul 4, 2023 at 6:27 AM Peter Maydell wrote:
>
> On Sat, 24 Jun 2023 at 01:20, Max Filippov wrote:
> >
> > On Fri, Jun 23, 2023 at 8:41 AM Peter Maydell
> > wrote:
> > >
> > > In handle_interrupt() we use level as an index into the interrupt_vec
off-by: Peter Maydell
> ---
> NB: only tested with 'make check-avocado'. You could argue that we
> should mark the coverity issue as false-positive instead if you like.
> ---
> target/xtensa/exc_helper.c | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Max Filippov
--
Thanks.
-- Max
On Wed, May 3, 2023 at 2:12 AM Alex Bennée wrote:
>
> These are needed for board creation so fail under "make check" with a
> --without-default-devices build.
>
> Signed-off-by: Alex Bennée
> ---
> hw/xtensa/Kconfig | 2 ++
> 1 file changed, 2 insert
On Tue, May 2, 2023 at 6:57 AM Richard Henderson
wrote:
>
> Convert away from the old interface with the implicit
> MemOp argument.
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
R
/xtensa updates for v8.0:
- enable testing big-endian xtensa cores
Max Filippov (2):
tests/tcg/xtensa: add linker.ld to CLEANFILES
tests/tcg/xtensa: allow testing big-endian cores
MAINTAINERS
Don't disable all big-endian tests, instead check whether $(CORE) is
supported by the configured $(QEMU) and enable tests if it is.
Signed-off-by: Max Filippov
Reviewed-by: Philippe Mathieu-Daudé
---
MAINTAINERS| 1 +
tests/tcg/xtensa/Makefile.softmmu-target
On Tue, Mar 14, 2023 at 4:41 PM Wilfred Mallawa wrote:
>
> On Tue, 2023-03-14 at 15:08 -0700, Max Filippov wrote:
> > Linker script for xtensa tests must be preprocessed for a specific
> > target, remove it as a part of make clean.
> >
> > Signed-off-by: Max Fi
Linker script for xtensa tests must be preprocessed for a specific
target, remove it as a part of make clean.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/Makefile.softmmu-target | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/xtensa/Makefile.softmmu-target
b/tests/tcg/xtensa
On Sun, Feb 26, 2023 at 9:48 PM Richard Henderson
wrote:
>
> All remaining uses are strictly read-only.
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
On Sun, Feb 26, 2023 at 9:48 PM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
On Sun, Feb 26, 2023 at 9:48 PM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
On Sun, Feb 26, 2023 at 9:48 PM Richard Henderson
wrote:
>
> Use addi on the addition side and tcg_constant_i32 on the other.
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Revi
On Sun, Feb 26, 2023 at 9:48 PM Richard Henderson
wrote:
>
> All writes to arg[0].out; use tcg_constant_i32.
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
le changed, 7 insertions(+), 11 deletions(-)
Reviewed-by: Max Filippov
--
Thanks.
-- Max
On Sun, Feb 26, 2023 at 1:18 AM Damien Zammit wrote:
>
> Hi Michael,
>
> Thanks for reviewing this on a weekend!
>
> On 26/2/23 19:51, Michael S. Tsirkin wrote:
> > On Sun, Feb 26, 2023 at 01:58:10AM +, Damien Zammit wrote:
> >> case 0:
> >> -out = (d >= s->count);
> >> -
On Sat, Feb 25, 2023 at 1:20 AM Richard Henderson
wrote:
>
> Translators are no longer required to free tcg temporaries.
>
> Signed-off-by: Richard Henderson
> ---
> target/xtensa/translate.c | 107 --
> 1 file changed, 107 deletions
> 1 file changed, 2 insertions(+), 12 deletions(-)
There should be 'target/xtensa' in the subject.
Reviewed-by: Max Filippov
--
Thanks.
-- Max
Define xtensa-specific info_is_fdpic and fill in FDPIC-specific
registers in the xtensa version of init_thread.
Signed-off-by: Max Filippov
---
include/elf.h| 1 +
linux-user/elfload.c | 16 +++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/include/elf.h b
On Tue, Nov 29, 2022 at 6:08 PM Dongdong Zhang
wrote:
> diff --git a/python/qemu/machine/qtest.py b/python/qemu/machine/qtest.py
> index 1a1fc6c9b0..906bd13298 100644
> --- a/python/qemu/machine/qtest.py
> +++ b/python/qemu/machine/qtest.py
> @@ -42,7 +42,7 @@ class QEMUQtestProtocol:
>
On Thu, Jan 5, 2023 at 8:51 AM Alex Bennée wrote:
>
> These inline helpers are all used by target specific code so move them
> out of the general header so we don't needlessly pollute the rest of
> the API with target specific stuff.
>
> Note we have to include cpu.h in semihosting as it was
On Mon, Nov 21, 2022 at 6:01 AM Markus Armbruster wrote:
> .../xtensa/core-dsp3400/xtensa-modules.c.inc | 136 +-
> target/xtensa/core-lx106/xtensa-modules.c.inc | 16 +--
These files are generated and were imported from xtensa configuration
overlays, they're not supposed to be
> ---
> target/xtensa/translate.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
Acked-by: Max Filippov
--
Thanks.
-- Max
On Wed, Jun 29, 2022 at 3:14 AM Alex Bennée wrote:
> Max Filippov writes:
> > There's no notion of 'serial hardware' for the xtensa-sim, all it has is
> > the three standard stdio file descriptors.
>
> Which are accessed via semihosting calls?
Yes.
> Are they implicit
On Wed, Jun 29, 2022 at 1:09 AM Alex Bennée wrote:
> Richard Henderson writes:
> > On 6/28/22 19:08, Max Filippov wrote:
> >> On Tue, Jun 28, 2022 at 4:43 AM Richard Henderson
> >> wrote:
> >>> }
> >>> -if (serial_hd(0)) {
On Tue, Jun 28, 2022 at 5:36 PM Richard Henderson
wrote:
> On 6/28/22 19:08, Max Filippov wrote:
> > On Tue, Jun 28, 2022 at 4:43 AM Richard Henderson
> > wrote:
...
> >> diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
> >> index 946c71cb5b..5cca6a170e
Hello,
there used to be an option to run tcg tests for a softmmu target with
make check-tcg
but since the commit 5377a1000192 ("tests/tcg: list test targets in
Makefile.prereqs")
it is no longer working for me.
Is it supposed to be working and was broken by accident? Or what is the correct
way
.h | 3 +-
> target/xtensa/helper.h | 3 -
> hw/xtensa/sim.c | 3 -
> target/xtensa/exc_helper.c | 4 +
> target/xtensa/translate.c | 3 +-
> target/xtensa/xtensa-semi.c | 229
> 6 files changed, 59 in
On Tue, Jun 28, 2022 at 4:43 AM Richard Henderson
wrote:
>
> This separates guest file descriptors from host file descriptors,
> and utilizes shared infrastructure for integration with gdbstub.
> Remove the xtensa custom console handing and rely on the
> generic -semihosting-config handling of
On Tue, Jun 7, 2022 at 10:36 PM Richard Henderson
wrote:
>
> This separates guest file descriptors from host file descriptors,
> and utilizes shared infrastructure for integration with gdbstub.
> Remove the xtensa custom console handing and rely on the
> generic -semihosting-config handling of
;
- import lx106 core (used in the esp8266 IoT chips);
- use tcg_constant_* in the front end;
- add clock input to the xtensa CPU;
- fix reset state of the xtensa MX PIC;
- implement cache testing opcodes.
Max Filippov (17):
target
.
Max Filippov (17):
tests/tcg/xtensa: allow testing big-endian cores
target/xtensa: fix missing tcg_temp_free in gen_window_check
target/xtensa: use tcg_contatnt_* for numeric literals
target/xtensa: use tcg_constant_* for exceptions
target/xtensa: use
We don't model caches, so for l*ct opcodes return tags with all bits
(including Valid) set to 0. For all other opcodes don't do anything.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target
MMU test suite is disabled for cores that have spanning TLB way, i.e.
for all MMUv3 cores. Instead of disabling it make testing region virtual
addresses explicit and invalidate TLB mappings for entries that conflict
with the test.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_mmu.S
Writing garbage into the vecbase SR results in hang in the subsequent
tests that expect to raise an exception. Restore vecbase SR to its
reset value after the test.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_sr.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/tcg/xtensa
conditional.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_timer.S | 48 ++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/tests/tcg/xtensa/test_timer.S b/tests/tcg/xtensa/test_timer.S
index 2a383e77190e..2a06eebad883 100644
--- a/tests/tcg
Autorefill tests in the phys_mem test suite are disabled for cores that
have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it
invalidate TLB mappings for entries that conflict with the test.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_phys_mem.S | 10 +-
1
Don't try to initialize windowbase/windowstart in crt.S if they don't
exist.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/crt.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/tcg/xtensa/crt.S b/tests/tcg/xtensa/crt.S
index d9846acace90..909872cd3853 100644
--- a/tests/tcg
xtensa core may have only one set of DBREAKA/DBREAKC registers. Don't
hardcode register numbers in the test as 0 and 1, use macros that only
index valid DBREAK* registers.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_break.S | 86 +++
1 file changed, 46
xtensa core may not have the loop option, but still have timers. Don't
use loop opcode in the timer test.
Signed-off-by: Max Filippov
---
tests/tcg/xtensa/test_timer.S | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tests/tcg/xtensa/test_timer.S b
).
Max Filippov (7):
tests/tcg/xtensa: fix build for cores without windowed registers
tests/tcg/xtensa: restore vecbase SR after test
tests/tcg/xtensa: fix watchpoint test
tests/tcg/xtensa: remove dependency on the loop option
tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3
MX PIC comes out of reset with IRQ routing registers set to 0, thus
not delivering any external IRQ to any connected CPU by default.
Fix the model to match the hardware.
Signed-off-by: Max Filippov
---
hw/xtensa/mx_pic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw
On Sun, Apr 24, 2022 at 10:40 PM Simon Safar wrote:
> On Sat, Apr 23, 2022, at 2:26 PM, Max Filippov wrote:
> > It's for a (future...) Lisp compiler! Somewhat in the style of MicroPython;
> > the idea
> > is to make code editable on the fly, without reflashing (... or
On Sun, Apr 24, 2022 at 10:24 PM Simon Safar wrote:
> On Sat, Apr 23, 2022, at 2:41 PM, Max Filippov wrote:
> > I've noticed that this file is not from the original overlay (which I happen
> > to have here:
> > https://github.com/jcmvbkbc/xtensa-toolchain-build/blob/master/ov
ript; the only change is removing
> the reference to core-matmap.h which doesn't seem to be available.
>
> Signed-off-by: Simon Safar
> Reviewed-by: Max Filippov
> ---
> target/xtensa/core-lx106.c| 52 +
> target/xtensa/core-lx106/core-isa.h
On Fri, Apr 22, 2022 at 8:16 PM Simon Safar wrote:
> It's for a (future...) Lisp compiler! Somewhat in the style of MicroPython;
> the idea
> is to make code editable on the fly, without reflashing (... or restarting,
> even).
Interesting. Do you use libisa or do you do instruction encoding on
Create clock input for the xtensa CPU device and initialize its
frequency to the default core frequency specified in the config.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.c | 15 +++
target/xtensa/cpu.h | 5 +
target/xtensa/op_helper.c | 7 ---
3 files
FPU conversion opcodes pass scale (range 0..15) and rounding mode to
their helpers. Use tcg_constant_* for them.
Reviewed-by: Richard Henderson
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git
) to the helper;
use tcg_constant_* for the constants listed above. Fold gen_waiti body
into the translate_waiti as it's the only user.
Signed-off-by: Max Filippov
---
Changes v2->v3:
- use 'pc' consistently in gen_check_atomctl
Changes v1->v2:
- convert gen_jumpi, disas_xtens
dtlb is a boolean flag, use tcg_constant_* for it.
Reviewed-by: Richard Henderson
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index e92cc6fbf8c6
) to the helper;
use tcg_constant_* for the constants listed above. Fold gen_waiti body
into the translate_waiti as it's the only user.
Signed-off-by: Max Filippov
---
Changes v1->v2:
- convert gen_jumpi, disas_xtensa_insn, test_exceptions_retw and
gen_check_atomctl
- use tcg_constant_* for
Replace tcg_const_* for numeric literals with tcg_constant_*.
Reviewed-by: Richard Henderson
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 28 +---
1 file changed, 9 insertions(+), 19 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa
pc and w are allocated with tcg_const_i32 but not freed in
gen_window_check. Use tcg_constant_i32 for them both.
Fixes: 2db59a76c421 ("target-xtensa: record available window in TB flags")
Signed-off-by: Max Filippov
---
Changes v1->v2:
- also use tcg_constant_* for PC
target/xtens
Numbered special registers are small arrays of consecutive SRs. Use
tcg_constant_* for the SR index.
Reviewed-by: Richard Henderson
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/target/xtensa
Use tcg_contant_* for exception number, exception cause, debug cause
code and exception PC.
Signed-off-by: Max Filippov
---
Changes v1->v2:
- also use tcg_constant_* for PC
target/xtensa/translate.c | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/tar
this series replaces tcg_const_* with tcg_constant_* in the xtensa front
end.
Changes v1->v2:
- also use tcg_constant_* for PC
Max Filippov (7):
target/xtensa: fix missing tcg_temp_free in gen_window_check
target/xtensa: use tcg_contatnt_* for numeric literals
target/xtensa:
amount (0..31) to the helper;
- gen_waiti passes immediate (0..15) to the helper;
use tcg_constant_* for the constants listed above. Fold gen_waiti body
into the translate_waiti as it's the only user.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 44
Numbered special registers are small arrays of consecutive SRs. Use
tcg_constant_* for the SR index.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa
FPU conversion opcodes pass scale (range 0..15) and rounding mode to
their helpers. Use tcg_constant_* for them.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/target/xtensa/translate.c b/target
Replace tcg_const_* for numeric literals with tcg_constant_*.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 28 +---
1 file changed, 9 insertions(+), 19 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index f4dac27507fd
Exception number, exception cause and debug cause codes are small
numbers, use tcg_contant_* for them.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
dtlb is a boolean flag, use tcg_constant_* for it.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 77d2e1303746..82a0dbf46d7c 100644
Hello,
this series replaces tcg_const_* with tcg_constant_* in the xtensa front
end.
Max Filippov (6):
target/xtensa: use tcg_contatnt_* for numeric literals
target/xtensa: use tcg_constant_* for exceptions
target/xtensa: use tcg_constant_* for TLB opcodes
target/xtensa: use
target/xtensa/core-lx106/gdb-config.c.inc
> create mode 100644 target/xtensa/core-lx106/xtensa-modules.c.inc
An update to target/xtensa/cores.list is needed for this core to be built
in qemu-6.2+. Please keep that file alphabetically sorted.
With that addressed:
Reviewed-by: Max Filippov
I'm curious how is it supposed to be used?
--
Thanks.
-- Max
pc and w are allocated with tcg_const_i32 but not freed in
gen_window_check. Add missing tcg_temp_free for pc, use tcg_constant_i32
for w.
Fixes: 2db59a76c421 ("target-xtensa: record available window in TB flags")
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 3 ++-
1 fi
Don't disable all big-endian tests, instead check whether $(CORE) is
supported by the configured $(QEMU) and enable tests if it is.
Signed-off-by: Max Filippov
---
MAINTAINERS| 1 +
tests/tcg/xtensa/Makefile.softmmu-target | 4 ++--
tests/tcg/xtensaeb
us() from the generic cpus.c into a
> new target-specific unit.
>
> Fixes: e0220bb5b2 ("softmmu: Build target-agnostic objects once")
> Reported-by: Max Filippov
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> softmmu/cpus.c | 8
> softmmu/cpus_list.c |
Hello,
I've noticed that the command
qemu-system-xtensa -cpu help
no longer prints anything. Apparently because cpu_list is no longer defined
in list_cpus inside softmmu/cpus.c
Bisection points to the following commit:
e0220bb5b200 ("softmmu: Build target-agnostic objects once")
Reverting the
Don't disable all big-endian tests, instead check whether $(CORE) is
supported by the configured $(QEMU) and enable tests if it is.
Signed-off-by: Max Filippov
---
MAINTAINERS| 1 +
tests/tcg/xtensa/Makefile.softmmu-target | 4 ++--
tests/tcg/xtensaeb
| 4 ++--
> target/i386/cpu.c | 2 +-
> target/ppc/cpu_init.c | 2 +-
> target/s390x/cpu_models.c | 4 ++--
> target/xtensa/mmu_helper.c | 2 +-
> 6 files changed, 8 insertions(+), 8 deletions(-)
For target/xtensa:
Acked-by: Max Filippov
--
Thanks.
-- Max
Hi Alex,
I've tried to use
make check-tcg CORE=test_kc705_be CROSS_CC_GUEST=xtensa-test_kc705_be-elf-gcc
to run TCG tests for a big-endian xtensa core. I thought the following change
would be sufficient to do it:
---8<---
diff --git a/tests/tcg/xtensa/Makefile.softmmu-target
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