On Tue, 30 Apr 2024 at 15:00, Peter Maydell wrote:
>
> FEAT_WFxT introduces new instructions WFIT and WFET, which are like
> the existing WFI and WFE but allow the guest to pass a timeout value
> in a register. The instructions will wait for an interrupt/event as
> usual, but
On Fri, 31 May 2024 at 09:54, Alex Bennée wrote:
>
> Brian Cain writes:
> > Related: would a .clang-format file also be useful? git-clang-format
> > can be used to apply formatting changes only on the code that's been
> > changed.
>
> As a pre-commit hook? Or via something like clangd?
I think
On Fri, 31 May 2024 at 05:20, Itaru Kitayama wrote:
>
>
>
> > On May 30, 2024, at 22:30, Philippe Mathieu-Daudé wrote:
> >
> > Cc'ing more developers
> >
> > On 30/5/24 06:30, Itaru Kitayama wrote:
> >> Hi,
> >> When I see a Realm VM creation fails with:
> >> Unexpected error in
On Thu, 30 May 2024 at 18:37, Richard Henderson
wrote:
>
> On 5/30/24 05:51, Peter Maydell wrote:
> >> @@ -87,13 +87,13 @@ sub progress_update($)
> >> my $barlen = int($proglen * $done / $progmax);
> >> if ($barlen != $lastprog) {
&
On Tue, 30 Apr 2024 at 18:15, Alex Bennée wrote:
> The x86 version is essentially being called for side effects. Do we want
> to document this usage in the method?
I plan to take these two patches into target-arm.next, with
a slightly beefed up doc comment:
/**
* @cpu_exec_halt:
On Tue, 21 May 2024 at 00:26, David Hubbard wrote:
>
> From: Cord Amfmgm
>
> This changes the way the ohci emulation handles a Transfer Descriptor with
> "Current Buffer Pointer" set to "Buffer End" + 1.
>
> The OHCI spec 4.3.1.2 Table 4-2 allows td.cbp to be one byte more than td.be
> to signal
On Sun, 26 May 2024 at 21:46, Richard Henderson
wrote:
>
> From: Marcin Juszkiewicz
>
> Cc: qemu-sta...@nongnu.org
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304
> Reported-by: Marcin Juszkiewicz
> Signed-off-by: Richard Henderson
> ---
Applied to target-arm.next, thanks.
On Tue, 28 May 2024 at 21:31, Richard Henderson
wrote:
>
> Changes for v3:
> * Reword prefetch unpredictable patch.
> * Validate vector length when qc is an implied operand.
> * Adjust some legacy decode based on review.
> * Apply r-b.
>
> Patches needing review:
>
On Thu, 30 May 2024 at 12:23, Alex Bennée wrote:
>
> Hi Peter,
>
> Looking at bug #2322 I wanted to make sure SYS_GET_CMDLINE works as I
> expected. While at it I needed to fix a compile error with headers
> which I guess we got away with on earlier compilers.
>
> I've added an editorconfig for
m/tcg/translate-a64.c | 113 ++---
> target/arm/tcg/vec_helper.c| 64 +++
> 5 files changed, 245 insertions(+), 64 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 28 May 2024 at 21:30, Richard Henderson
wrote:
>
> Suggested-by: Peter Maydell
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 28 May 2024 at 21:33, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 28 May 2024 at 21:33, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 28 May 2024 at 21:33, Richard Henderson
wrote:
>
> These are the last instructions within disas_simd_three_reg_same
> and disas_simd_scalar_three_reg_same, so remove them.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 28 May 2024 at 21:32, Richard Henderson
wrote:
>
> These are the only instructions in the 3 source scalar class.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> For test_arch64.s and test_arm.s, use '.inst' so that the risu
> control insns are marked as instructions for disassembly.
>
> For test_i386.S, split the data to be loaded into the data section;
> fix an error aligning the data: 16 not
On Wed, 29 May 2024 at 18:36, Richard Henderson
wrote:
>
> Avoid prefetch patterns that are UNPREDICTABLE.
>
> Signed-off-by: Richard Henderson
> ---
Applied to risu git, thanks.
-- PMM
On Thu, 30 May 2024 at 14:26, Itaru Kitayama wrote:
>
> Hi,
>
> When I see a Realm VM creation fails with:
>
> Unexpected error in rme_configure_one() at ../target/arm/kvm-rme.c:159:m
> qemu-system-aarch64: RME: failed to configure SVE: Invalid argument
The file target/arm/kvm-rme.c doesn't
On Sun, 19 May 2024 at 10:42, Rayhan Faizel wrote:
>
> All BCM2835 boards have on-board OTP memory with 66 32-bit rows. Usually,
> its contents are accessible via mailbox commands.
>
> [Changes in v3]
>
> - Forgot to replace constant with macro in one particular spot.
>
> [Changes in v2]
>
> -
On Sun, 26 May 2024 at 20:37, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> sparc64.risu | 46 ++
> 1 file changed, 46 insertions(+)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:39, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> sparc64.risu | 36
> 1 file changed, 36 insertions(+)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Just a token to verify the script is working.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> risugen| 10 +-
> risugen_common.pm | 50 +-
> risugen_sparc64.pm | 385 +
> 3 files changed, 443 insertions(+), 2 deletions(-)
>
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Use plain grep instead.
>
> Signed-off-by: Richard Henderson
> ---
> contrib/generate_all.sh | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/contrib/generate_all.sh b/contrib/generate_all.sh
> index
ate comparison of VIS instructions.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 26 May 2024 at 20:38, Richard Henderson
wrote:
>
> Printing directly to STDOUT and STDERR will allow the
> print destination to be selected elsewhere.
i.e. using 'select' to set the default filehandle for "print"?
My instinct is to suspect that would be a bit confusing compared
to
;
> Prepare for that by adding a new indirection typedef.
> This allows us to clean up existing usage with void*.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
the data: 16 not 2**16.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
++-
> 1 file changed, 52 insertions(+), 5 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
also applies to the device-specific
> private key.
>
> Signed-off-by: Rayhan Faizel
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 19 May 2024 at 10:42, Rayhan Faizel wrote:
>
> Replace stubbed OTP memory region with the new OTP device.
>
> Signed-off-by: Rayhan Faizel
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 19 May 2024 at 10:42, Rayhan Faizel wrote:
>
> The OTP device registers are currently stubbed. For now, the device
> houses the OTP rows which will be accessed directly by other peripherals.
>
> Signed-off-by: Rayhan Faizel
Reviewed-by: Peter Maydell
thanks
-- PMM
On Mon, 27 May 2024 at 10:53, Philippe Mathieu-Daudé wrote:
>
> On 23/5/24 20:39, Marcin Juszkiewicz wrote:
> > FreeBSD has longer support cycle for stable release (14.x EoL in 2028)
> > than OpenBSD (7.3 we used is already EoL). Also bugfixes are backported
> > so we can stay on 14.x for longer.
s: f9a09ca3ea ("vhost: add support for configure interrupt")
> Cc: qemu-sta...@nongnu.org
> Signed-off-by: Cindy Lu
Reported by Coverity: CID 1468940, 1543938.
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, 24 May 2024 at 13:08, Sebastian Huber
wrote:
>
> v2:
>
> * Add Kconfig support
>
> * Add array of CPUs to ZynqMachineState
>
> * Add FIQ support
>
> Sebastian Huber (2):
> hw/arm/xilinx_zynq: Add cache controller
> hw/arm/xilinx_zynq: Support up to two CPU cores
Applied to
On Fri, 24 May 2024 at 13:08, Sebastian Huber
wrote:
>
> The Zynq 7000 SoCs contain two Arm Cortex-A9 MPCore (the Zynq 7000S have only
> one core). Add support for up to two simulated cores.
>
> Signed-off-by: Sebastian Huber
> +DeviceState *cpudev =
On Fri, 24 May 2024 at 12:33, Sebastian Huber
wrote:
>
> v2:
>
> * Fix handling of SPIs.
>
> * Remove pending state if not in new target list.
>
> Sebastian Huber (2):
> hw/intc/arm_gic: Fix set pending of PPIs
> hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn
Applied to target-arm.next,
On Thu, 23 May 2024 at 17:54, Marcin Juszkiewicz
wrote:
>
> Moving to Neoverse-N2 gives us several cpu features to use for expanding
> our platform:
>
> - branch target identification
> - pointer authentication
> - RME for confidential computing
> - RNG for EFI_PROTOCOL_RNG
> - SVE being enabled
On Thu, 30 May 2024 at 01:52, David Gibson wrote:
>
> On Wed, May 29, 2024 at 02:07:18PM +0300, Oleg Sviridov wrote:
> > Pointer, returned from function 'spapr_vio_find_by_reg', may be NULL and is
> > dereferenced immediately after.
> >
> > Found by Linux Verification Center (linuxtesting.org)
addrCopy,
> - (GDestroyNotify)qapi_free_SocketAddress,
> + qio_qapi_free_SocketAddress,
> context);
> }
Reviewed-by: Peter Maydell
thanks
-- PMM
On Wed, 29 May 2024 at 06:05, Tong Ho wrote:
>
> Add inlined functions to obtain a mask of changed bits. 3 flavors
> are added: toggled, changed to 1, changed to 0.
>
> These newly added utilities aid common device behaviors where
> actions are taken only when a register's bit(s) are changed.
On Tue, 28 May 2024 at 18:36, Richard Henderson
wrote:
>
> On 5/28/24 06:18, Peter Maydell wrote:
> > On Sat, 25 May 2024 at 00:25, Richard Henderson
> > wrote:
> >>
> >> For all, rm == 15 is invalid.
> >> Prior to v8, thumb with rm == 13 i
On Tue, 28 May 2024 at 16:37, Cord Amfmgm wrote:
>
>
>
> On Tue, May 28, 2024 at 9:03 AM Peter Maydell
> wrote:
>>
>> On Mon, 20 May 2024 at 23:24, Cord Amfmgm wrote:
>> > On Mon, May 20, 2024 at 12:05 PM Peter Maydell
>> > wrote:
>> >&
On Sat, 25 May 2024 at 00:22, Richard Henderson
wrote:
>
> In the process, convert more code to gvec as well -- I will need
> the gvec code for implementing SME2. I guess this is about 1/3
> of the job done, but there's no reason to wait until the patch
> set is completely unwieldy.
>
> Changes
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> These are the only instructions in the 3 source scalar class.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 10 ++
> target/arm/tcg/translate-a64.c | 233 -
> 2 files
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> These are the last instructions within disas_simd_three_reg_same
> and disas_simd_scalar_three_reg_same, so remove them.
>
> Signed-off-by: Richard Henderson
> diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
>
On Sat, 25 May 2024 at 00:30, Richard Henderson
wrote:
>
> We already have a gvec helper for the operations, but we aren't
> using it on the aa32 neon side. Create a unified expander for
> use by both aa32 and aa64 translators.
>
> Signed-off-by: Richard Henderson
> --
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 8
> target/arm/tcg/translate-a64.c | 77 ++
> 2 files changed, 31 insertions(+), 54 deletions(-)
>
On Sat, 25 May 2024 at 00:26, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 5
> target/arm/tcg/translate-a64.c | 51 +-
> 2 files changed, 25 insertions(+), 31 deletions(-)
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4
> target/arm/tcg/translate-a64.c | 22 ++
> 2 files changed, 10 insertions(+), 16 deletions(-)
Reviewed-by: Pete
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4
> target/arm/tcg/translate-a64.c | 22 ++
> 2 files changed, 10 insertions(+), 16 deletions(-)
>
Reviewed-by: P
On Sat, 25 May 2024 at 00:31, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 2 ++
> target/arm/tcg/translate-a64.c | 11 +++
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
arm/tcg/neon_helper.c| 27 --
> target/arm/tcg/translate-a64.c | 17 ++--
> target/arm/tcg/translate-neon.c | 4 +-
> 6 files changed, 157 insertions(+), 45 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
arm/tcg/neon_helper.c| 27 --
> target/arm/tcg/translate-a64.c | 17 ++--
> target/arm/tcg/translate-neon.c | 4 +-
> 6 files changed, 158 insertions(+), 45 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 2 ++
> target/arm/tcg/translate-a64.c | 11 +++
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/gengvec.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:30, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/gengvec.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:26, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 12 +++
> target/arm/tcg/translate-a64.c | 132 -
> 2 files changed, 60 insertions(+), 84 deletions(-)
/* SRSHL, URSHL */
> -case 0x0b: /* SQRSHL, UQRSHL */
> -g_assert_not_reached();
> }
Shouldn't the parts of these that aren't ADD,SUB have been in
some previous patches rather than this one?
Otherwise
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4 +++
> target/arm/tcg/translate-a64.c | 48 --
> 2 files changed, 26 insertions(+), 26 deletions(-)
Reviewed
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4 ++
> target/arm/tcg/translate-a64.c | 74 ++
> 2 files changed, 53 insertions(+), 25 deletions(-)
>
Revie
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h | 8
> target/arm/tcg/translate.h | 4
> target/arm/tcg/neon-dp.decode | 10 ++---
> target/arm/tcg/gengvec.c| 24
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 4
> target/arm/tcg/translate-a64.c | 22 +++---
> 2 files changed, 11 insertions(+), 15 deletions(-)
>
Reviewed-by: P
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h | 10 +
> target/arm/tcg/translate.h | 4
> target/arm/tcg/neon-dp.decode | 10 ++---
> target/arm/tcg/gengvec.c| 22
On Sat, 25 May 2024 at 00:29, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 7 ++
> target/arm/tcg/translate-a64.c | 40 +-
> 2 files changed, 32 insertions(+), 15 deletions(-)
+++
> target/arm/tcg/translate-a64.c | 64 --
> 2 files changed, 14 insertions(+), 58 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/a64.decode | 11
> target/arm/tcg/translate-a64.c | 100 +++--
> 2 files changed, 68 insertions(+), 43 deletions(-)
>
On Sat, 25 May 2024 at 00:27, Richard Henderson
wrote:
>
> This eliminates the last uses of these neon helpers.
> Incorporate the MO_64 expanders as an option to the vector expander.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
target/arm/tcg/translate-a64.h | 8 ++
> target/arm/tcg/gengvec64.c | 71 ++
> target/arm/tcg/neon_helper.c | 165 -
> target/arm/tcg/translate-a64.c | 73 +--
> 5 files changed, 103 insertions(+), 222 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 25 May 2024 at 00:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.h| 16 +
> target/arm/tcg/translate-a64.h | 6 ++
> target/arm/tcg/gengvec64.c | 106 +++
> target/arm/tcg/translate-a64.c |
On Sat, 25 May 2024 at 00:28, Richard Henderson
wrote:
>
> No need for a full comparison; xor produces non-zero bits
> for QC just fine.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> Expose the clock period via the QOM 'qtest-clock-period' property so it
> can be used in QTests. This property is only accessible in QTests (not
> via HMP).
>
> Signed-off-by: Philippe Mathieu-Daudé
> Signed-off-by: Inès Varhol
> ---
>
the calculation by hand, it would be
clearer to use the CLOCK_PERIOD_FROM_HZ() macro from hw/clock.h.
(If #including clock.h from the test C file doesn't work for
some reason, you can copy the macro definition; it's a one-liner).
#define SYSCLK_PERIOD CLOCK_PERIOD_FROM_HZ(400)
Otherwise
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> This commit creates a clock in STM32L4x5 SYSCFG and wires it up to the
> corresponding clock from STM32L4x5 RCC.
>
> Signed-off-by: Inès Varhol
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 23 May 2024 at 20:44, Inès Varhol wrote:
>
> `vmstate_stm32l4x5_usart_base` namely uses `VMSTATE_CLOCK` so
> version needs to be 2.
>
> Signed-off-by: Inès Varhol
> ---
> hw/char/stm32l4x5_usart.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
On Wed, 22 May 2024 at 21:40, Inès Varhol wrote:
>
> The previous implementation for EXTI interrupts only handled
> "configurable" interrupts, like those originating from STM32L4x5 SYSCFG
> (the only device currently connected to the EXTI up until now).
>
> In order to connect STM32L4x5 USART to
From: Richard Henderson
Reviewed-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-8-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate.h |5 +
target/arm/tcg/gengvec.c | 1612
Apple Silicon support")
Signed-off-by: Zenghui Yu
Reviewed-by: Alexander Graf
Message-id: 20240503153453.54389-1-zenghui...@linux.dev
Signed-off-by: Peter Maydell
---
target/arm/hvf/hvf.c | 130 +--
1 file changed, 65 insertions(+), 65 deletions(-)
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-31-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h | 7 -
target/arm/tcg/translate-neon.c | 55
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-10-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 21 +++--
target/arm/tcg/translate-a64.c | 86
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-17-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 43
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-36-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 10 +++
target/arm/tcg/translate-a64.c | 144
From: Richard Henderson
These are the last instructions within handle_simd_3same_pair
so remove it.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-34-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-13-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 11
target/arm/tcg/translate-a64.c | 97
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-18-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 13 +
target/arm/tcg/translate-a64.c | 426
Reviewed-by: Peter Maydell
Message-id: 20240524232121.284515-7-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 5455
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-15-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 8 ++
target/arm/tcg/translate-a64.c | 132
-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/dma/xlnx_dpdma.c | 68 ++---
1 file changed, 64 insertions(+), 4 deletions(-)
diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c
index 530717d1885..dde4aeca401 100644
--- a/hw/dma/xlnx_dpdma.c
++
-by: Dorjoy Chowdhury
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20240504141733.14813-1-dorjoychy...@gmail.com
Signed-off-by: Peter Maydell
---
hw/arm/npcm7xx.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index
From: Richard Henderson
These are the last instructions within disas_simd_three_reg_same_fp16,
so remove it.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-30-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-11-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 11 +
target/arm/tcg/translate-a64.c | 78
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-21-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 4 +
target/arm/tcg/a64.decode | 17
target/arm/tcg/translate
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-29-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 4 ++
target/arm/tcg/a64.decode | 12 +
target/arm/tcg/translate
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