On Fri, 19 May 2023 at 07:21, Tommy Wu wrote:
>
> When we receive a packet from the xilinx_axienet and then try to s2mem
> through the xilinx_axidma, if the descriptor ring buffer is full in the
> xilinx axidma driver, we’ll assert the DMASR.HALTED in the
> function : stream_process_s2mem and
Reviewed-by: Frank Chang
On Fri, May 19, 2023 at 2:23 PM Tommy Wu wrote:
> When we receive a packet from the xilinx_axienet and then try to s2mem
> through the xilinx_axidma, if the descriptor ring buffer is full in the
> xilinx axidma driver, we’ll assert the DMASR.HALTED in the
> function :
Thank Edgar E. Iglesias for the advice.
I can submit another patch to do that.
On Fri, May 19, 2023 at 2:39 PM Edgar E. Iglesias
wrote:
>
> On Fri, May 19, 2023 at 8:21 AM Tommy Wu wrote:
>
>> When we receive a packet from the xilinx_axienet and then try to s2mem
>> through the xilinx_axidma,
On Fri, May 19, 2023 at 8:21 AM Tommy Wu wrote:
> When we receive a packet from the xilinx_axienet and then try to s2mem
> through the xilinx_axidma, if the descriptor ring buffer is full in the
> xilinx axidma driver, we’ll assert the DMASR.HALTED in the
> function : stream_process_s2mem and
When we receive a packet from the xilinx_axienet and then try to s2mem
through the xilinx_axidma, if the descriptor ring buffer is full in the
xilinx axidma driver, we’ll assert the DMASR.HALTED in the
function : stream_process_s2mem and return 0. In the end, we’ll be stuck in
an infinite loop in
