Re: [PATCH] ppc/pnv: Add PowerPC Special Purpose Registers

On Thu, 18 Jan 2024 12:27:12 +1000, Nicholas Piggin wrote: > On Thu Jan 18, 2024 at 8:34 AM AEST, dan tan wrote: >>The handling of the following two registers are added - >>DAWR1 (0x0bd, 189) - Data Address Watchpoint 1 >>DAWRX1 (0x0b5, 181) - Data Address

[PATCH] ppc/pnv: Add PowerPC Special Purpose Registers (SPRs):

The handling of the following SPRs are added - ITV1 (0x375, 885) - noop (not in Power10 ISA) SIER2 (0x2f0, 752) - Sampled Instruction Event Register 2 SIER2 (0x2f1, 753) - Sampled Instruction Event Register 3 MMCR3 (0x2f2, 754) - Performance Monitor Mode

[PATCH] ppc/pnv: Add PowerPC Special Purpose Registers

The handling of the following two registers are added - DAWR1 (0x0bd, 189) - Data Address Watchpoint 1 DAWRX1 (0x0b5, 181) - Data Address Watchpoint Extension 1 Signed-off-by: dan tan --- target/ppc/cpu.c | 51

Re: [PATCH] ppc/pnv: Add PowerPC Special Purpose Registers (SPRs):

On Thu Jan 18, 2024 at 8:34 AM AEST, dan tan wrote: > The handling of the following SPRs are added - > ITV1 (0x375, 885) - noop (not in Power10 ISA) I can't see where this is defined. Not in P10 user manual AFAIKS? > SIER2 (0x2f0, 752) - Sampled Instruction Event Register 2

Re: [PATCH] ppc/pnv: Add PowerPC Special Purpose Registers

On Thu Jan 18, 2024 at 8:34 AM AEST, dan tan wrote: > The handling of the following two registers are added - > DAWR1 (0x0bd, 189) - Data Address Watchpoint 1 > DAWRX1 (0x0b5, 181) - Data Address Watchpoint Extension 1 > > Signed-off-by: dan tan Small nit,