"Ho-Ren (Jack) Chuang" writes:
> On Mon, Mar 4, 2024 at 10:36 PM Huang, Ying wrote:
>>
>> "Ho-Ren (Jack) Chuang" writes:
>>
>> > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote:
>> >>
>> >> "Ho-Ren (Jack) Chuang" writes:
>> >>
>> >> > The memory tiering component in the kernel is
On Mon, Mar 4, 2024 at 10:36 PM Huang, Ying wrote:
>
> "Ho-Ren (Jack) Chuang" writes:
>
> > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote:
> >>
> >> "Ho-Ren (Jack) Chuang" writes:
> >>
> >> > The memory tiering component in the kernel is functionally useless for
> >> > CPUless
"Ho-Ren (Jack) Chuang" writes:
> On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote:
>>
>> "Ho-Ren (Jack) Chuang" writes:
>>
>> > The memory tiering component in the kernel is functionally useless for
>> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
>> > are lumped
On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote:
>
> "Ho-Ren (Jack) Chuang" writes:
>
> > The memory tiering component in the kernel is functionally useless for
> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> > are lumped together in the DRAM tier.
> >
On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote:
>
> "Ho-Ren (Jack) Chuang" writes:
>
> > The memory tiering component in the kernel is functionally useless for
> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the
nodes
> > are lumped together in the DRAM tier.
> >
Jack)
> Chuang ; linux-...@vger.kernel.org; qemu-
> de...@nongnu.org
> Subject: [EXT] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless
> NUMA Nodes
>
> CAUTION: EXTERNAL EMAIL. Do not click links or open attachments unless
> you recognize the sender and were expecti
On Fri, Mar 01, 2024 at 08:22:44AM +, Ho-Ren (Jack) Chuang wrote:
> The memory tiering component in the kernel is functionally useless for
> CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> are lumped together in the DRAM tier.
>
"Ho-Ren (Jack) Chuang" writes:
> The memory tiering component in the kernel is functionally useless for
> CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> are lumped together in the DRAM tier.
>
The memory tiering component in the kernel is functionally useless for
CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
are lumped together in the DRAM tier.
https://lore.kernel.org/linux-mm/ph0pr08mb7955e9f08ccb64f23963b5c3a8...@ph0pr08mb7955.namprd08.prod.outlook.com/T/
