For devices built on top of ct3, we need the init, realize, and exit functions exposed to correctly start up and tear down.
Signed-off-by: Gregory Price <gregory.pr...@memverge.com> --- hw/mem/cxl_type3.c | 6 +++--- include/hw/cxl/cxl_device.h | 4 ++++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 80d596ee10..6e3309dc11 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -950,7 +950,7 @@ static DOEProtocol doe_spdm_prot[] = { { } }; -static void ct3_realize(PCIDevice *pci_dev, Error **errp) +void ct3_realize(PCIDevice *pci_dev, Error **errp) { CXLType3Dev *ct3d = CXL_TYPE3(pci_dev); CXLComponentState *cxl_cstate = &ct3d->cxl_cstate; @@ -1054,7 +1054,7 @@ err_address_space_free: return; } -static void ct3_exit(PCIDevice *pci_dev) +void ct3_exit(PCIDevice *pci_dev) { CXLType3Dev *ct3d = CXL_TYPE3(pci_dev); CXLComponentState *cxl_cstate = &ct3d->cxl_cstate; @@ -1285,7 +1285,7 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data, return address_space_write(as, dpa_offset, attrs, &data, size); } -static void ct3d_reset(DeviceState *dev) +void ct3d_reset(DeviceState *dev) { CXLType3Dev *ct3d = CXL_TYPE3(dev); uint32_t *reg_state = ct3d->cxl_cstate.crb.cache_mem_registers; diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index e824c5ade8..9c37a54699 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -524,6 +524,10 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_addr, uint64_t *data, MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data, unsigned size, MemTxAttrs attrs); +void ct3_realize(PCIDevice *pci_dev, Error **errp); +void ct3_exit(PCIDevice *pci_dev); +void ct3d_reset(DeviceState *d); + uint64_t cxl_device_get_timestamp(CXLDeviceState *cxlds); void cxl_event_init(CXLDeviceState *cxlds, int start_msg_num); -- 2.39.1