Re: [Qemu-devel] [PATCH 09/25] spapr: introduce handlers for XIVE interrupt sources

2017-12-02 Thread Benjamin Herrenschmidt
On Tue, 2017-11-28 at 18:18 +, Cédric Le Goater wrote: > AFAICT, it doesn't. LSI events are configured as the other XIVE interrupts. > The level is converted in the P bit and the Q bit should always be zero. > So I should be able to simplify the proposed model which still is mimicking > XICS

Re: [Qemu-devel] [PATCH 09/25] spapr: introduce handlers for XIVE interrupt sources

2017-11-28 Thread Cédric Le Goater
On 11/28/2017 05:45 AM, David Gibson wrote: > On Thu, Nov 23, 2017 at 02:29:39PM +0100, Cédric Le Goater wrote: >> These are very similar to the XICS handlers in a simpler form. They make >> use of a status array for the LSI interrupts. The spapr_xive_irq() routine >> in charge of triggering the

Re: [Qemu-devel] [PATCH 09/25] spapr: introduce handlers for XIVE interrupt sources

2017-11-28 Thread David Gibson
On Thu, Nov 23, 2017 at 02:29:39PM +0100, Cédric Le Goater wrote: > These are very similar to the XICS handlers in a simpler form. They make > use of a status array for the LSI interrupts. The spapr_xive_irq() routine > in charge of triggering the CPU interrupt line will be filled later on. > >

[Qemu-devel] [PATCH 09/25] spapr: introduce handlers for XIVE interrupt sources

2017-11-23 Thread Cédric Le Goater
These are very similar to the XICS handlers in a simpler form. They make use of a status array for the LSI interrupts. The spapr_xive_irq() routine in charge of triggering the CPU interrupt line will be filled later on. Signed-off-by: Cédric Le Goater --- hw/intc/spapr_xive.c