Re: [RFC PATCH 1/3] target/riscv: change RISCV_EXCP_SEMIHOST exception number

2024-04-22 Thread Clément Léger
On 22/04/2024 05:25, Alistair Francis wrote: > On Thu, Apr 18, 2024 at 11:40 PM Clément Léger wrote: >> >> The double trap specification defines the double trap exception number >> to be 16 which is actually used by the internal semihosting one. Change >> it to some other value. >> >>

Re: [RFC PATCH 1/3] target/riscv: change RISCV_EXCP_SEMIHOST exception number

2024-04-21 Thread Alistair Francis
On Thu, Apr 18, 2024 at 11:40 PM Clément Léger wrote: > > The double trap specification defines the double trap exception number > to be 16 which is actually used by the internal semihosting one. Change > it to some other value. > > Signed-off-by: Clément Léger Reviewed-by: Alistair Francis

[RFC PATCH 1/3] target/riscv: change RISCV_EXCP_SEMIHOST exception number

2024-04-18 Thread Clément Léger
The double trap specification defines the double trap exception number to be 16 which is actually used by the internal semihosting one. Change it to some other value. Signed-off-by: Clément Léger --- target/riscv/cpu_bits.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git