Re: [RFC PATCH v2 04/13] hw/arm/smmuv3: Translate CD and TT using stage-2 table

2024-04-19 Thread Mostafa Saleh
Hi Eric, On Thu, Apr 18, 2024 at 02:51:59PM +0200, Eric Auger wrote: > Hi Mostafa, > > On 4/8/24 16:08, Mostafa Saleh wrote: > > According to the user manual (ARM IHI 0070 F.b), > s/user manual/ARM SMMU architecture specification > > In "5.2 Stream Table Entry": > > [51:6] S1ContextPtr > > If

Re: [RFC PATCH v2 04/13] hw/arm/smmuv3: Translate CD and TT using stage-2 table

2024-04-18 Thread Eric Auger
Hi Mostafa, On 4/8/24 16:08, Mostafa Saleh wrote: > According to the user manual (ARM IHI 0070 F.b), s/user manual/ARM SMMU architecture specification > In "5.2 Stream Table Entry": > [51:6] S1ContextPtr > If Config[1] == 1 (stage 2 enabled), this pointer is an IPA translated by > stage 2 and

[RFC PATCH v2 04/13] hw/arm/smmuv3: Translate CD and TT using stage-2 table

2024-04-08 Thread Mostafa Saleh
According to the user manual (ARM IHI 0070 F.b), In "5.2 Stream Table Entry": [51:6] S1ContextPtr If Config[1] == 1 (stage 2 enabled), this pointer is an IPA translated by stage 2 and the programmed value must be within the range of the IAS. In "5.4.1 CD notes": The translation table walks