Re: [RFC PATCH v2 3/3] hw/intc: Make RISC-V ACLINT mtime MMIO register writable

On Thu, Feb 10, 2022 at 4:22 PM wrote: > > From: Frank Chang > > RISC-V privilege spec defines that mtime is exposed as a memory-mapped > machine-mode read-write register. However, as QEMU uses host monotonic > timer as timer source, this makes mtime to be read-only in RISC-V > ACLINT. > > This

[RFC PATCH v2 3/3] hw/intc: Make RISC-V ACLINT mtime MMIO register writable

From: Frank Chang RISC-V privilege spec defines that mtime is exposed as a memory-mapped machine-mode read-write register. However, as QEMU uses host monotonic timer as timer source, this makes mtime to be read-only in RISC-V ACLINT. This patch makes mtime to be writable by recording the time