On Tue, Feb 21, 2023 at 7:28 AM Philippe Mathieu-Daudé
wrote:
> Hi Edgar,
>
> The Xilinx Virtex ML507 model uses 2 different interrupt controllers:
> - Universal Interrupt Controller
> - Xilinx OPB Interrupt Controller
> Both are connected to the same CPU IRQ line, IRQ#3 (PPC40x_INPUT_CINT):
>
>
Hi Edgar,
The Xilinx Virtex ML507 model uses 2 different interrupt controllers:
- Universal Interrupt Controller
- Xilinx OPB Interrupt Controller
Both are connected to the same CPU IRQ line, IRQ#3 (PPC40x_INPUT_CINT):
108 uicdev = qdev_new(TYPE_PPC_UIC);
109
