From: Lakshmi Bai Raja Subramanian
fdt_load_addr is getting overflowed when there is no DRAM at lower 32 bit
address space.
To support pure 64-bit DRAM address, fdt_load_addr variable's data type is
changed to uint64_t
instead of uint32_t.
Signed-off-by: Lakshmi Bai Raja Subramanian
---
We need to hide some unwanted PCI/PCIe capabilities for passed through
devices.
Normally we do this by marking the capability register group
as XEN_PT_GRP_TYPE_HARDWIRED which exclude this capability from the
capability list and returns zeroes on attempts to read capability body.
Skipping the
The patch provides Advanced Error Reporting PCIe Extended Capability
description structure and corresponding capability sizing function.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
hw/xen/xen_pt_config_init.c | 72 +
1 file changed, 72
The primary difference in PCI device IRQ management between Xen HVM and
QEMU is that Xen PCI IRQs are "device-centric" while QEMU PCI IRQs are
"chipset-centric". Namely, Xen uses PCI device BDF and INTx as coordinates
to assert IRQ while QEMU finds out to which chipset PIRQ the IRQ is routed
---
hw/acpi/ich9.c| 22 +-
hw/acpi/pcihp.c |6 +-
hw/core/machine.c | 19 +
hw/i386/pc_piix.c |3 +-
hw/i386/pc_q35.c | 39 +-
hw/i386/xen/xen-hvm.c |7 +-
hw/i386/xen/xen_platform.c| 19 +-
Add few more PCIe Extended Capabilities entries to the
xen_pt_emu_reg_grps[] array along with their corresponding *_size_init()
functions.
All these capabilities have non-fixed size but their size calculation
is very simple, hence adding them in a single batch.
For every capability register
The patch adds new xen_pt_ext_cap_ptr_reg_init function which is used
to initialize the emulated next pcie extended capability pointer.
Primary mission of this function is to have a method to selectively hide
some extended capabilities from the capability linked list, skipping them
by altering
Resetting pci devices after s3 causes guest freezes, as xen usually
likes to handle resetting devices.
Signed-off-by: Joel Upham
---
hw/acpi/ich9.c| 12
hw/pci-host/q35.c | 3 ++-
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
This will unplug the ahci device when the Xen driver calls for an unplug.
This has been tested to work in linux and Windows guests.
When q35 is detected, we will remove the ahci controller
with the hard disks. In the libxl config, cdrom devices
are put on a seperate ahci controller. This allows
Compared to legacy i440 system, there are certain difficulties while
passing through PCIe devices to guest OSes like Windows 7 and above
on platforms with native support of PCIe bus (in our case Q35). This
problem is not applicable to older OSes like Windows XP -- PCIe
passthrough on such OSes can
This patch introduces 2 new functions,
- xen_host_pci_find_next_ext_cap (actually a reworked
xen_host_pci_find_ext_cap_offset function which is unused)
- xen_host_pci_find_next_cap
These functions allow to search for PCI/PCIe capabilities in a uniform
way. Both functions allow to search either
On 2023/6/20 23:24, Daniel Henrique Barboza wrote:
Commit 7f0bdfb5bfc2 ("target/riscv/cpu.c: remove cfg setup from
riscv_cpu_init()") removed code that was enabling mmu, pmp, ext_ifencei
and ext_icsr from riscv_cpu_init(), the init() function of
TYPE_RISCV_CPU, parent type of all RISC-V CPUss.
Am 20.06.2023 um 16:35 hat Stefan Hajnoczi geschrieben:
> On Wed, Jun 14, 2023 at 10:56:22PM +, Alexander Graf wrote:
> > diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
> > index 39e7f23fab..76b85bb3cb 100644
> > --- a/hw/block/virtio-blk.c
> > +++ b/hw/block/virtio-blk.c
> > @@
Add support for FSMC on high-density STM32F100 devices and enable
mapping of additional memory via the `-m SIZE` command-line option.
FSMC Bank1 can address up to 4x64MB of PSRAM memory at 0x6000.
RCC is needed to enable peripheral clock for FSMC; this commit
implements support for RCC
Add support for FSMC on high-density STM32F100 devices and enable
mapping of additional memory via the `-m SIZE` command-line option.
FSMC Bank1 can address up to 4x64MB of PSRAM memory at 0x6000.
RCC is needed to enable peripheral clock for FSMC; this commit
implements support for RCC
On Tue, Jun 20, 2023 at 09:27:17PM +0200, Laurent Vivier wrote:
> On 6/20/23 16:54, Peter Xu wrote:
> > On Fri, Jun 09, 2023 at 12:49:02AM +0200, Juan Quintela wrote:
> > > It makes no sense that we don't have the same configuration on both sides.
> >
> > I hope Laurent can see this one out of
The following changes since commit 327ec8d6c2a2223b78d311153a471036e474c5c5:
Merge tag 'pull-tcg-20230423' of https://gitlab.com/rth7680/qemu into staging
(2023-04-23 11:20:37 +0100)
are available in the Git repository at:
https://github.com/hdeller/qemu-hppa.git
On Thu, Jun 15, 2023 at 01:26:39PM -0700, Steve Sistare wrote:
> Migration of a guest in the suspended state is broken. The incoming
> migration code automatically tries to wake the guest, which IMO is
> wrong -- the guest should end migration in the same state it started.
> Further, the wakeup
The "perf stat" at the VM side still works even we set "-cpu host,-pmu" in
the QEMU command line. That is, neither "-cpu host,-pmu" nor "-cpu EPYC"
could disable the pmu virtualization in an AMD environment.
We still see below at VM kernel side ...
[0.510611] Performance Events: Fam17h+ core
On Sun, 2023-06-18 at 23:20 +0200, Paolo Bonzini wrote:
> The call to git-submodule.sh done in configure may happen without a
> previous checkout of the roms/SLOF submodule, or even without a
> previous run of the script.
>
> So, handle creating a .git-submodule-status file even in validate
>
On Tue, 20 Jun 2023 at 17:56, Peter Maydell wrote:
>
> $ make -C build/x86 check-tcg
> make: Entering directory
> '/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/build/x86'
> [...]
> TESTmunmap-pthread on arm
> **
> ERROR:../../plugins/core.c:221:qemu_plugin_vcpu_init_hook: assertion
> failed:
Some PCIe capabilities needed to be faked for the xen implementation to work.
This is the situation when we were asked to hide (aka
"hardwire to 0") some PCIe ext capability, but it was located
at offset 0x100 in PCIe config space. In this case we can't
simply exclude it from the linked list of
On Q35 we still need to assign BSEL property to bus(es) for PCI device
add/hotplug to work.
Extend acpi_set_pci_info() function to support Q35 as well. This patch adds new
(trivial)
function find_q35() which returns root PCIBus object on Q35, in a way
similar to what find_i440fx does.
This adds description structures for all fixed-size PCIe Extended
Capabilities.
For every capability register group, only 2 registers are emulated
currently: Capability ID (16 bit) and Next Capability Offset/Version (16
bit). Both needed to implement selective capability hiding. All other
Il mar 20 giu 2023, 19:35 Nina Schoetterl-Glausch ha
scritto:
> > +modules="$modules $m"
> > +grep $m $substat > /dev/null 2>&1 || $GIT submodule status
> $module >> $substat
> > +else
> > +echo "warn: ignoring non-existent submodule $m"
>
> What is
On Tue, Jun 20, 2023 at 07:55:51PM +0530, Ani Sinha wrote:
> This change is cosmetic. A comment is added explaining why we need to check
> for
> the availability of function 0 when we hotplug a device.
>
> CC: m...@redhat.com
> Signed-off-by: Ani Sinha
> ---
> hw/pci/pci.c | 5 +
> 1 file
On Wed, Jun 21, 2023 at 1:25 AM Daniel Henrique Barboza
wrote:
>
> Commit 7f0bdfb5bfc2 ("target/riscv/cpu.c: remove cfg setup from
> riscv_cpu_init()") removed code that was enabling mmu, pmp, ext_ifencei
> and ext_icsr from riscv_cpu_init(), the init() function of
> TYPE_RISCV_CPU, parent type
On Tue, 20 Jun 2023 10:22:40 +0100
Daniel P. Berrangé wrote:
Thanks for your feedback!
> Assuming you have docutils installed, QEMU will build the manual by
> default and print any issues on console during build. You can point
> your browser to $BUILD/docs/manual/system/index.html to see the
Mirrored the init done for piix devices when xen is being used.
This is needed for xen memory to be initialized and used with q35.
Signed-off-by: Joel Upham
---
hw/i386/pc_q35.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc_q35.c
On 6/19/23 06:54, Andrew Jones wrote:
On Tue, Jun 13, 2023 at 05:58:54PM -0300, Daniel Henrique Barboza wrote:
The isa_edata_arr[] is used by riscv_isa_string_ext() to create the
riscv,isa DT attribute. isa_edata_arr[] is kept in sync with the TCG
property vector riscv_cpu_extensions[], i.e.
Hi, this is ... a fairly incomplete series about trying to get iotests
to run out of the configure-time venv. I'm looking for some feedback, so
out to the list it goes.
Primarily, I'm having doubts about these points:
1) I think I need something like "mkvenv install" in the first patch,
but
Whichever python is used to run iotest 297 should be the one used to
actually run the linters.
Signed-off-by: John Snow
---
tests/qemu-iotests/linters.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qemu-iotests/linters.py b/tests/qemu-iotests/linters.py
index
though, ouch: on my machine this takes 3-4 entire seconds to do. I wish
it wasn't so slow, but we can't rely on these packages not having any
dependencies any more.
We could theoretically use a .pth hack when creating the venv to
automatically include this directory as an "installed packages"
qemu.* should be provided by the configure-time venv, now.
Signed-off-by: John Snow
---
tests/qemu-iotests/testenv.py | 4
1 file changed, 4 deletions(-)
diff --git a/tests/qemu-iotests/testenv.py b/tests/qemu-iotests/testenv.py
index 1b095d70f2..6441145701 100644
---
Resolve the build_root before we append more items onto it so that the
environment output is more concise with less parent directory confetti
in it.
Signed-off-by: John Snow
---
tests/qemu-iotests/testenv.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Now that there's a fancy venv set up for us by configure, we should take
care to use it even when check is invoked directly.
./check will now use the pyvenv environment when launching python tests,
which allows those tests to find and access the 'qemu.*' packages
without PYTHONPATH modifications.
From: Vivek Kasireddy
The new parameter named "connector" can be used to assign physical
monitors/connectors to individual GFX VCs such that when the monitor
is connected or hotplugged, the associated GTK window would be
moved to it. If the monitor is disconnected or unplugged, the
associated
A new flag "visible" that specifies visibility status of the gfx console.
The polarity of the flag determines whether the drawing surface should
continuously updated upon scanout flush. The flag is set to 'true' when
the window bound to the VC is in visible state but set to 'false' when
the
Getting guest displays disconnected by setting ui size to 0 when
the VC is set as invisible. When the VC is set as visible again,
the ui size is restored back to its previous size to reconnect
guest displays.
Cc: Gerd Hoffmann
Cc: Daniel P. Berrangé
Cc: Markus Armbruster
Cc: Philippe
From: Vivek Kasireddy
When a detached tab window is closed, the underlying (EGL) context
is destroyed; therefore, disable the scanout which also destroys the
underlying framebuffer (id) and other objects. Also add calls to
make the context current in disable scanout and other missing places.
Remove monitor while a guest frame is still being processed could block
the guest (virtio-gpu) scanout pipe line. It is needed to manually flush
the pipeline to prevent the permanent lockup.
Cc: Gerd Hoffmann
Cc: Daniel P. Berrangé
Cc: Markus Armbruster
Cc: Philippe Mathieu-Daudé
Cc:
The QEMU side calls kvm_get_msrs() to save the pmu registers from the KVM
side to QEMU, and calls kvm_put_msrs() to store the pmu registers back to
the KVM side.
However, only the Intel gp/fixed/global pmu registers are involved. There
is not any implementation for AMD pmu registers. The
This is to rebase the patchset on top of the most recet QEMU.
This patchset is to fix two svm pmu virtualization bugs, x86 only.
version 1:
https://lore.kernel.org/all/20221119122901.2469-1-dongli.zh...@oracle.com/
1. The 1st bug is that "-cpu,-pmu" cannot disable svm pmu virtualization.
To
On 6/20/23 16:54, Peter Xu wrote:
On Fri, Jun 09, 2023 at 12:49:02AM +0200, Juan Quintela wrote:
It makes no sense that we don't have the same configuration on both sides.
I hope Laurent can see this one out of 40s.
I had some luck...
Makes sense to me, but does it mean that the devices
This patch provides basic facilities for PCIe Extended Capabilities and
support for controlled (via s->pcie_enabled_dev flag) access to PCIe
config space (>256).
PCIe Extended Capabilities make use of 16-bit capability ID. Also,
a capability size might exceed 8-bit width. So as the very first
Even if we have some real PCIe device being passed through to a guest,
there are situations when we cannot use its PCIe features, primarily
allowing to access extended (>256) config space.
Basically, we can allow reading PCIe extended config space only if both
the device and emulated system are
Current Xen/QEMU method to control Xen Platform device on i440 is a bit
odd -- enabling/disabling Xen platform device actually modifies the QEMU
emulated machine type, namely xenfv <--> pc.
In order to avoid multiplying machine types, use a new way to control Xen
Platform device for QEMU --
Virtual Channel/MFVC capabilities are relatively useless for emulation
(passing through accesses to them should be enough in most cases) yet they
have hardest format of all PCIe Extended Capabilities, mostly because
VC capability format allows the sparse config space layout with gaps
between the
Unlike other PCIe Extended Capabilities, we currently cannot allow attempts
to use Resizable BAR Capability. Without specifically handling BAR resizing
we're likely end up with corrupted MMIO hole layout if guest OS will
attempt to use this feature. Actually, recent Windows versions started
to
xen_pt_config_init.c reads Device/Port Type and Capability version fields
in many places. Two functions are used for this purpose:
get_capability_version and get_device_type. These functions perform PCI
conf space reading every time they're called. Another bad thing is that
these functions know
This patch allows to use ACPI PCI hotplug functionality for Xen on Q35.
All added code depends on xen_enabled(), so no functionality change for
non-Xen usage.
We need to call the acpi_set_pci_info function from ich9_pm_init as well,
so it was made globally visible again (as it was before).
The patch provides Vendor-specific PCIe Extended Capability description
structure and corresponding sizing function. In this particular case the
size of the Vendor capability is available in the VSEC Length field.
Signed-off-by: Alexey Gerasimenko
Signed-off-by: Joel Upham
---
There are two small issues in PCIEXBAR address mask handling:
- wrong bit positions for address mask bits (see PCIEXBAR description
in Q35 datasheet)
- incorrect usage of 64ADR_MASK
Due to this, attempting to write a valid PCIEXBAR address may cause it to
shift to another address, causing
On xen we need to be able to have hotpluggable root devices,
even on Q35 at the moment. Having this check disables PT of
devices, so lets turn it off for now.
Signed-off-by: Joel Upham
---
softmmu/qdev-monitor.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
These are the Qemu changes needed to support the q35 chipset for xen
I based the patches from 2017 found on the mailing list here:
https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg01176.html
I have been using a version of these patches on Xen 4.16 with Qemu
version 4.1 for over 6
Am 14. Juni 2023 22:57:34 UTC schrieb Alexander Graf :
>Apple defines a new "vmapple" machine type as part of its proprietary
>macOS Virtualization.Framework vmm. This machine type is similar to the
>virt one, but with subtle differences in base devices, a few special
>vmapple device additions
(This series replace two patch series,
[PATCH v2 0/6] ui/gtk: Add a new parameter to assign connectors/monitors (v2)
https://lists.gnu.org/archive/html/qemu-devel/2022-11/msg03098.html and
[RFC PATCH 0/3] ui/gtk: no render event when vc is invisible
Skip any drawing activities if VC is invisible because it can't be finished.
Cc: Gerd Hoffmann
Cc: Daniel P. Berrangé
Cc: Markus Armbruster
Cc: Philippe Mathieu-Daudé
Cc: Marc-André Lureau
Cc: Vivek Kasireddy
Signed-off-by: Dongwon Kim
---
ui/gtk-egl.c | 4
ui/gtk-gl-area.c | 4
From: Vivek Kasireddy
Pull the code that creates a new window associated with a notebook
tab into a separate function. This new function can be useful not
just when user wants to detach a tab but also in the future when
a new window creation is needed in other scenarios.
Cc: Gerd Hoffmann
Cc:
Add a callback for window-state-event that resets vc->gfx.visible when
associated window is minimized or restored.
In case of virtio-gpu blob scanout, if the window is minimized before
the rendering event for the last guest scanout frame is finished, it cancels
the draw submission and unblocks
Rendering of scanout could be skipped if ctx/surface/image don't
exist due to an asynchronous event such as monitors being disconnected.
Cc: Gerd Hoffmann
Cc: Daniel P. Berrangé
Cc: Markus Armbruster
Cc: Philippe Mathieu-Daudé
Cc: Marc-André Lureau
Cc: Vivek Kasireddy
Signed-off-by: Dongwon
From: David Woodhouse
Coverity was unhappy (CID 1508359) because we didn't check the return of
init_walk_op() in transaction_commit(), despite doing so at every other
call site.
Strictly speaking, this is a false positive since it can never fail. It
only fails for invalid user input
This memory is not correctly aligned and cannot be registered
by vDPA and VFIO.
An error is reported for vhost-vdpa case:
qemu-kvm: vhost_vdpa_listener_region_add received unaligned region
To make it ignored by VFIO and vDPA devices, mark it as RAM_PROTECTED.
The RAM_PROTECTED flag has been
An error is reported for vhost-vdpa case:
qemu-kvm: vhost_vdpa_listener_region_add received unaligned region
Marc-André has proposed a fix to this problem by skipping
the memory region owned by the TPM CRB but it seems more generic
to skip not DMA-able memory.
We have a memory flag for that,
>-Original Message-
>From: Joao Martins
>Sent: Tuesday, June 20, 2023 5:28 PM
>To: Duan, Zhenzhong ; Avihai Horon
>; qemu-devel@nongnu.org
>Cc: alex.william...@redhat.com; c...@redhat.com; Peng, Chao P
>
>Subject: Re: [PATCH v2] vfio/migration: Refactor and fix print of "Migration
On Mon, 5 Jun 2023 at 21:23, Richard Henderson
wrote:
>
> If CONFIG_USER_ONLY is ok generically, so is CONFIG_SOFTMMU,
> because they are exactly opposite.
This isn't quite right. CONFIG_USER_ONLY is theoretically
something we should poison, because it's unsafe in the general
case to use it in
On 6/15/2023 10:50 AM, Fabiano Rosas wrote:
> Peter Xu writes:
>
>> On Wed, Jun 14, 2023 at 02:59:54PM -0300, Fabiano Rosas wrote:
>>> In this message Daniel mentions virDomainSnapshotXXX which would benefit
>>> from using the same "file" migration, but being done live:
>>>
>>>
This reverts commit d7ee93e24359703debf4137f4cc632563aa4e8d1.
That commit tries to make a field in the CPUState struct not be
present when CONFIG_USER_ONLY is set. Unfortunately, you can't
conditionally omit fields in structs like this based on ifdefs that
are set per-target. If you try it,
On Tue, 2023-06-20 at 13:19 +0100, Peter Maydell wrote:
> On Fri, 2 Jun 2023 at 18:06, Peter Maydell
> wrote:
> >
> > On Tue, 2 May 2023 at 18:08, Peter Maydell
> > wrote:
> > >
> > > On Tue, 7 Mar 2023 at 18:27, David Woodhouse
> > > wrote:
> > > >
> > > > From: David Woodhouse
>
> > >
Hello,
I just came across this discussion regarding s3/s4 support in virtio-gpu
driver and QEMU.
We saw similar problem a while ago (QEMU deletes all objects upon
suspension) and
came up with an experimental solution that is basically making
virtio-gpu driver to do object creation
for
On Tue, Jun 20, 2023 at 02:36:58PM -0400, Steven Sistare wrote:
> On 6/15/2023 10:50 AM, Fabiano Rosas wrote:
> > Peter Xu writes:
> >
> >> On Wed, Jun 14, 2023 at 02:59:54PM -0300, Fabiano Rosas wrote:
> >>> In this message Daniel mentions virDomainSnapshotXXX which would benefit
> >>> from
Commit 56918a126a ("memory: Add RAM_PROTECTED flag to skip IOMMU mappings")
has introduced the RAM_PROTECTED flag to denote "protected" memory.
This flags is only used with qemu_ram_alloc_from_fd() for now.
To be able to register memory region with this flag, define
On 19.06.2023 17:58, David Hildenbrand wrote:
[...]
Sorry for the late reply!
Still trying to make up my mind what the right way forward with this is.
This usage is still problematic I suspect (well, and a layer violation
regarding the machine). The machine hotplug handler is supposed to
This is just so I can do "mkvenv install './python'" or "mkvenv install
file:python" to install the in-tree packages to pyvenv.
It probably isn't quite appropriate to bypass do_ensure in its entirety
like this because we miss out on a lot of error handling, but as a quick
proof of concept it
On 6/20/23 20:01, Peter Maydell wrote:
On Mon, 5 Jun 2023 at 21:23, Richard Henderson
wrote:
If CONFIG_USER_ONLY is ok generically, so is CONFIG_SOFTMMU,
because they are exactly opposite.
This isn't quite right. CONFIG_USER_ONLY is theoretically
something we should poison, because it's
On Wed Jun 21, 2023 at 2:54 AM AEST, Nicholas Piggin wrote:
> On Wed Jun 21, 2023 at 12:26 AM AEST, BALATON Zoltan wrote:
> > On Tue, 20 Jun 2023, Nicholas Piggin wrote:
> > > powerpc ifetch endianness depends on MSR[LE] so it has to byteswap
> > > after cpu_ldl_code(). This corrects DSISR bits in
On 2023-06-21 01:24, Leif wrote:
> Leif, do you think we should bump the minor version here?
I think that makes sense, yes.
/
Leif
Thanks for everyone's guidance.
There is a new confusion: Which minor version should I bump to (2 or 3) ?
As I found that Marcin’s latest patch (add ITS
Il mar 20 giu 2023, 18:24 Richard Henderson
ha scritto:
> On 6/20/23 17:16, Paolo Bonzini wrote:
> > TCG implements RDSEED, and in fact uses qcrypto_random_bytes which is
> > secure enough to match hardware behavior. Expose it to guests.
> >
> > Reviewed-by: Richard Henderson
> >
This change is cosmetic. A comment is added explaining why we need to check for
the availability of function 0 when we hotplug a device.
CC: m...@redhat.com
Signed-off-by: Ani Sinha
---
hw/pci/pci.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
changelog:
v2: moved comment
On 6/20/23 19:57, Peter Maydell wrote:
This reverts commit d7ee93e24359703debf4137f4cc632563aa4e8d1.
That commit tries to make a field in the CPUState struct not be
present when CONFIG_USER_ONLY is set. Unfortunately, you can't
conditionally omit fields in structs like this based on ifdefs
Dongwon Kim writes:
> From: Vivek Kasireddy
>
> The new parameter named "connector" can be used to assign physical
> monitors/connectors to individual GFX VCs such that when the monitor
> is connected or hotplugged, the associated GTK window would be
> moved to it. If the monitor is
Hi,
I hope this email finds you well. I am reaching out to seek guidance and
assistance regarding a project I am working on involving the addition of
I2C support in QEMU for the Raspberry Pi, specifically targeting the
BCM2835 peripherals.
I have been studying the BCM2835 datasheet to
> On 20-Jun-2023, at 4:13 PM, Michael S. Tsirkin wrote:
>
> On Tue, Jun 20, 2023 at 12:48:05PM +0530, Ani Sinha wrote:
>> When a device has an upstream PCIE port, we can only use slot 0.
>
> Actually, it's when device is plugged into a PCIE port.
> So maybe:
>
> PCI Express ports only
On Wed, Jun 21, 2023 at 08:09:55AM +0530, Ani Sinha wrote:
>
>
> > On 20-Jun-2023, at 4:13 PM, Michael S. Tsirkin wrote:
> >
> > On Tue, Jun 20, 2023 at 12:48:05PM +0530, Ani Sinha wrote:
> >> When a device has an upstream PCIE port, we can only use slot 0.
> >
> > Actually, it's when device
When the Timer Control and Timer Status registers are modified, avoid
calling the KVM backend when not available
Signed-off-by: Cédric Le Goater
---
target/ppc/kvm.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index
On 6/20/23 07:29, Philippe Mathieu-Daudé wrote:
On 19/6/23 16:02, Richard Henderson wrote:
One cannot test for feature aa32_simd_r32 without first
testing if AArch32 mode is supported at all. This leads to
qemu-system-aarch64: ARM CPUs must have both VFP-D32 and Neon or neither
for Apple M1
On 6/8/23 11:07, ~foxes wrote:
From: Foxes Hung
Signed-off-by: Foxes Hung
---
semihosting/syscalls.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/semihosting/syscalls.c b/semihosting/syscalls.c
index 68899ebb1c..1a5d39da01 100644
--- a/semihosting/syscalls.c
+++
Although the PPC target only supports the TCG and KVM
accelerators, QEMU supports more. We can no assume that
'!kvm == tcg', so test for the correct accelerator. This
also eases code review, because here we don't care about
KVM, we really want to test for TCG.
Signed-off-by: Philippe
On 6/20/23 09:48, Philippe Mathieu-Daudé wrote:
> Although the PPC target only supports the TCG and KVM
> accelerators, QEMU supports more. We can no assume that
> '!kvm == tcg', so test for the correct accelerator. This
> also eases code review, because here we don't care about
> KVM, we really
From: Philippe Mathieu-Daudé
We use the CONFIG_USER_ONLY key to describe user emulation,
and the CONFIG_SOFTMMU key to describe system emulation. Alias
it as 'CONFIG_SYSTEM_ONLY' for parity with user emulation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
Nick has great knowledge of the PowerPC CPUs, software and hardware.
Add him as a reviewer on CPU TCG modeling.
Cc: Nicholas Piggin
Signed-off-by: Cédric Le Goater
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e6f3dade2230..90fb83c4cb58
Hello,
Please welcome new reviewers on baremetal POWER systems !
Follow cleanups to report an error when KVM is used on non-KVM
machines.
Thanks,
C.
Cédric Le Goater (9):
MAINTAINERS: Add reviewers for PowerNV baremetal emulation
MAINTAINERS: Add reviewer for PowerPC TCG CPUs
Fred discusses frequently with the IBM HW designers, he is fluent in
XIVE logic, add him as a reviewer.
Cc: Frédéric Barrat
Signed-off-by: Cédric Le Goater
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 90fb83c4cb58..2e8c715eaca4 100644
---
Fred and Nick have been hacking baremetal POWER systems (OPAL) for
many years. They use and modify the QEMU models regularly. Add them as
PowerNV reviewers.
Cc: Frédéric Barrat
Cc: Nicholas Piggin
Signed-off-by: Cédric Le Goater
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff
On 6/19/23 19:34, Alex Bennée wrote:
Richard Henderson writes:
On 6/12/23 04:50, Richard Henderson wrote:
On 6/11/23 02:14, Alex Bennée wrote:
Richard Henderson writes:
This is a perfectly natural occurrence for x86 "rep movb",
where the "rep" prefix forms a counted loop of the one
On 6/20/23 13:18, Philippe Mathieu-Daudé wrote:
Although the PPC target only supports the TCG and KVM
accelerators, QEMU supports more. We can no assume that
'!kvm == tcg', so test for the correct accelerator. This
also eases code review, because here we don't care about
KVM, we really want
From: Philippe Mathieu-Daudé
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Invert some if() ladders for clarity.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
Otherwise we hit the default assert not reached.
Handle it as MO_ATOM_NONE, because of size and misalignment.
We already handle this correctly in do_ld16_beN.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Philippe Mathieu-Daudé
Since cpu_mmu_index() is well-defined for user-only,
we can remove the surrounding #ifdef'ry entirely.
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20230613133347.82210-2-phi...@linaro.org>
From: Philippe Mathieu-Daudé
We want to check the softmmu tlb availability, not
if we are targetting system emulation. Besides, this
code could be used by user emulation in the future.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
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