Re: [PATCH] SMBIOS: fix long lines

> On 13-Mar-2024, at 03:59, Michael S. Tsirkin wrote: > > Break up long lines to fit under 80/90 char limit. > > Signed-off-by: Michael S. Tsirkin Reviewed-by: Ani Sinha > --- > hw/smbios/smbios.c | 9 ++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git

Re: [PATCH] pcie: Support PCIe Gen5/Gen6 link speeds

"Michael S. Tsirkin" writes: > On Thu, Feb 15, 2024 at 02:23:26AM +0100, Lukas Stockner wrote: >> diff --git a/qapi/common.json b/qapi/common.json >> index f1bb841951..867a9ad9b0 100644 >> --- a/qapi/common.json >> +++ b/qapi/common.json >> @@ -107,10 +107,14 @@ >> # >> # @16: 16.0GT/s >> #

Re: [PATCH v2 4/5] plugins: conditional callbacks

On 3/13/24 01:25, Richard Henderson wrote: On 3/11/24 21:54, Pierrick Bouvier wrote: +/** + * enum qemu_plugin_cond - condition to enable callback + * + * @QEMU_PLUGIN_COND_NEVER: false + * @QEMU_PLUGIN_COND_ALWAYS: true + * @QEMU_PLUGIN_COND_EQ: is equal? + * @QEMU_PLUGIN_COND_NE: is not

[PATCH 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration

The timebase-frequency of guest OS should be the same with host machine. The timebase-frequency value in DTS should be got from hypervisor when using KVM acceleration. Signed-off-by: Yong-Xuan Wang --- hw/riscv/virt.c | 11 +-- target/riscv/kvm/kvm-cpu.c | 9 +

[PATCH v2 08/16] esp.c: introduce esp_fifo_push_buf() function for pushing to the FIFO

Instead of pushing data into the FIFO directly with fifo8_push_all(), add a new esp_fifo_push_buf() function and use it accordingly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c

[PATCH v2 00/16] [for-9.0] esp: avoid explicit setting of DRQ within ESP state machine

[MCA: Since v1 I've received a few reports of FIFO assert()s being triggered and a cmdfifo buffer overflow discovered by fuzzing the updated ESP code. The updating of all FIFO push/pop operations to use the esp_fifo_*() functions in this series provides protection against this, and in

[PATCH v2 05/16] esp.c: change esp_fifo_pop() to take ESPState

Now that all users of esp_fifo_pop() operate on the main FIFO there is no need to pass the FIFO explicitly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index b898e43e2b..0e42ff50e7

[PATCH v2 11/16] esp.c: don't overflow cmdfifo if cmdfifo_cdb_offset >= ESP_CMDFIFO_SZ

If cmdfifo contains ESP_CMDFIFO_SZ bytes and cmdfifo_cdb_offset is also ESP_CMDFIFO_SZ then if the guest issues an ESP command sequence that invokes esp_cdb_length(), scsi_cdb_length() can read one byte beyond the end of the FIFO buffer. Add an extra length check to esp_cdb_length() to prevent

[PATCH v2 13/16] esp.c: introduce esp_update_drq() and update esp_fifo_{push, pop}_buf() to use it

This new function sets the DRQ line correctly according to the current transfer mode, direction and FIFO contents. Update esp_fifo_push_buf() and esp_fifo_pop_buf() to use it so that DRQ is always set correctly when reading/writing multiple bytes to/from the FIFO. Signed-off-by: Mark

[PATCH v2 14/16] esp.c: update esp_fifo_{push, pop}() to call esp_update_drq()

This ensures that the DRQ line is always set correctly when reading/writing single bytes to/from the FIFO. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index

Re: [PATCH v4 3/3] target/riscv: Enable sdtrig for Ventana's Veyron CPUs

On Wed, Mar 13, 2024 at 11:39:31AM +0530, Himanshu Chauhan wrote: > Ventana's Veyron CPUs support sdtrig ISA extension. By default, enable > the sdtrig extension and disable the debug property for these CPUs. > > Signed-off-by: Himanshu Chauhan > --- > target/riscv/cpu.c | 2 ++ > 1 file

Re: [PULL 0/8] Net patches

On Wed, Mar 13, 2024 at 1:56 AM Michael Tokarev wrote: > > 12.03.2024 14:36, Jason Wang wrote: > ... > > > > Andrew Melnychenko (5): > >ebpf: Added eBPF map update through mmap. > >ebpf: Added eBPF initialization by

Re: [PATCH v3 14/20] qapi/schema: Don't initialize "members" with `None`

John Snow writes: > On Tue, Feb 20, 2024 at 10:03 AM Markus Armbruster wrote: >> >> John Snow writes: >> >> > Declare, but don't initialize the "members" field with type >> > List[QAPISchemaObjectTypeMember]. >> > >> > This simplifies the typing from what would otherwise be >> >

Re: [PATCH v4 11/24] net: Use virtual time for net announce

On Tue Mar 12, 2024 at 9:12 PM AEST, Pavel Dovgalyuk wrote: > On 12.03.2024 14:05, Nicholas Piggin wrote: > > On Tue Mar 12, 2024 at 7:09 PM AEST, Pavel Dovgalyuk wrote: > >> This won't work, as needed. Announce timer can't be enabled, because > >> it is set in post_load function. Therefore

Re: [PATCH v2 2/2] kvm: add support for guest physical bits

On Wed, Mar 13, 2024 at 02:39:32PM +0800, Tao Su wrote: > On Tue, Mar 05, 2024 at 11:52:33AM +0100, Gerd Hoffmann wrote: > > Query kvm for supported guest physical address bits, in cpuid > > function 8008, eax[23:16]. Usually this is identical to host > > physical address bits. With NPT or

Re: [PATCH 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration

On Wed, Mar 13, 2024 at 04:13:57PM +0800, Yong-Xuan Wang wrote: > The timebase-frequency of guest OS should be the same with host > machine. The timebase-frequency value in DTS should be got from > hypervisor when using KVM acceleration. > > Signed-off-by: Yong-Xuan Wang > --- > hw/riscv/virt.c

[PATCH] hw/intc/loongarch_extioi: Fix interrupt routing update

Interrupt number in loop sentence should be base irq plus loop index, it is missing on checking whether the irq is pending. Fixes: 428a6ef4396 ("Add vmstate post_load support") Signed-off-by: Bibo Mao --- hw/intc/loongarch_extioi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [PATCH] qapi: document PCIe Gen5/Gen6 speeds since 9.0

On 13/3/24 07:50, Michael S. Tsirkin wrote: Document that PCIe Gen5/Gen6 speeds are only in QAPI since 9.0 - the rest is since 4.0. Cc: Lukas Stockner Cc: Marcel Apfelbaum Fixes: c08da86dc4 ("pcie: Support PCIe Gen5/Gen6 link speeds") Suggested-by: Markus Armbruster Signed-off-by: Michael S.

[PATCH v4 1/3] target/riscv: Enable mcontrol6 triggers only when sdtrig is selected

The mcontrol6 triggers are not defined in debug specification v0.13 These triggers are defined in sdtrig ISA extension. This patch: * Adds ext_sdtrig capability which is used to select mcontrol6 triggers * Keeps the debug property. All triggers that are defined in v0.13 are exposed.

[PATCH v4 0/3] Introduce sdtrig ISA extension

All the CPUs may or may not implement the debug triggers. Some CPUs may implement only debug specification v0.13 and not sdtrig ISA extension. This patchset, adds sdtrig ISA as an extension which can be turned on or off by sdtrig= option. It is turned off by default. When debug is true and

[PATCH v4 3/3] target/riscv: Enable sdtrig for Ventana's Veyron CPUs

Ventana's Veyron CPUs support sdtrig ISA extension. By default, enable the sdtrig extension and disable the debug property for these CPUs. Signed-off-by: Himanshu Chauhan --- target/riscv/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index

[PATCH v4 2/3] target/riscv: Expose sdtrig ISA extension

This patch adds "sdtrig" in the ISA string when sdtrig extension is enabled. The sdtrig extension may or may not be implemented in a system. Therefore, the -cpu rv64,sdtrig= option can be used to dynamically turn sdtrig extension on or off. Since, the sdtrig ISA extension is a superset

[PATCH] qapi: document PCIe Gen5/Gen6 speeds since 9.0

Document that PCIe Gen5/Gen6 speeds are only in QAPI since 9.0 - the rest is since 4.0. Cc: Lukas Stockner Cc: Marcel Apfelbaum Fixes: c08da86dc4 ("pcie: Support PCIe Gen5/Gen6 link speeds") Suggested-by: Markus Armbruster Signed-off-by: Michael S. Tsirkin --- qapi/common.json | 4 ++-- 1

Re: [PATCH v4 0/5] Virtio dmabuf improvements

On Tue, Mar 12, 2024 at 7:23 PM Michael S. Tsirkin wrote: > On Mon, Feb 19, 2024 at 03:34:18PM +0100, Albert Esteve wrote: > > v1: https://www.mail-archive.com/qemu-devel@nongnu.org/msg1005257.html > > v2: https://www.mail-archive.com/qemu-devel@nongnu.org/msg1014615.html > > v3: Virtio dmabuf

[PATCH v2 12/16] esp.c: move esp_set_phase() and esp_get_phase() towards the beginning of the file

This allows these functions to be used earlier in the file without needing a separate forward declaration. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 36 ++-- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c

[PATCH v2 16/16] esp.c: remove explicit setting of DRQ within ESP state machine

Now the esp_update_drq() is called for all reads/writes to the FIFO, there is no need to manually raise and lower the DRQ signal. Signed-off-by: Mark Cave-Ayland Resolves: https://gitlab.com/qemu-project/qemu/-/issues/611 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1831 ---

[PATCH v2 15/16] esp.c: ensure esp_pdma_write() always calls esp_fifo_push()

This ensures that esp_update_drq() is called via esp_fifo_push() whenever the host uses PDMA to transfer data to a SCSI device. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index

Re: [PATCH] target/i386: Add new CPU model SierraForest

On Fri, Mar 08, 2024 at 05:36:52PM +0100, Igor Mammedov wrote: > On Wed, 6 Dec 2023 21:19:23 +0800 > Tao Su wrote: > > > SierraForest is Intel's first generation E-core based Xeon server > > processor, which will be released in the first half of 2024. > > > > SierraForest mainly adds the

Re: [PATCH v3 00/20] Workaround Windows failing to find 64bit SMBIOS entry point with SeaBIOS

On Wed, Mar 13, 2024 at 09:49:39AM +0100, Igor Mammedov wrote: > On Tue, 12 Mar 2024 13:31:39 -0400 > "Michael S. Tsirkin" wrote: > > > On Tue, Mar 12, 2024 at 05:10:30PM +0100, Igor Mammedov wrote: > > > Changelog: > > > v3: > > >* whitespace missed by checkpatch > > >* fix idndent in

Re: [PATCH v4 2/3] target/riscv: Expose sdtrig ISA extension

On Wed, Mar 13, 2024 at 11:39:30AM +0530, Himanshu Chauhan wrote: > This patch adds "sdtrig" in the ISA string when sdtrig extension is enabled. > The sdtrig extension may or may not be implemented in a system. Therefore, the >-cpu rv64,sdtrig= > option can be used to dynamically turn

[PATCH 2/3] tests/avocado: drop virtio-rng from sbsa-ref tests

sbsa-ref is supposed to emulate real hardware so virtio-rng-pci does not fit here Signed-off-by: Marcin Juszkiewicz --- tests/avocado/machine_aarch64_sbsaref.py | 8 1 file changed, 8 deletions(-) diff --git a/tests/avocado/machine_aarch64_sbsaref.py

[PATCH 1/3] tests/avocado: update sbsa-ref firmware

TF-A code) fs0_xz_url = ( -"https://fileserver.linaro.org/s/rE43RJyTfxPtBkc/; -"download/SBSA_FLASH0.fd.xz" +"https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/; +"20240313-116475/edk2/SBSA_FLASH0.fd.xz" ) -

Re: [PULL 34/68] hw/display/macfb: Fix missing ERRP_GUARD() in macfb_nubus_realize()

On 13/3/24 03:23, Zhao Liu wrote: Hi Michael, Thanks a lot and aslo this one, I forgot to update the status :/, this patch has been merged (commit d470fd6acd60, "hw/display/macfb: Fix missing ERRP_GUARD() in macfb_nubus_realize()"). Normally git should cope with this; if so, no need to repost

Re: [PATCH 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration

On 13/3/24 09:56, Andrew Jones wrote: On Wed, Mar 13, 2024 at 04:13:57PM +0800, Yong-Xuan Wang wrote: The timebase-frequency of guest OS should be the same with host machine. The timebase-frequency value in DTS should be got from hypervisor when using KVM acceleration. Signed-off-by: Yong-Xuan

[PATCH repost] SMBIOS: fix long lines

Break up long lines to fit under 80/90 char limit. Fixes: 04f143d828 ("Implement SMBIOS type 9 v2.6") Fixes: 735eee07d1 ("Implement base of SMBIOS type 9 descriptor.") Cc: "Felix Wu" Cc: Nabih Estefan Reviewed-by: Ani Sinha Signed-off-by: Michael S. Tsirkin --- hw/smbios/smbios.c | 9

Re: [External] Re: [PATCH v2 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

On Tue, Mar 12, 2024 at 2:21 AM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > > (E820_TYPE_RAM). However, these emulated devices have

Re: [PATCH v4 0/3] Adjust the output of x-query-virtio-status

On Wed, Mar 13, 2024 at 09:20:08AM +0100, Markus Armbruster wrote: > "Michael S. Tsirkin" writes: > > > On Wed, Feb 21, 2024 at 10:28:50PM +0800, Hyman Huang wrote: > >> v4: > >> - Rebase on master > >> - Fix the syntax mistake within the commit message of [PATCH v3 1/3] > >> - Adjust the

Re: [PATCH v2 2/2] kvm: add support for guest physical bits

On Tue, Mar 05, 2024 at 11:52:33AM +0100, Gerd Hoffmann wrote: > Query kvm for supported guest physical address bits, in cpuid > function 8008, eax[23:16]. Usually this is identical to host > physical address bits. With NPT or EPT being used this might be > restricted to 48 (max 4-level

Re: [PATCH v2 2/5] plugins: add new inline op STORE_U64

On 3/13/24 01:15, Richard Henderson wrote: On 3/11/24 21:54, Pierrick Bouvier wrote: +static void gen_empty_inline_cb_store_u64(void) +{ +TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); +TCGv_ptr cpu_index_as_ptr = tcg_temp_ebb_new_ptr(); +TCGv_i64 val = tcg_temp_ebb_new_i64(); +

Re: [PATCH v2] target/riscv: Implement dynamic establishment of custom decoder

I'm sorry for making this mistake and thank you for your patience. In the next version, I will use GPtrArray you mentioned earlier to solve the problem. Thanks, Huang Tao On 2024/3/12 21:57, Richard Henderson wrote: On 3/11/24 19:45, Huang Tao wrote: +static void

[PATCH v2 01/16] esp.c: replace cmdfifo use of esp_fifo_pop_buf() in do_command_phase()

The aim is to restrict the esp_fifo_*() functions so that they only operate on the hardware FIFO. When reading from cmdfifo in do_command_phase() use the underlying Fifo8 functions directly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH v2 04/16] esp.c: change esp_fifo_push() to take ESPState

Now that all users of esp_fifo_push() operate on the main FIFO there is no need to pass the FIFO explicitly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index

[PATCH v2 02/16] esp.c: replace cmdfifo use of esp_fifo_pop_buf() in do_message_phase()

The aim is to restrict the esp_fifo_*() functions so that they only operate on the hardware FIFO. When reading from cmdfifo in do_message_phase() use the underlying Fifo8 functions directly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 7 ++- 1 file changed, 6 insertions(+), 1

[PATCH v2 10/16] esp.c: don't assert() if FIFO empty when executing esp_cdb_length()

This does not happen during normal usage, but can occur if the guest issues an invalid ESP command sequence. Reported-by: Chuhong Yuan Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index

[PATCH v2 09/16] esp.c: don't assert() if FIFO empty when executing non-DMA SELATNS

The current logic assumes that at least 1 byte is present in the FIFO when executing a non-DMA SELATNS command, but this may not be the case if the guest executes an invalid ESP command sequence. Reported-by: Chuhong Yuan Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 3 ++- 1 file

[PATCH v2 03/16] esp.c: replace cmdfifo use of esp_fifo_pop() in do_message_phase()

Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 100560244b..7a24515bb9 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -312,7 +312,8 @@ static void do_message_phase(ESPState *s)

Re: [PATCH v4 01/23] qapi/parser: fix typo - self.returns.info => self.errors.info

On 13/3/24 05:41, John Snow wrote: Small copy-pasto. The correct info field to use in this conditional block is self.errors.info. Fixes: 3a025d3d1ffa Reported-by: Markus Armbruster Signed-off-by: John Snow --- scripts/qapi/parser.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [PATCH] qapi: document PCIe Gen5/Gen6 speeds since 9.0

On 13/3/24 11:14, Philippe Mathieu-Daudé wrote: On 13/3/24 07:50, Michael S. Tsirkin wrote: Document that PCIe Gen5/Gen6 speeds are only in QAPI since 9.0 - the rest is since 4.0. Cc: Lukas Stockner Cc: Marcel Apfelbaum Fixes: c08da86dc4 ("pcie: Support PCIe Gen5/Gen6 link speeds") (BTW if

Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and sync host IOMMU cap/ecap

On Wed, Mar 13, 2024 at 02:52:39AM +, Duan, Zhenzhong wrote: > Hi Michael, > > >-Original Message- > >From: Michael S. Tsirkin > >Subject: Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and > >sync host IOMMU cap/ecap > > > >On Wed, Feb 28, 2024 at 05:44:29PM +0800,

Re: [PATCH for 9.0] migration: Skip only empty block devices

Peter Xu writes: > On Tue, Mar 12, 2024 at 05:34:26PM -0400, Stefan Hajnoczi wrote: >> I understand now. I missed that returning from init_blk_migration_it() >> did not abort iteration. Thank you! > > I queued it, thanks both! Thanks for cleaning up the mess I made!

RE: [PATCH v1 3/6] intel_iommu: Add a framework to check and sync host IOMMU cap/ecap

>-Original Message- >From: Michael S. Tsirkin >Subject: Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and >sync host IOMMU cap/ecap > >On Wed, Mar 13, 2024 at 02:52:39AM +, Duan, Zhenzhong wrote: >> Hi Michael, >> >> >-Original Message- >> >From: Michael S.

Re: [PATCH v4 0/3] Adjust the output of x-query-virtio-status

"Michael S. Tsirkin" writes: > On Wed, Feb 21, 2024 at 10:28:50PM +0800, Hyman Huang wrote: >> v4: >> - Rebase on master >> - Fix the syntax mistake within the commit message of [PATCH v3 1/3] >> - Adjust the linking file in hw/virtio/meson.build suggested by Markus >> >> Please review, >> Yong

Re: [PATCH v3 00/20] Workaround Windows failing to find 64bit SMBIOS entry point with SeaBIOS

On Tue, 12 Mar 2024 13:31:39 -0400 "Michael S. Tsirkin" wrote: > On Tue, Mar 12, 2024 at 05:10:30PM +0100, Igor Mammedov wrote: > > Changelog: > > v3: > >* whitespace missed by checkpatch > >* fix idndent in QAPI > >* reorder 17/20 before 1st 'auto' can be used > >* pick up acks

[PATCH v3] linux-aio: add IO_CMD_FDSYNC command support

From: Prasad Pandit Libaio defines IO_CMD_FDSYNC command to sync all outstanding asynchronous I/O operations, by flushing out file data to the disk storage. Enable linux-aio to submit such aio request. This helps to reduce latency induced via pthread_create calls by thread-pool (aio=threads).

[PATCH v2 06/16] esp.c: use esp_fifo_push() instead of fifo8_push()

There are still a few places that use fifo8_push() instead of esp_fifo_push() in order to push a value into the FIFO. Update those places to use esp_fifo_push() instead. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

Re: [PATCH v4 0/3] Adjust the output of x-query-virtio-status

"Michael S. Tsirkin" writes: > On Wed, Mar 13, 2024 at 09:20:08AM +0100, Markus Armbruster wrote: >> "Michael S. Tsirkin" writes: >> >> > On Wed, Feb 21, 2024 at 10:28:50PM +0800, Hyman Huang wrote: >> >> v4: >> >> - Rebase on master >> >> - Fix the syntax mistake within the commit message of

Re: [PATCH for 9.0] migration: Skip only empty block devices

Am 12.03.2024 um 13:27 hat Peter Xu geschrieben: > On Tue, Mar 12, 2024 at 01:04:31PM +0100, Cédric Le Goater wrote: > > The block .save_setup() handler calls a helper routine > > init_blk_migration() which builds a list of block devices to take into > > account for migration. When one device is

[PATCH v3] target/riscv: Implement dynamic establishment of custom decoder

In this patch, we modify the decoder to be a freely composable data structure instead of a hardcoded one. It can be dynamically builded up according to the extensions. This approach has several benefits: 1. Provides support for heterogeneous cpu architectures. As we add decoder in RISCVCPU,

Re: [PATCH v3] target/riscv: Implement dynamic establishment of custom decoder

Hi, On 13/3/24 10:57, Huang Tao wrote: In this patch, we modify the decoder to be a freely composable data structure instead of a hardcoded one. It can be dynamically builded up according to the extensions. This approach has several benefits: 1. Provides support for heterogeneous cpu

Re: [PATCH 1/7] tests/qtest/npcm7xx_emc_test: Don't leak cmd_line

On 12/03/2024 19.38, Peter Maydell wrote: In test_rx() and test_tx() we allocate a GString *cmd_line but never free it. This is pretty harmless in a test case, but Coverity spotted it. Resolves: Coverity CID 1507122 Signed-off-by: Peter Maydell --- tests/qtest/npcm7xx_emc-test.c | 4 ++-- 1

Re: [PATCH for-9.0] target/riscv: do not enable all named features by default

On Tue, Mar 12, 2024 at 9:32 PM Daniel Henrique Barboza wrote: > > Commit 3b8022269c added the capability of named features/profile > extensions to be added in riscv,isa. To do that we had to assign priv > versions for each one of them in isa_edata_arr[]. But this resulted in a > side-effect:

[PATCH v2 07/16] esp.c: change esp_fifo_pop_buf() to take ESPState

Now that all users of esp_fifo_pop_buf() operate on the main FIFO there is no need to pass the FIFO explicitly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c

Re: [PATCH v4 1/3] target/riscv: Enable mcontrol6 triggers only when sdtrig is selected

On Wed, Mar 13, 2024 at 11:39:29AM +0530, Himanshu Chauhan wrote: > The mcontrol6 triggers are not defined in debug specification v0.13 > These triggers are defined in sdtrig ISA extension. > > This patch: >* Adds ext_sdtrig capability which is used to select mcontrol6 triggers >* Keeps

[PATCH 0/3] tests/avocado: update sbsa-ref firmware to latest

insertions(+), 40 deletions(-) --- base-commit: 0748129684be2773117b0b8fc3c60161abdb7bb8 change-id: 20240313-sbsa-ref-firmware-update-7579d9f6d59b Best regards, -- Marcin Juszkiewicz

[PATCH 3/3] tests/avocado: use OpenBSD 7.4 for sbsa-ref

7.4 was released in October 2023, time to update before 7.3 gets dropped. Signed-off-by: Marcin Juszkiewicz --- tests/avocado/machine_aarch64_sbsaref.py | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/tests/avocado/machine_aarch64_sbsaref.py

Re: [PATCH v4 2/3] target/riscv: Expose sdtrig ISA extension

On Wed, Mar 13, 2024 at 3:24 PM Andrew Jones wrote: > On Wed, Mar 13, 2024 at 11:39:30AM +0530, Himanshu Chauhan wrote: > > This patch adds "sdtrig" in the ISA string when sdtrig extension is > enabled. > > The sdtrig extension may or may not be implemented in a system. > Therefore, the > >

Re: [PATCH] qapi: document PCIe Gen5/Gen6 speeds since 9.0

On Wed, Mar 13, 2024 at 11:22:43AM +0100, Philippe Mathieu-Daudé wrote: > On 13/3/24 11:14, Philippe Mathieu-Daudé wrote: > > On 13/3/24 07:50, Michael S. Tsirkin wrote: > > > Document that PCIe Gen5/Gen6 speeds are only in QAPI > > > since 9.0 - the rest is since 4.0. > > > > > > Cc: Lukas

[PATCH v2] block: Use LVM tools for LV block device truncation

If a block device is an LVM logical volume we can resize it using standard LVM tools. Add a helper to detect if a device is a DM device. In raw_co_truncate() check if the block device is DM and resize it executing lvresize. Signed-off-by: Alexander Ivanov --- block/file-posix.c | 61

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

Hi Daniel, Daniel P. Berrangé, Mar 12, 2024 at 16:49: > The point still stands though. NUMA node ID numbers are not > guaranteed to be the same as socket ID numbers. Very often > then will be the same (which makes it annoying to test as it > is easy to not realize the difference), but we can't

Re: [PATCH V8 3/8] hw/acpi: Update ACPI GED framework to support vCPU Hotplug

Hi Salil, It seems my comment [1] in v7 was missed, but I still hit the same issue. Pls let me paste the previous comment here again. [1]: https://lore.kernel.org/qemu-devel/zxcqp32ggifvu...@intel.com/ [snip] > @@ -400,6 +411,12 @@ static void acpi_ged_initfn(Object *obj) >

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

On Wed, Mar 13, 2024 at 11:48:19AM +0100, Anthony Harivel wrote: > Hi Daniel, > > Daniel P. Berrangé, Mar 12, 2024 at 16:49: > > > The point still stands though. NUMA node ID numbers are not > > guaranteed to be the same as socket ID numbers. Very often > > then will be the same (which makes it

Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and sync host IOMMU cap/ecap

On Wed, Mar 13, 2024 at 07:54:11AM +, Duan, Zhenzhong wrote: > > > >-Original Message- > >From: Michael S. Tsirkin > >Subject: Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and > >sync host IOMMU cap/ecap > > > >On Wed, Mar 13, 2024 at 02:52:39AM +, Duan, Zhenzhong

Re: [PATCH] target/ppc: Move floating-point arithmetic instructions to decodetree.

On 3/12/24 15:31, Nicholas Piggin wrote: On Thu Mar 7, 2024 at 9:03 PM AEST, Chinmay Rath wrote: diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 189cd8c979..03b84ba79b 100644 --- a/target/ppc/translate/fp-impl.c.inc +++

Re: [PATCH v4 01/23] qapi/parser: fix typo - self.returns.info => self.errors.info

Philippe Mathieu-Daudé writes: > On 13/3/24 05:41, John Snow wrote: >> Small copy-pasto. The correct info field to use in this conditional >> block is self.errors.info. >> Fixes: 3a025d3d1ffa > > Reported-by: Markus Armbruster I did? Messed-up-by: me would be accurate, though! >>

[PULL v2 for 9.0 0/7] final maintainer updates (testing, gdbstub)

The following changes since commit 0748129684be2773117b0b8fc3c60161abdb7bb8: Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging (2024-03-12 16:56:13 +) are available in the Git repository at: https://gitlab.com/stsquad/qemu.git

[PATCH v2 3/6] virtio-mmio: Handle extra notification data

Add support to virtio-mmio devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated. The extra data that's passed to the virtio-mmio device when this feature is enabled varies depending on the device's

Re: [PATCH v2 05/16] esp.c: change esp_fifo_pop() to take ESPState

On 13/3/24 09:57, Mark Cave-Ayland wrote: Now that all users of esp_fifo_pop() operate on the main FIFO there is no need to pass the FIFO explicitly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) Reviewed-by: Philippe

Re: [PATCH v2 04/16] esp.c: change esp_fifo_push() to take ESPState

On 13/3/24 09:57, Mark Cave-Ayland wrote: Now that all users of esp_fifo_push() operate on the main FIFO there is no need to pass the FIFO explicitly. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) Reviewed-by: Philippe

Re: [PATCH v2 03/16] esp.c: replace cmdfifo use of esp_fifo_pop() in do_message_phase()

On 13/3/24 09:57, Mark Cave-Ayland wrote: Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v2 12/16] esp.c: move esp_set_phase() and esp_get_phase() towards the beginning of the file

On 13/3/24 09:58, Mark Cave-Ayland wrote: This allows these functions to be used earlier in the file without needing a separate forward declaration. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 36 ++-- 1 file changed, 18 insertions(+), 18 deletions(-)

Re: [PATCH v4 2/3] target/riscv: Expose sdtrig ISA extension

On Wed, Mar 13, 2024 at 03:50:16PM +0530, Himanshu Chauhan wrote: > On Wed, Mar 13, 2024 at 3:24 PM Andrew Jones > wrote: > > > On Wed, Mar 13, 2024 at 11:39:30AM +0530, Himanshu Chauhan wrote: > > > This patch adds "sdtrig" in the ISA string when sdtrig extension is > > enabled. > > > The

Re: [PULL 0/8] tcg + linux-user patch queue

On Tue, 12 Mar 2024 at 18:43, Richard Henderson wrote: > > The following changes since commit 8f3f329f5e0117bd1a23a79ab751f8a7d3471e4b: > > Merge tag 'migration-20240311-pull-request' of > https://gitlab.com/peterx/qemu into staging (2024-03-12 11:35:41 +) > > are available in the Git

[RFC PATCH 5/5] contrib/plugins: add ips plugin example for cost modelling

This plugin uses the new time control interface to make decisions about the state of time during the emulation. The algorithm is currently very simple. The user specifies an ips rate which applies per core. If the core runs ahead of its allocated execution time the plugin sleeps for a bit to let

Re: [PATCH v2 09/16] esp.c: don't assert() if FIFO empty when executing non-DMA SELATNS

On 13/3/24 09:58, Mark Cave-Ayland wrote: The current logic assumes that at least 1 byte is present in the FIFO when executing a non-DMA SELATNS command, but this may not be the case if the guest executes an invalid ESP command sequence. Reported-by: Chuhong Yuan Signed-off-by: Mark

[RFC PATCH 3/5] sysemu: generalise qtest_warp_clock as qemu_clock_advance_virtual_time

From: Alex Bennée Move the key functionality of moving time forward into the clock sub-system itself. This will allow us to plumb in time control into plugins. Signed-off-by: Alex Bennée --- include/qemu/timer.h | 15 +++ system/qtest.c | 25 +++--

[RFC PATCH 4/5] plugins: add time control API

From: Alex Bennée Expose the ability to control time through the plugin API. Only one plugin can control time so it has to request control when loaded. There are probably more corner cases to catch here. Signed-off-by: Alex Bennée --- include/qemu/qemu-plugin.h | 23 +++

[RFC PATCH 2/5] qtest: use cpu interface in qtest_clock_warp

From: Alex Bennée This generalises the qtest_clock_warp code to use the AccelOps handlers for updating its own sense of time. This will make the next patch which moves the warp code closer to pure code motion. Signed-off-by: Alex Bennée Acked-by: Thomas Huth --- include/sysemu/qtest.h | 1 +

Re: [PATCH 0/5] Implement port 92 in south bridges

Am 12. März 2024 15:47:21 UTC schrieb "Michael S. Tsirkin" : >On Sun, Feb 18, 2024 at 02:16:56PM +0100, Bernhard Beschow wrote: >> This series attempts to make QEMU's south bridge families PIIX, ICH9, and VIA >> 82xx more self-contained by integrating IO port 92 like the originals do. >

Re: [PATCH v2 15/16] esp.c: ensure esp_pdma_write() always calls esp_fifo_push()

On 13/3/24 09:58, Mark Cave-Ayland wrote: This ensures that esp_update_drq() is called via esp_fifo_push() whenever the host uses PDMA to transfer data to a SCSI device. Signed-off-by: Mark Cave-Ayland --- hw/scsi/esp.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-)

Re: [PATCH 3/3] tests/avocado: use OpenBSD 7.4 for sbsa-ref

Hi Marcin, On 13/3/24 11:08, Marcin Juszkiewicz wrote: 7.4 was released in October 2023, time to update before 7.3 gets dropped. Signed-off-by: Marcin Juszkiewicz --- tests/avocado/machine_aarch64_sbsaref.py | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-)

Re: [PATCH] target/ppc: Move floating-point arithmetic instructions to decodetree.

On 3/12/24 19:59, Peter Maydell wrote: On Tue, 12 Mar 2024 at 14:25, Nicholas Piggin wrote: On Wed Mar 13, 2024 at 12:01 AM AEST, Richard Henderson wrote: On 3/11/24 23:36, Nicholas Piggin wrote: [snip] #define FPU_HELPER(name, op, flags_handler) \ float64

[PATCH v2 0/6] virtio,vhost: Add VIRTIO_F_NOTIFICATION_DATA support

The goal of these patches are to add support to a variety of virtio and vhost devices for the VIRTIO_F_NOTIFICATION_DATA transport feature. This feature indicates that a driver will pass extra data (instead of just a virtqueue's index) when notifying the corresponding device. The data passed in

Re: [PATCH v4 2/3] target/riscv: Expose sdtrig ISA extension

On Wed, Mar 13, 2024 at 05:48:16PM +0530, Himanshu Chauhan wrote: ... > #ifndef CONFIG_USER_ONLY > +if (cpu->cfg.debug && cpu->cfg.ext_sdtrig) { > + warn_report("Disabling debug property since sdtrig ISA > >>> extension " > + "is enabled"); >

Re: [PATCH v4 2/3] target/riscv: Expose sdtrig ISA extension

> On 13-Mar-2024, at 6:19 PM, Andrew Jones wrote: > > On Wed, Mar 13, 2024 at 05:48:16PM +0530, Himanshu Chauhan wrote: > ... >> #ifndef CONFIG_USER_ONLY >> +if (cpu->cfg.debug && cpu->cfg.ext_sdtrig) { >> + warn_report("Disabling debug property since sdtrig ISA >

Re: [PATCH 03/14] hw/core/machine-smp: Simplify variables' initialization in machine_parse_smp_config()

Hello Zhao, > (Communicating with you also helped me to understand the QAPI related parts.) * I'm also visiting QAPI code parts for the first time. Thanks to you. :) On Mon, 11 Mar 2024 at 10:36, Zhao Liu wrote: > SMPConfiguration is created and set in machine_set_smp(). > Firstly, it is

[RFC PATCH 1/5] sysemu: add set_virtual_time to accel ops

From: Alex Bennée We are about to remove direct calls to individual accelerators for this information and will need a central point for plugins to hook into time changes. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- include/sysemu/accel-ops.h | 18

[RFC PATCH 0/5] Implement icount=auto using TCG Plugins

The goal here is to be able to scale temporally execution of qemu-user/system, using a given number of instructions per second. We define a virtual clock, that can be late or in advance compared to real time. When we are in advance, we slow execution (by sleeping) until catching real time.

Re: [PATCH v2 16/16] esp.c: remove explicit setting of DRQ within ESP state machine

On 13/3/24 09:58, Mark Cave-Ayland wrote: Now the esp_update_drq() is called for all reads/writes to the FIFO, there is no need to manually raise and lower the DRQ signal. Signed-off-by: Mark Cave-Ayland Resolves: https://gitlab.com/qemu-project/qemu/-/issues/611 Resolves:

Re: [PATCH 0/3] tests/avocado: update sbsa-ref firmware to latest

Hi Marcin, On 13/3/24 11:08, Marcin Juszkiewicz wrote: Updating sbsa-ref firmware for QEMU CI was manual task. Now it is replaced by CI job run on CodeLinaro Gitlab instance. This patchset updates to current state: - Trusted Firmware v2.10.2 (latest LTS) - Tianocore EDK2 stable202402 (latest

Re: [PATCH 1/3] tests/avocado: update sbsa-ref firmware

On 13/3/24 11:08, Marcin Juszkiewicz wrote: We now have CI job to build those and publish in space with readable urls. Firmware is built using Debian 'bookworm' cross toolchain (gcc 12.2.0). Used versions: - Trusted Firmware v2.10.2 - Tianocore EDK2 stable202402 - Tianocore EDK2 Platforms

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