From: Philippe Mathieu-Daudé
Negative offset is meaningless, use unsigned type.
Return a boolean value indicating success.
Reviewed-by: Richard Henderson
Reviewed-by: Kevin Wolf
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20240409135944.24997-3-phi...@linaro.org>
(cherry picked from
Hello all,
I started a thread a thread at
https://lore.kernel.org/linux-newbie/CAFkJGRcg+ThJ-xUve0=WorChW=-6prelhxem8ywtwzwpkht...@mail.gmail.com/T/#m563ab52dd2bfe7ac8d85f838f866a1a9d1a6d0a9
. It is using Qemu, but both Linux and Qemu and rather complex pieces
of software. I was wondering if
From: Philippe Mathieu-Daudé
Per "SD Host Controller Standard Specification Version 3.00":
* 2.2.5 Transfer Mode Register (Offset 00Ch)
Writes to this register shall be ignored when the Command
Inhibit (DAT) in the Present State register is 1.
Do not update the TRNMOD register when
From: Philippe Mathieu-Daudé
Replace qemu_bh_new_guarded() by virtio_bh_new_guarded()
so the bus and device use the same guard. Otherwise the
DMA-reentrancy protection can be bypassed:
$ cat << EOF | qemu-system-i386 -display none -nodefaults \
-machine
From: Philippe Mathieu-Daudé
When the MAC Interface Layer (MIL) transmit FIFO is full,
truncate the packet, and raise the Transmitter Error (TXE)
flag.
Broken since model introduction in commit 2a42499017
("LAN9118 emulation").
When using the reproducer from
On 18/04/2024 21:08, Mark Cave-Ayland wrote:
On 15/04/2024 08:26, Thomas Huth wrote:
On 07/03/2024 18.43, Thomas Huth wrote:
The Sparc CPU naming and the corresponding help text is somewhat
confusing for the users. We should avoid spaces in the Names and
provide clear information to the
The sun4u machine has an IOMMU and therefore it is possible to program it such
that the virtio-device IOVA does not map directly to the CPU physical address.
This is not a problem with Linux which always maps the IOVA directly to the CPU
physical address, however it is required for the NetBSD
The following patches are queued for QEMU stable v7.2.11:
https://gitlab.com/qemu-project/qemu/-/commits/staging-7.2
Patch freeze is 2024-04-20, and the release is planned for 2024-04-22:
https://wiki.qemu.org/Planning/7.2
Please respond here or CC qemu-sta...@nongnu.org on any additional
From: Philippe Mathieu-Daudé
Replace qemu_bh_new_guarded() by virtio_bh_new_guarded()
so the bus and device use the same guard. Otherwise the
DMA-reentrancy protection can be bypassed.
Fixes: CVE-2024-3446
Cc: qemu-sta...@nongnu.org
Suggested-by: Alexander Bulekov
Reviewed-by: Gerd Hoffmann
On Thu, Apr 18, 2024 at 08:14:15PM +0200, Maciej S. Szmigiero wrote:
> On 18.04.2024 12:39, Daniel P. Berrangé wrote:
> > On Thu, Apr 18, 2024 at 11:50:12AM +0200, Maciej S. Szmigiero wrote:
> > > On 17.04.2024 18:35, Daniel P. Berrangé wrote:
> > > > On Wed, Apr 17, 2024 at 02:11:37PM +0200,
From: Philippe Mathieu-Daudé
Replace qemu_bh_new_guarded() by virtio_bh_new_guarded()
so the bus and device use the same guard. Otherwise the
DMA-reentrancy protection can be bypassed.
Fixes: CVE-2024-3446
Cc: qemu-sta...@nongnu.org
Suggested-by: Alexander Bulekov
Reviewed-by: Gerd Hoffmann
From: Harsh Prateek Bora
Initialize the machine specific max_cpus limit as per the maximum range
of CPU IPIs available. Keeping between 4096 to 8192 will throw IRQ not
free error due to XIVE/XICS limitation and keeping beyond 8192 will hit
assert in tcg_region_init or spapr_xive_claim_irq.
From: Philippe Mathieu-Daudé
The magic 2048 is explained in the LAN9211 datasheet (DS2414A)
in chapter 1.4, "10/100 Ethernet MAC":
The MAC Interface Layer (MIL), within the MAC, contains a
2K Byte transmit and a 128 Byte receive FIFO which is separate
from the TX and RX FIFOs. [...]
From: Philippe Mathieu-Daudé
Introduce virtio_bh_new_guarded(), similar to qemu_bh_new_guarded()
but using the transport memory guard, instead of the device one
(there can only be one virtio device per virtio bus).
Inspired-by: Gerd Hoffmann
Reviewed-by: Gerd Hoffmann
Acked-by: Michael S.
From: Richard Henderson
The copy back to siginfo_t should be conditional only on arg3,
not the specific values that might have been written.
The copy back to rusage was missing entirely.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2262
Signed-off-by: Richard Henderson
Tested-by:
In PVH dom0, it uses the linux local interrupt mechanism,
when it allocs irq for a gsi, it is dynamic, and follow
the principle of applying first, distributing first. And
the irq number is alloced from small to large, but the
applying gsi number is not, may gsi 38 comes before gsi
28, that causes
Hi All,
This is v6 series to support passthrough on Xen when dom0 is PVH.
v5->v6 changes:
* Due to changes in the implementation of obtaining gsi in the kernel and Xen.
Change to use xc_physdev_gsi_from_irq, instead of gsi sysfs.
Best regards,
Jiqian Chen
v4->v5 changes:
* Add review by
This adds special rendering for Sphinx's typed field lists.
This patch does not add any QAPI-aware markup, rendering, or
cross-referencing for the type names, yet. That feature requires a
subclass to TypedField which will happen in its own commit quite a bit
later in this series; after all the
Normally, Sphinx will silently fall back to its standard field list
processing if it doesn't match one of your defined fields. A lot of the
time, that's not what we want - we want to be warned if we goof
something up.
For instance, the canonical argument field list form is:
:arg type name: descr
Add support for Features field lists. There is no QAPI-specific
functionality here, but this could be changed if desired (if we wanted
the feature names to link somewhere, for instance.)
This feature list doesn't have any restrictions, so it can be used to
document object-wide features or
Although "unstable" is a feature (and *will* appear in the features
list), add a special :unstable: option to generate an eye-catch that
makes this information very hard to miss.
(The intent is to modify qapidoc.py to add this option whenever it
detects that the features list attached to a
Just to have a bit more to look at in the generated doc, here's a fairly
complex command with a lot of bells and whistles.
Signed-off-by: John Snow
---
docs/qapi/index.rst | 67 +
1 file changed, 67 insertions(+)
diff --git a/docs/qapi/index.rst
Add domain-specific cross-reference syntax. As of this commit, that
means new :qapi:mod:`block-core` and :qapi:obj:`block-core` referencing
syntax.
:mod: will only find modules, but :obj: will find anything registered to
the QAPI domain. (In forthcoming commits, this means commands, events,
It doesn't really do anything yet, we'll get to it brick-by-brick in the
forthcoming commits to keep the series breezy and the git history
informative.
Signed-off-by: John Snow
---
docs/conf.py | 3 ++-
docs/sphinx/qapi-domain.py | 50 ++
2
Cleanup of the last patch to fix the build before closing out this RFC
series.
Signed-off-by: John Snow
---
docs/qapi/index.rst | 4
1 file changed, 4 deletions(-)
diff --git a/docs/qapi/index.rst b/docs/qapi/index.rst
index ef58dfc4bcd..8352a27d4a5 100644
--- a/docs/qapi/index.rst
+++
From: Harmonie Snow
Improve the general look and feel of generated QAPI docs.
Attempt to limit line lengths to offer a more comfortable measure on
maximized windows, and improve some margin and spacing for field lists.
Signed-off-by: Harmonie Snow
Signed-off-by: John Snow
---
On 18/04/2024 22.27, Mark Cave-Ayland wrote:
On 07/03/2024 17:43, Thomas Huth wrote:
Add some words about how to enable or disable boolean features,
and remove the note about a Linux kernel being available on the
QEMU website (they have been removed long ago already).
Signed-off-by: Thomas
On 4/18/24 8:41 PM, Arnd Bergmann wrote:
On Thu, Apr 18, 2024, at 17:44, Joseph Myers wrote:
On Wed, 17 Apr 2024, Sandra Loosemore wrote:
Therefore I'd like to mark Nios II as obsolete in GCC 14 now, and remove
support from all toolchain components after the release is made. I'm not sure
On 19/04/2024 05:59, Thomas Huth wrote:
On 18/04/2024 22.27, Mark Cave-Ayland wrote:
On 07/03/2024 17:43, Thomas Huth wrote:
Add some words about how to enable or disable boolean features,
and remove the note about a Linux kernel being available on the
QEMU website (they have been removed
Adds the .. qapi:union:: directive, object, and :qapi:union:`name`
cross-referencing role.
In order to support discriminated branches of unions, a new qapi:branch
directive is created whose only purpose is to create a dynamically named
field list section based on the name of the branch key and
This commit adds a generic QAPIObject class for use in documenting
various QAPI entities in the Sphinx ecosystem.
It also adds a stubbed version of QAPICommand that utilizes the
QAPIObject class; along with the qapi:command directive, the
:qapi:cmd: cross-reference role, and the "command" object
Adds the .. qapi:struct:: directive, object, and :qapi:struct:`name`
cross-referencing role.
As per usual, QAPI cross-referencing for types in the member field list
will be added in a forthcoming commit.
RFC Note: The "?" syntax sneaks into the example document again. Please
ignore that for now.
Adds the .. qapi:event:: directive, object, and :qapi:event:`name`
cross-referencing role.
Adds the :memb type name: field list syntax for documenting event data
members. As this syntax and phrasing will be shared with Structs and
Unions as well, add the field list definition to a shared abstract
This commit, finally, adds cross-referencing support to various field
lists; modeled tightly after Sphinx's own Python domain code.
Cross-referencing support is added to type names provided to :arg:,
:memb:, :returns: and :choice:.
:feat:, :error: and :value:, which do not take type names, do
Use the QAPI object registry to generate a special index just for QAPI
definitions. The index can show entries both by definition type and
alphabetically.
The index can be linked from anywhere in the QEMU manual by using
`qapi-index`.
Signed-off-by: John Snow
---
docs/qapi/index.rst|
This adds a qapi:module directive, which just notes the current module
being documented and performs a nested parse of the content block, if
present.
This code is based pretty heavily on Sphinx's PyModule directive, but
with the modindex functionality excised.
This commit also adds the
Sphinx 5.3.0 to Sphinx 6.2.0 has a bug where nested content in an
ObjectDescription content block has its error position reported
incorrectly due to an oversight when they added nested section support
to this directive.
(This bug is present in Sphinx's own Python and C domains; test it
yourself
Although "deprecated" is a feature (and *will* appear in the features
list), add a special :deprecated: option to generate an eye-catch that
makes this information very hard to miss.
(The intent is to modify qapidoc.py to add this option whenever it
detects that the features list attached to a
Add the .. qapi:alternate:: directive, object, and qapi:alt:`name`
cross-reference role.
Add the "Choices:" field list for describing alternate choices. Like
other field lists that reference QAPI types, a forthcoming commit will
add cross-referencing support to this field.
RFC: In the future, it
Add a little special markup for registering "Since:" information. Adding
it as an option instead of generic content lets us hoist the information
into the Signature bar, optionally put it in the index, etc.
Signed-off-by: John Snow
---
docs/qapi/index.rst| 1 +
This series adds a new qapi-domain extension for Sphinx, which adds a
series of custom directives for documenting QAPI definitions.
GitLab CI: https://gitlab.com/jsnow/qemu/-/pipelines/1259566476
(Link to a demo HTML page at the end of this cover letter, but I want
you to read the cover letter
Add the ability to resolve cross-references using the `any`
cross-reference syntax. Adding QAPI-specific cross-reference roles will
be added in a forthcoming commit, and will share the same find_obj()
helper.
(There's less code needed for the generic cross-reference resolver, so
it comes first in
This is the first step towards QAPI domain cross-references and a QAPI
reference index.
For now, just create the object registry and amend the qapi:module
directive to use that registry. Update the merge_domaindata method now
that we have actual data we may need to merge.
RFC: Much of this code
Add "Returns:" field list syntax to QAPI Commands.
Like "Arguments:" and "Errors:", the type name isn't currently processed
for cross-referencing, but this will be addressed in a forthcoming
commit.
This patch adds "errors" as a GroupedField, which means that multiple
return values can be
> On 4/18/24 03:27, Zhiwei Jiang wrote:
> > Sometimes, when the address of the passed TCGTemp *ts variable is the same
> > as tcg_ctx,
>
> Pardon? When would TCGTemp *ts == TCGContext *tcg_ctx?
>
>
> > the index calculated in the temp_idx function, i.e., ts - tcg_ctx->temps,
> > can result in
Add the .. qapi:enum:: directive, object, and :qapi:enum:`name`
cross-reference role.
Add the :value name: field list for documenting Enum values.
Of note, also introduce a new "type" role that is intended to be used by
other QAPI object directives to cross-reference arbitrary QAPI type
names,
Add a special :ifcond: option that allows us to annotate the
definition-level conditionals.
RFC: This patch renders IFCOND information in two places, because I'm
undecided about how to style this information. One option is in the
signature bar, and another option is in an eye-catch, like
``:error type: descr`` can now be used to document error conditions,
naming the type of error object and a description of when the error is
surfaced.
Like the previous Arguments patch, this patch does not apply any special
QAPI syntax highlighting or cross-referencing for the types, but this
can
This patch demonstrates what happens when you mess up a field list
entry. The next patch adds a safeguard against this.
Signed-off-by: John Snow
---
docs/qapi/index.rst | 4
1 file changed, 4 insertions(+)
diff --git a/docs/qapi/index.rst b/docs/qapi/index.rst
index
On 4/19/24 00:55, Philippe Mathieu-Daudé wrote:
"exec/cpu-all.h" doesn't require "exec/tswap.h". Remove it,
including it in the sources when required.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/xtensa/bootparam.h | 1 +
include/exec/cpu-all.h | 1 -
accel/tcg/translator.c
On Wed, 17 Apr 2024 13:07:35 -0700
Richard Henderson wrote:
> On 4/16/24 08:11, Jonathan Cameron wrote:
> > On Fri, 1 Mar 2024 10:41:09 -1000
> > Richard Henderson wrote:
> >
> >> If translation is disabled, the default memory type is Device, which
> >> requires alignment checking. This is
Hi Zhao, Daniel,
Zhao Liu, Apr 17, 2024 at 17:13:
> Hi Daniel,
>
> On Wed, Apr 17, 2024 at 01:27:03PM +0100, Daniel P. Berrangé wrote:
> > Date: Wed, 17 Apr 2024 13:27:03 +0100
> > From: "Daniel P. Berrangé"
> > Subject: Re: [PATCH v5 3/3] Add support for RAPL MSRs in KVM/Qemu
> >
> > On Wed,
On 4/17/24 16:20, Philippe Mathieu-Daudé wrote:
On 17/4/24 08:24, Cédric Le Goater wrote:
Hello,
On 4/16/24 20:47, Philippe Mathieu-Daudé wrote:
We are going to modify these lines, fix their style
in order to avoid checkpatch.pl warnings:
WARNING: line over 80 characters
Signed-off-by:
Hi Cédric,
>-Original Message-
>From: Cédric Le Goater
>Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
>compatibility check with host IOMMU cap/ecap
>
>Hello Zhenzhong
>
>On 4/17/24 11:24, Duan, Zhenzhong wrote:
>>
>>
>>> -Original Message-
>>> From: Cédric Le
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> ASID and VMID used to be uint16_t in the translation config, however,
> in other contexts they can be int as -1 in case of TLB invalidation,
> to represent all(don’t care).
> When stage-2 was added asid was set to -1 in stage-2 and vmid to -1
>
Hi Daniel,
Daniel P. Berrangé, Apr 17, 2024 at 19:23:
> On Thu, Apr 11, 2024 at 02:14:31PM +0200, Anthony Harivel wrote:
> > Dear maintainers,
> >
> > First of all, thank you very much for your review of my patch
> > [1].
> >
> > In this version (v5), I have attempted to address all the
On 12/04/2024 16.40, Eric Blake wrote:
On Fri, Apr 12, 2024 at 03:24:11PM +0200, Thomas Huth wrote:
Since version 2.66, glib has useful URI parsing functions, too.
Use those instead of the QEMU-internal ones to be finally able
to get rid of the latter.
Signed-off-by: Thomas Huth
---
On 17/04/2024 18.15, Daniel P. Berrangé wrote:
On Fri, Apr 12, 2024 at 03:24:06PM +0200, Thomas Huth wrote:
RHEL 9 (and thus also the derivatives) are available since two years
now, so according to QEMU's support policy, we can drop the active
support for the previous major version 8 now.
Thus
Hello Zhenzhong
On 4/17/24 11:24, Duan, Zhenzhong wrote:
-Original Message-
From: Cédric Le Goater
Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
compatibility check with host IOMMU cap/ecap
On 4/17/24 06:21, Duan, Zhenzhong wrote:
-Original Message-
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