13.02.2024 00:56, Richard Henderson:
Correct arithmetic for separating high and low
on a large negative number.
Fixes: 79ffece4447 ("tcg/arm: Implement direct branch for goto_tb")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1714
Signed-off-by: Richard Henderson
Cc: qemu-stable@
Prefer the QDev API over the low level QOM one.
No logical change intended.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/sgx.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
index 70305547d4..9176040f8f 100644
---
On 6/2/24 16:41, Peter Maydell wrote:
Suppress the deprecation warning when we're running under qtest,
to avoid "make check" including warning messages in its output.
Signed-off-by: Peter Maydell
---
hw/block/tc58128.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Patched
On 9/2/24 01:05, BALATON Zoltan wrote:
This file is only used by system/physmem.c so move them together.
Signed-off-by: BALATON Zoltan
---
memory_ldst.c.inc => system/memory_ldst.c.inc | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename memory_ldst.c.inc =>
Cc'ing Brian & Taylor
On 12/2/24 21:45, Ilya Leoshkevich wrote:
Some applications want to use low priority realtime signals (e.g.,
SIGRTMAX). Currently QEMU cannot map all target realtime signals to
host signals, and chooses to sacrifice the end of the target realtime
signal range.
Change this
On 2/12/24 18:38, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (3):
hw/usb: Style cleanup
hw/usb/uhci: Rename NB_PORTS -> UHCI_PORTS
hw/usb/ehci: Rename NB_PORTS -> EHCI_PORTS
Reviewed-by: Richard Henderson
r~
13.02.2024 08:44, Michael Tokarev wrote:
13.02.2024 05:21, Richard Henderson:
We need values 0-3 for TCG_TYPE_I128 on 32-bit hosts.
Cc: qemu-sta...@nongnu.org
Fixes: 43eef72f4109 ("tcg: Add temp allocation for TCGv_i128")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2159
13.02.2024 05:21, Richard Henderson:
We need values 0-3 for TCG_TYPE_I128 on 32-bit hosts.
Cc: qemu-sta...@nongnu.org
Fixes: 43eef72f4109 ("tcg: Add temp allocation for TCGv_i128")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2159
Signed-off-by: Richard Henderson
---
I feel certain
Hi,
We are running into an issue using GDB with our RTOS on QEMU x86_64 system
emulator without KVM. The same works well when we re-run the test with KVM
enabled.
The scenario is following:
* ptrace sets up a HW watchpoint using debug register
* ptrace sets up a user program
Rename NB_PORTS as UHCI_PORTS to avoid definition clash
with EHCI equivalent:
hw/usb/hcd-uhci.h:38:9: error: 'NB_PORTS' macro redefined
[-Werror,-Wmacro-redefined]
#define NB_PORTS 2
^
hw/usb/hcd-ehci.h:40:9: note: previous definition is here
#define NB_PORTS 6
We are going to modify these lines, fix their style
in order to avoid checkpatch.pl warning.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/hcd-ehci.c | 3 ++-
hw/usb/hcd-uhci.c | 6 --
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
Rename NB_PORTS as EHCI_PORTS to avoid definition clash
with UHCI equivalent:
hw/usb/hcd-ehci.h:40:9: error: 'NB_PORTS' macro redefined
[-Werror,-Wmacro-redefined]
#define NB_PORTS 6/* Max. Number of downstream ports */
^
hw/usb/hcd-uhci.h:38:9: note: previous
Rename variables to avoid clashing when including both
"hw/usb/hcd-ehci.h" and "hw/usb/hcd-uhci.h" in the same
file.
Philippe Mathieu-Daudé (3):
hw/usb: Style cleanup
hw/usb/uhci: Rename NB_PORTS -> UHCI_PORTS
hw/usb/ehci: Rename NB_PORTS -> EHCI_PORTS
hw/usb/hcd-ehci.h| 8
We can not create the Q35 machine without PCI, so simplify
pc_q35_init() removing pointless checks.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_q35.c | 32 ++--
1 file changed, 10 insertions(+), 22 deletions(-)
diff --git a/hw/i386/pc_q35.c
On 13/2/24 03:21, Richard Henderson wrote:
We need values 0-3 for TCG_TYPE_I128 on 32-bit hosts.
Cc: qemu-sta...@nongnu.org
Fixes: 43eef72f4109 ("tcg: Add temp allocation for TCGv_i128")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2159
Signed-off-by: Richard Henderson
---
I feel
>> >
>> > I'd find it helpful to see the resulting chunk of SRAT for these examples
>> > (disassembled) in this cover letter and the patches (where there are more
>> > examples).
>>
>> Ack. I'll document the resulting SRAT table as well.
>
> Still didn't happen so this is dropped for now.
Hi
From: Huai-Cheng Kuo
SPDM enables authentication, attestation and key exchange to assist in
providing infrastructure security enablement. It's a standard published
by the DMTF [1].
SPDM supports multiple transports, including PCIe DOE and MCTP.
This patch adds support to QEMU to connect to an
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst|
The Security Protocol and Data Model (SPDM) Specification defines
messages, data objects, and sequences for performing message exchanges
over a variety of transport and physical media.
-
https://www.dmtf.org/sites/default/files/standards/documents/DSP0274_1.3.0.pdf
SPDM currently supports PCIe
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
We need values 0-3 for TCG_TYPE_I128 on 32-bit hosts.
Cc: qemu-sta...@nongnu.org
Fixes: 43eef72f4109 ("tcg: Add temp allocation for TCGv_i128")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2159
Signed-off-by: Richard Henderson
---
I feel certain that I made this change back when I
On 2/9/24 4:54 AM, Shiyang Ruan wrote:
> Currently driver only trace cxl events, poison injection on cxl memdev
> is silent. OS needs to be notified then it could handle poison range
> in time. Per CXL spec, the device error event could be signaled through
> FW-First and OS-First methods.
>
On Mon, Feb 12, 2024 at 12:57 PM James Bottomley wrote:
>
> On Mon, 2024-02-12 at 12:16 -0800, Dionna Amalie Glaze wrote:
> > This is not a patch but it felt inappropriate to derail a recent
> > patch that's just refactoring the kernel-hashes object_class_property
> > definition. Apologies if
From: Helge Deller
HP-UX 11 and HP ODE tools use the "rsm 0,%reg" instruction in not priviledged
code paths to get the current PSW flags. The constant 0 means that no bits of
the PSW shall be reset, so this is effectively a read-only access to the PSW.
Allow this read-only access even for not
From: Helge Deller
Add the do_transaction_failed() handler to tigger a HPMC to the CPU
in case of I/O transaction errors.
This is a preparation commit.
We still lack implementation for some registers, so do not yet enable sending
HPMCs. Having this hunk here now nevertheless helps for the
From: Helge Deller
The BTLB helper function stores the BTLB info (four 32-bit ints) into
the memory of the guest. They are only available when emulating a 32-bit
CPU in the guest, so use "uint32_t" instead of "target_ulong" here.
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
From: Helge Deller
Instead of stopping the emulation, report a MEMTX_DECODE_ERROR if the OS
tries to access non-existent registers.
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
hw/pci-host/astro.c | 27 +++
1 file changed, 11 insertions(+), 16
From: Helge Deller
Firmware and qemu reads and writes the MAC address for the LASI LAN via
registers in LASI. Allow those accesses and return zero even if LASI
LAN isn't enabled to avoid HPMCs (=crashes).
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 2 ++
1 file changed, 2 insertions(+)
From: Helge Deller
For debugging purposes at the early stage of the bootup process,
the SeaBIOS-hppa firmware sometimes needs to output characters to the
serial console. Note that the serial console is the default output
method for parisc machines.
At this stage PCI busses and other devices
From: Helge Deller
Linux writes zeroes at bootup into the default ports for LASI audio and
LASI floppy controller to reset those devices. Allow writing to those
registers to avoid HPMCs.
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 11 +++
include/hw/misc/lasi.h | 2 ++
From: Helge Deller
Load the 64-bit SeaBIOS-hppa firmware by default when running on a 64-bit
machine. This will enable us to later support more than 4GB of RAM and is
required that the OS (or PALO bootloader) will start or install a 64-bit kernel
instead of a 32-bit kernel.
Note that
From: Helge Deller
The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode.
Hard fail means the system bus will send an HPMC (=crash) to the
processor, soft fail means the system bus will ignore timeouts of
MMIO-reads or MMIO-writes and return -1ULL.
The HF mode is controlled by a
From: Sven Schnelle
Netbsd isn't able to detect a link on the emulated tulip card. That's
because netbsd reads the Chip Status Register of the Phy (address
0x14). The default phy data in the qemu tulip driver is all zero,
which means no link is established and autonegotation isn't complete.
From: Helge Deller
The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440:
Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into
staging (2024-02-03 13:31:58 +)
are available in the Git repository at:
https://github.com/hdeller/qemu-hppa.git
From: Helge Deller
Add disassembly of opcodes for "HALT QEMU", "RESET QEMU" and
"RESTORE SHR" (restore shadow registers).
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
disas/hppa.c | 4
1 file changed, 4 insertions(+)
diff --git a/disas/hppa.c b/disas/hppa.c
index
On 2/11/24 19:49, Michael Tokarev wrote:
11.02.2024 15:29, del...@kernel.org
From: Helge Deller
SeaBIOS-hppa version 16 news & enhancements:
pc-bios/hppa-firmware.img | Bin 163324 -> 167820 bytes
pc-bios/hppa-firmware64.img | Bin 0 -> 206024 bytes
roms/seabios-hppa | 2
On 2/12/24 22:16, Peter Maydell wrote:
On Sun, 11 Feb 2024 at 12:30, wrote:
From: Helge Deller
The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440:
Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into
staging (2024-02-03 13:31:58 +)
are
On 2/9/24 01:35, Chinmay Rath wrote:
+_tab_cy rt ra rb cy
+@Z23_tab_cy .. rt:5 ra:5 rb:5 cy:2 . _tab_cy
...
+ADDEX 01 . . . .. 10101010 - @Z23_tab_cy
...
+static bool trans_ADDEX(DisasContext *ctx, arg_Z23_tab_cy *a)
+{
+
Correct arithmetic for separating high and low
on a large negative number.
Fixes: 79ffece4447 ("tcg/arm: Implement direct branch for goto_tb")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1714
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.c.inc | 4 ++--
1 file changed, 2
On Sun, 11 Feb 2024 at 12:30, wrote:
>
> From: Helge Deller
>
> The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440:
>
> Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into
> staging (2024-02-03 13:31:58 +)
>
> are available in the Git
On Mon, 2024-02-12 at 12:16 -0800, Dionna Amalie Glaze wrote:
> This is not a patch but it felt inappropriate to derail a recent
> patch that's just refactoring the kernel-hashes object_class_property
> definition. Apologies if this has been discussed before, as I'm not
> particularly active here.
Test the lowest and the highest real-time signals.
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/multiarch/linux/linux-sigrtminmax.c | 41 +++
1 file changed, 41 insertions(+)
create mode 100644 tests/tcg/multiarch/linux/linux-sigrtminmax.c
diff --git
Some applications want to use low priority realtime signals (e.g.,
SIGRTMAX). Currently QEMU cannot map all target realtime signals to
host signals, and chooses to sacrifice the end of the target realtime
signal range.
Change this to the middle of that range, hoping that fewer applications
will
Hi,
There are apps out there that want to use SIGRTMAX, which linux-user
currently does not map to a host signal. The reason is that with the
current approach it's not possible to map all target signals, so it
was decided to sacrifice the end of the range.
In this series I propose to sacrifice
On Mon, Feb 05, 2024 at 11:11:06AM +, Richard Purdie wrote:
> On Mon, 2024-02-05 at 13:05 +1000, Richard Henderson wrote:
> > On 1/26/24 23:52, Richard Purdie wrote:
> > > On Fri, 2024-01-26 at 16:33 +0300, Michael Tokarev wrote:
> > > > 26.01.2024 16:03, Richard Purdie wrote:
> > > > > I've
This is not a patch but it felt inappropriate to derail a recent patch
that's just refactoring the kernel-hashes object_class_property
definition. Apologies if this has been discussed before, as I'm not
particularly active here.
Regarding kernel-hashes, how is that load-time information passed
Hello Alistair,
Yes, I think we should bail out if pll_set_vco_multiplier receives an invalid
value to respect the hardware defined bounds.
I actually intended to add a return there but I missed it. It will be added in
the next version.
Thanks,
Arnaud Minier
- Mail original -
De:
On 12/02/2024 17:17, Markus Armbruster wrote:
> Joao Martins writes:
>
>> Allow disabling hugepages to be dirty track at base page
>> granularity in similar vein to vfio_type1_iommu.disable_hugepages
>> but per IOAS.
>>
>> Signed-off-by: Joao Martins
>
> [...]
>
>> diff --git a/qapi/qom.json
Joao Martins writes:
> Allow disabling hugepages to be dirty track at base page
> granularity in similar vein to vfio_type1_iommu.disable_hugepages
> but per IOAS.
>
> Signed-off-by: Joao Martins
[...]
> diff --git a/qapi/qom.json b/qapi/qom.json
> index 84af23fe245d..9ad27e2b939b 100644
>
On Fri, 9 Feb 2024 at 14:07, Daniel P. Berrangé wrote:
>
> The following changes since commit 9e34f127f419b3941b36dfdfac79640dc81e97e2:
>
> Merge tag 'pull-request-2024-02-06' of https://gitlab.com/thuth/qemu into
> staging (2024-02-08 11:59:28 +)
>
> are available in the Git repository
On Fri, 9 Feb 2024 at 19:49, Alex Bennée wrote:
>
> The following changes since commit 5d1fc614413b10dd94858b07a1b2e26b1aa0296c:
>
> Merge tag 'migration-staging-pull-request' of
> https://gitlab.com/peterx/qemu into staging (2024-02-09 11:22:20 +)
>
> are available in the Git repository
On Mon, 5 Feb 2024 at 02:56, Peter Xu wrote:
> Thanks, but then this is pretty sad. I'm surprised aarch64 doesn't have
> such requirement to allow some VM config to run across all kinds of hosts.
It just hasn't been anything that anybody so far has wanted
enough to put the necessary kernel-side
On 12/02/2024 16:27, Jason Gunthorpe wrote:
> On Mon, Feb 12, 2024 at 01:56:37PM +, Joao Martins wrote:
>> There's generally two modes of operation for IOMMUFD:
>>
>> * The simple user API which intends to perform relatively simple things
>> with IOMMUs e.g. DPDK. It generally creates an IOAS
On 2/12/24 10:17, Avihai Horon wrote:
Hi Cedric,
On 07/02/2024 15:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
Add an Error** argument to vfio_migration_set_state() and adjust
callers, including vfio_save_setup(). The error will be propagated up
to
We have an OBJECT_DEFINE_TYPE_EXTENDED macro, plus several variations
on it, which emits the boilerplate for the TypeInfo and ensures it is
registered with the type system. However, all the existing macros
insist that the type being defined has its own FooClass struct, so
they aren't useful for
On 2024-02-09 18:57, Peter Maydell wrote:
On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
This series adds ARM Nested Virtualization support in KVM mode.
This is a respin of previous contributions from Miguel [1] and Haibo
[2].
This was tested with Marc's v11 [3] on Ampere HW with fedora L1
Hi Peter,
On 2/9/24 19:57, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> This series adds ARM Nested Virtualization support in KVM mode.
>> This is a respin of previous contributions from Miguel [1] and Haibo [2].
>>
>> This was tested with Marc's v11 [3] on Ampere HW
From: Vadim Shakirov
In the AIA specification in the paragraph "Virtual interrupts for VS level"
it is indicated for interrupts 13-63: if the bit in hideleg is enabled,
then the corresponding vsip and vsie bits are aliases to sip and sie
Signed-off-by: Vadim Shakirov
---
target/riscv/csr.c |
CSR hvictl (Hypervisor Virtual Interrupt Control) provides further flexibility
for injecting interrupts into VS level in situations not fully supported by the
facilities described thus far, but only with more active involvement of the
hypervisor.
(See riscv-interrupts-1.0: Interrupts at VS level)
From: Vadim Shakirov
In the AIA specification in the paragraph "Virtual interrupts for VS level"
it is indicated for interrupts 13-63: if the bit in hideleg is enabled,
then the corresponding vsip and vsie bits are aliases to sip and sie
Signed-off-by: Vadim Shakirov
---
target/riscv/csr.c |
CSR hvictl (Hypervisor Virtual Interrupt Control) provides further flexibility
for injecting interrupts into VS level in situations not fully supported by the
facilities described thus far, but only with more active involvement of the
hypervisor.
(See riscv-interrupts-1.0: Interrupts at VS level)
On Mon, Feb 12, 2024 at 01:56:41PM +, Joao Martins wrote:
> Allow disabling hugepages to be dirty track at base page
> granularity in similar vein to vfio_type1_iommu.disable_hugepages
> but per IOAS.
No objection to this, but I just wanted to observe I didn't imagine
using this option for
On 2/12/24 09:51, Avihai Horon wrote:
Hi Cedric,
On 07/02/2024 15:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
The .save_setup() handler has now an Error** argument that we can use
to propagate errors reported by the .log_global_start() handler. Do
On 2/12/24 09:43, Avihai Horon wrote:
Hi Cedric,
On 09/02/2024 12:14, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
On 2/8/24 06:48, Peter Xu wrote:
On Wed, Feb 07, 2024 at 02:33:36PM +0100, Cédric Le Goater wrote:
@@ -2936,14 +2940,14 @@ void
Fixes: 52671f69f7a4 ("[PATCH v8 0/3] Add device STM32L4x5 EXTI")
Signed-off-by: Inès Varhol
---
hw/arm/stm32l4x5_soc.c | 69 --
1 file changed, 59 insertions(+), 10 deletions(-)
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
index
This commit adds a QTest that verifies each input line of a specific
EXTI OR gate can influence the output line.
Signed-off-by: Inès Varhol
---
tests/qtest/stm32l4x5_exti-test.c | 97 +++
1 file changed, 97 insertions(+)
diff --git
The original code was connecting several outbounds qemu_irqs to the
same qemu_irq without using a TYPE_OR_IRQ.
This patch fixes the issue by using OR gates when necessary (1st commit).
I attempted to check that the problem is fixed by using a QTest (2nd commit)
but actually the test is passing
On Mon, Feb 12, 2024 at 01:56:37PM +, Joao Martins wrote:
> There's generally two modes of operation for IOMMUFD:
>
> * The simple user API which intends to perform relatively simple things
> with IOMMUs e.g. DPDK. It generally creates an IOAS and attach to VFIO
> and mainly performs IOAS_MAP
Hi All,
The continuing saga of a getting CXL emulation to play well with using the
memory as normal RAM ran into (hopefully) a last issue.
When running my boot image via virtio-blk-pci and having deliberately forced
some
buffers to end up in the CXL memory via
$ numactl --membind=1 ls
then on
On Mon, 12 Feb 2024 at 16:01, Harshit Aghera wrote:
>
> We have a Linux image targeted for architecture Cortex A7, that we are
> running inside QEMU on x86 machine.
>
>
>
> Our Linux image has I2C slave with EEPROM backend, instantiated from
> user-space. Reference - Linux I2C slave EEPROM
On Thu, Jan 04, 2024 at 03:05:27AM +, Ankit Agrawal wrote:
>
> >>
> >> -numa node,nodeid=2 -numa node,nodeid=3 -numa node,nodeid=4 \
> >> -numa node,nodeid=5 -numa node,nodeid=6 -numa node,nodeid=7 \
> >> -numa node,nodeid=8 -numa node,nodeid=9 \
> >> -device
> >>
Hello Peter
On 2/8/24 06:57, Peter Xu wrote:
On Wed, Feb 07, 2024 at 02:33:47PM +0100, Cédric Le Goater wrote:
In case of error, close_return_path_on_source() can perform a shutdown
to exit the return-path thread. However, in migrate_fd_cleanup(),
'to_dst_file' is closed before calling
We have a Linux image targeted for architecture Cortex A7, that we are running
inside QEMU on x86 machine.
Our Linux image has I2C slave with EEPROM backend, instantiated from
user-space. Reference - Linux I2C slave EEPROM backend - The Linux Kernel
On 12/02/2024 16:49, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
On 2/12/24 09:36, Avihai Horon wrote:
Hi, Cedric
On 07/02/2024 15:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
The purpose is to record a
Hello Fabiano
On 2/8/24 14:29, Fabiano Rosas wrote:
Cédric Le Goater writes:
In case of error, close_return_path_on_source() can perform a shutdown
to exit the return-path thread. However, in migrate_fd_cleanup(),
'to_dst_file' is closed before calling close_return_path_on_source()
and the
On 2/12/2024 4:24 AM, David Hildenbrand wrote:
> On 08.02.24 19:54, Steve Sistare wrote:
>> Check the status returned by migration notifiers and report errors.
>> If notifiers fail, call the notifiers again so they can clean up.
>
> IIUC, if any of the notifiers will actually start to fail, say,
On Fri, Feb 09, 2024 at 06:31:03PM +0100, Kevin Wolf wrote:
> Since commit effd60c8 changed how QMP commands are processed, the order
> of the block-commit return value and job events in iotests 144 wasn't
> fixed and more and caused the test to fail intermittently.
>
> Change the test to cache
On 2/12/24 09:36, Avihai Horon wrote:
Hi, Cedric
On 07/02/2024 15:33, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
The purpose is to record a potential error in the migration stream if
qemu_savevm_state_setup() fails. Most of the current .save_setup()
[ sorry for the earlier noise; accidentally hit "send" ]
On 2/12/24 04:32, Peter Maydell wrote:
QEMU includes some models of old Arm machine types which are
a bit problematic for us because:
* they're written in a very old way that uses numerous APIs that we
would like to get away from
On Fri, 9 Feb 2024 at 10:59, Alistair Francis wrote:
>
> The following changes since commit 03e4bc0bc02779fdf6f8e8d83197f05e70881abf:
>
> Merge tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu into
> staging (2024-02-08 16:08:42 +)
>
> are available in the Git repository at:
>
,
-.using_vnet_hdr = tap_using_vnet_hdr,
-.set_offload = tap_set_offload,
-.set_vnet_hdr_len = tap_set_vnet_hdr_len,
};
static int tap_win32_init(NetClientState *peer, const char *model,
---
base-commit: 5d1fc614413b10dd94858b07a1b2e26b1aa0296c
change-id: 20240212-tap-51087194c8eb
On 2/12/24 04:32, Peter Maydell wrote:
QEMU includes some models of old Arm machine types which are
a bit problematic for us because:
* they're written in a very old way that uses numerous APIs that we
would like to get away from (eg they don't use qdev, they use
The property 'x-pre-copy-dirty-page-tracking' allows disabling the whole
tracking of VF pre-copy phase of dirty page tracking, though it means
that it will only be used at the start of the switchover phase.
Add an option that disables the VF dirty page tracking, and fall
back into container-based
By default VFIO migration is set to auto, which will support live
migration if the migration capability is set *and* also dirty page
tracking is supported.
For testing purposes one can force enable without dirty page tracking
via enable-migration=on, but that option is generally left for testing
ioctl(iommufd, IOMMU_HWPT_SET_DIRTY_TRACKING, arg) is the UAPI that
enables or disables dirty page tracking.
It is called on the whole list of iommu domains it is are tracking,
and on failure it rolls it back.
Signed-off-by: Joao Martins
---
backends/iommufd.c | 19 +++
Probe hardware dirty tracking support by querying device hw capabilities
via IOMMUFD_GET_HW_INFO.
In preparation to using the dirty tracking UAPI, request dirty tracking in
the HWPT flags when the device doesn't support dirty page tracking or has
it disabled; or when support when the VF backing
Allow disabling hugepages to be dirty track at base page
granularity in similar vein to vfio_type1_iommu.disable_hugepages
but per IOAS.
Signed-off-by: Joao Martins
---
backends/iommufd.c | 36
backends/trace-events| 1 +
hw/vfio/iommufd.c
ioctl(iommufd, IOMMU_HWPT_GET_DIRTY_BITMAP, arg) is the UAPI
that fetches the bitmap that tells what was dirty in an IOVA
range.
A single bitmap is allocated and used across all the hwpts
sharing an IOAS which is then used in log_sync() to set Qemu
global bitmaps.
Signed-off-by: Joao Martins
The new helper will fetch vendor agnostic IOMMU capabilities supported
both by hardware and software. Right now it is only iommu dirty
tracking.
Signed-off-by: Joao Martins
---
backends/iommufd.c | 25 +
include/sysemu/iommufd.h | 2 ++
2 files changed, 27
This small series adds support for Dirty Tracking in IOMMUFD backend.
The sole reason I still made it RFC is because of the second patch,
where we are implementing user-managed auto domains.
In essence it is quite similar to the original IOMMUFD series where we
would allocate a HWPT, until we
There's generally two modes of operation for IOMMUFD:
* The simple user API which intends to perform relatively simple things
with IOMMUs e.g. DPDK. It generally creates an IOAS and attach to VFIO
and mainly performs IOAS_MAP and UNMAP.
* The native IOMMUFD API where you have fine grained
(+Michael)
ping
https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/
чт, 25 янв. 2024 г. в 23:06, Nikita Ostrenkov :
> ping
> https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/
>
> пн, 18 дек. 2023 г., 13:40 Nikita Ostrenkov :
>
>> ping
>>
On 2/8/24 14:57, Fabiano Rosas wrote:
Cédric Le Goater writes:
On 2/8/24 14:07, Fabiano Rosas wrote:
Cédric Le Goater writes:
close_return_path_on_source() retrieves the migration error from the
the QEMUFile '->to_dst_file' to know if a shutdown is required. This
shutdown is required to
On Fri, 09 Feb 2024 03:12:40 +0900,
Philippe Mathieu-Daudé wrote:
>
> We should not wire IRQs on unrealized device.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/sh4/r2d.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
> index
QEMU includes some models of old Arm machine types which are
a bit problematic for us because:
* they're written in a very old way that uses numerous APIs that we
would like to get away from (eg they don't use qdev, they use
qemu_system_reset_request(), they use vmstate_register(), etc)
*
A common pattern is seen where a timer fires, the callback does some
work, then rearms the timer which implicitly calls qemu_notify_event().
qemu_notify_event() is supposed to interrupt the main loop's poll() by
calling qemu_bh_schedule(). In the case that this is being called from a
main loop
On Fri, 09 Feb 2024 03:12:36 +0900,
Philippe Mathieu-Daudé wrote:
>
> Instead of filling an array of all the possible IRQs, only call
> qdev_get_gpio_in() when an IRQ is used. Remove the array from
> RX62NState. Doing so we avoid calling qdev_get_gpio_in() on an
> unrealized device.
>
>
On Fri, 09 Feb 2024 03:12:35 +0900,
Philippe Mathieu-Daudé wrote:
>
> "qemu/units.h" is not used in the "hw/rx/rx62n.h"
> header, include it in the source where it is.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/rx/rx62n.h | 1 -
> hw/rx/rx-gdbsim.c | 1 +
> hw/rx/rx62n.c
Hi > How can we test it? Is there any distribution producing kernel for
> Octeon+/2? Per https://github.com/MarvellEmbeddedProcessors/marvell-dpdk
> I understand there could be Linux and FreeBSD, is that correct?Actually I
> don't know how to fully test each intruction.
To the best of my
Release VFs failed to realize just as we do in unregister_vfs().
Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization
(SR/IOV)")
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/pci/pcie_sriov.c
1 - 100 of 164 matches
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