[PATCH 08/14] target/s390x: Split per_breaking_event from per_branch_*

The breaking-event-address register is updated regardless of PER being enabled. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/s390x/tcg/translate.c

[PATCH 11/14] target/s390x: Fix helper_per_ifetch flags

CPU state is read on the exception path. Fixes: 83bb161299c ("target-s390x: PER instruction-fetch nullification event support") Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/helper.h

[PATCH 07/14] target/s390x: Simplify help_branch

Always use a tcg branch, instead of movcond. The movcond was not a bad idea before PER was added, but since then we have either 2 or 3 actions to perform on each leg of the branch, and multiple movcond is inefficient. Reorder the taken branch to be fallthrough of the tcg branch. Reviewed-by:

[PATCH 01/14] target/s390x: Do not use unwind for per_check_exception

Using exception unwind via tcg_s390_program_interrupt, we discard the current value of psw.addr, which discards the result of a branch. Pass in the address of the next instruction, which may not be sequential. Pass in ilen, which we would have gotten from unwind and is passed to the exception

[PATCH 03/14] target/s390x: Update CR9 bits

Update from the PoO 14th edition. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 18 +++--- target/s390x/tcg/misc_helper.c | 2 +- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index

[PATCH 13/14] target/s390x: Adjust check of noreturn in translate_one

If help_op is not set, ret == DISAS_NEXT. Shift the test up from surrounding help_wout, help_cout to skipping to out, as we do elsewhere in the function. Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff

[PATCH 05/14] target/s390x: Disable conditional branch-to-next for PER

For PER, we require a conditional call to helper_per_branch for the conditional branch. Fold the remaining optimization into a call to helper_goto_direct, which will take care of the remaining gbea adjustment. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson ---

[PATCH 12/14] target/s390x: Simplify per_ifetch, per_check_exception

Set per_address and ilen in per_ifetch; this is valid for all PER exceptions and will last until the end of the instruction. Therefore we don't need to give the same data to per_check_exception. Signed-off-by: Richard Henderson # Conflicts: # target/s390x/tcg/misc_helper.c ---

[PATCH 09/14] target/s390x: Raise exception from helper_per_branch

Drop from argument, since gbea has always been updated with this address. Add ilen argument for setting int_pgm_ilen. Use update_cc_op before calling per_branch. By raising the exception here, we need not call per_check_exception later, which means we can clean up the normal non-exception branch

[PATCH 14/14] tests/tcg/s390x: Add per.S

Add a small test to avoid regressions. Signed-off-by: Richard Henderson --- tests/tcg/s390x/Makefile.softmmu-target | 1 + tests/tcg/s390x/per.S | 82 + 2 files changed, 83 insertions(+) create mode 100644 tests/tcg/s390x/per.S diff --git

[PATCH 06/14] target/s390x: Introduce help_goto_indirect

Add a small helper to handle unconditional indirect jumps. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git

[PATCH 04/14] target/s390x: Record separate PER bits in TB flags

Record successful-branching, instruction-fetching, and store-using-real-address. The other PER bits are not used during translation. Having checked these at translation time, we can remove runtime tests from the helpers. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 42

[PATCH 10/14] target/s390x: Raise exception from per_store_real

At this point the instruction is complete and there's nothing left to do but raise the exception. With this change we need not make two helper calls for this event. Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 +- target/s390x/tcg/misc_helper.c | 4 +++-

[PATCH 02/14] target/s390x: Move cpu_get_tb_cpu_state out of line

Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 23 ++- target/s390x/cpu.c | 22 ++ 2 files changed, 24 insertions(+), 21 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 414680eed1..950f84f316 100644 ---

[PATCH 00/14] target/s390x: Fix and improve PER

Split out from v1: https://lore.kernel.org/qemu-devel/20220906101747.344559-1-richard.hender...@linaro.org/ v4: https://lore.kernel.org/qemu-devel/20230220184052.163465-1-richard.hender...@linaro.org/ after I noticed that the testcase,

[PATCH v1 1/2] tests/qtest/bios-tables-test: Update virt SPCR golden references

Update the virt SPCR golden reference files to accommodate the SPCR Table version 4 [1], utilizing the iasl binary compiled from the latest ACPICA repository [2]. The SPCR table has been modified to adhere to the version 4 format [3]. [1]:

[PATCH v1 0/2] Upgrade ACPI SPCR table to support SPCR table version 4 format

Update the SPCR table to accommodate the SPCR Table version 4 [1]. The SPCR table has been modified to adhere to the version 4 format [2]. Meanwhile, the virt SPCR golden reference files have been updated to accommodate the SPCR Table version 4. [1]:

[PATCH v1 2/2] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format

Update the SPCR table to accommodate the SPCR Table version 4 [1]. The SPCR table has been modified to adhere to the version 4 format [2]. [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table [2]: https://github.com/acpica/acpica/pull/931

Re: [PATCH intel_iommu 0/7] FLTS for VT-d

Hi Zhenzhong, I will rebase, thanks On 01/05/2024 14:40, Duan, Zhenzhong wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > Ah, this is a duplicate effort on stage-1 translation. > > Hi

QEMU headers in C++

Hi QEMU, I work in Android Studio Emulator and we would like to develop devices in C++. Unfortunately, QEMU headers cannot be used with C++ as is (e.g. they use C++ keywords as variable names or implicitly cast void* to T*). Will QEMU be open to accept patches from us to make QEMU headers C++

Re: [PULL 00/20] tcg patch queue

at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240501 for you to fetch changes up to 917d7f8d948d706e275c9f33169b9dd0149ded1e: plugins: Update the documentation block for plugin-gen.c (2024-04-30 16:12:05 -0700) plugins

[PATCH v2 01/28] target/ppc: Fix gen_sc to use correct nip

Most exceptions are raised with nip pointing to the faulting instruction but the sc instruction generating a syscall exception leaves nip pointing to next instruction. Fix gen_sc to not use gen_exception_err() which sets nip back but correctly set nip to pc_next so we don't have to patch this in

[PATCH v2 26/28] target/ppc/mmu_common.c: Move BookE MMU functions together

Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 300 1 file changed, 150 insertions(+), 150 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index b76611da80..204b8af455 100644 --- a/target/ppc/mmu_common.c +++

[PATCH v2 18/28] target/ppc/mmu_common.c: Deindent ppc_jumbo_xlate()

Instead of putting a large block of code in an if, invert the condition and return early to be able to deindent the code block. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 319 1 file changed, 159 insertions(+), 160 deletions(-) diff

[PATCH v2 28/28] target/ppc: Split off common 4xx TLB init

Several 4xx related CPUs have the same TLB settings. Split it off in a common function in cpu_init. Signed-off-by: BALATON Zoltan --- target/ppc/cpu_init.c | 46 --- 1 file changed, 17 insertions(+), 29 deletions(-) diff --git a/target/ppc/cpu_init.c

[PATCH v2 10/28] target/ppc/mmu_common.c: Introduce mmu6xx_get_physical_address()

Repurpose get_segment_6xx_tlb() to do the whole address translation for POWERPC_MMU_SOFT_6xx MMU model by moving the BAT check there and renaming it to match other similar functions. These are only called once together so no need to keep these separate functions and combining them simplifies the

[PATCH v2 07/28] target/ppc/mmu_common.c: Remove unneeded local variable

In mmubooke_check_tlb() and mmubooke206_check_tlb() we can assign the value directly the the destination, no need to have a separate local variable for it. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 30 +- 1 file changed, 13 insertions(+), 17

[PATCH v2 05/28] target/ppc/mmu_common.c: Move calculation of a value closer to its usage

In mmubooke_check_tlb() prot2 is calculated first but only used after an unrelated check that can return before tha value is used. Move the calculation after the check, closer to where it is used, to keep them together and avoid computing it when not needed. Signed-off-by: BALATON Zoltan ---

[PATCH v2 04/28] target/ppc: Remove unused helper

The helper_rac function is defined but not used, remove it. Fixes: 005b69fdcc (target/ppc: Remove PowerPC 601 CPUs) Signed-off-by: BALATON Zoltan --- target/ppc/helper.h | 2 -- target/ppc/mmu_helper.c | 24 2 files changed, 26 deletions(-) diff --git

[PATCH v2 19/28] target/ppc/mmu_common.c: Replace hard coded constants in ppc_jumbo_xlate()

The "2" in booke206_update_mas_tlb_miss() call corresponds to MMU_INST_FETCH which is the value of access_type in this branch; mmubooke206_esr() only checks for MMU_DATA_STORE and it's called from code access so using MMU_DATA_LOAD here seems wrong so replace it with access_type here as well that

[PATCH v2 11/28] target/ppc/mmu_common.c: Rename get_bat_6xx_tlb()

Rename to ppc6xx_tlb_get_bat() to match other similar names in the same file. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index ef1669b01d..a069e4083f 100644

[PATCH v2 24/28] target/ppc/mmu_common.c: Remove BookE handling from get_physical_address_wtlb()

This function is no longer called for BookE MMU model so remove parts related to it. This has uncovered a few may be used uninitialised warnings that are also fixed. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 25 + 1 file changed, 5 insertions(+), 20

[PATCH v2 17/28] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls

Fix several qemu_log_mask() calls that are misindented. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 42 - 1 file changed, 20 insertions(+), 22 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index

[PATCH v2 02/28] target/ppc: Move patching nip from exception handler to helper_scv

From: Nicholas Piggin Unlike sc, for scv a facility unavailable interrupt must be generated if FSCR[SCV]=0 so we can't raise the exception with nip set to next instruction but we can move advancing nip if the FSCR check passes to helper_scv so the exception handler does not need to change it.

[PATCH v2 13/28] target/ppc/mmu_common.c: Split off real mode cases in get_physical_address_wtlb()

The real mode handling is identical in the remaining switch cases. Split off these common real mode cases into a separate conditional to leave only the else branches in the switch that are different. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 34

[PATCH v2 16/28] target/ppc/mmu_common.c: Simplify mmubooke206_get_physical_address()

This function is similar to mmubooke_get_physical_address() and can be simplified the same way. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 28 ++-- 1 file changed, 10 insertions(+), 18 deletions(-) diff --git a/target/ppc/mmu_common.c

[PATCH v2 27/28] target/ppc: Remove id_tlbs flag from CPU env

This flag for split instruction/data TLBs is only set for 6xx soft TLB MMU model and not used otherwise so no need to have a separate flag for that. Signed-off-by: BALATON Zoltan --- hw/ppc/pegasos2.c| 2 +- target/ppc/cpu.h | 1 - target/ppc/cpu_init.c| 19

[PATCH v2 14/28] target/ppc/mmu_common.c: Inline and remove check_physical()

This function just does two assignments and and unnecessary check that is always true so inline it in the only caller left and remove it. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 26 +++--- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git

[PATCH v2 08/28] target/ppc/mmu_common.c: Simplify checking for real mode

In get_physical_address_wtlb() the real_mode flag depends on either the MSR[IR] or MSR[DR] bit depending on access_type. Extract just the needed bit in a more straight forward way instead of doing unnecessary computation. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 6 -- 1

[PATCH v2 06/28] target/ppc/mmu_common.c: Move calculation of a value closer to its usage

In mmubooke206_check_tlb() prot2 is calculated first but only used after an unrelated check that can return before tha value is used. Move the calculation after the check, closer to where it is used, to keep them together and avoid computing it when not needed. Signed-off-by: BALATON Zoltan ---

[PATCH v2 15/28] target/ppc/mmu_common.c: Simplify mmubooke_get_physical_address()

Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 25 + 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index fab86a8f3e..760e4072b2 100644 --- a/target/ppc/mmu_common.c +++

[PATCH v2 23/28] target/ppc/mmu_common.c: Split off BookE handling from ppc_jumbo_xlate()

Introduce ppc_booke_xlate() to handle BookE and BookE 2.06 cases to reduce ppc_jumbo_xlate() further. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 180 ++-- 1 file changed, 138 insertions(+), 42 deletions(-) diff --git

[PATCH v2 00/28] Misc PPC exception and BookE MMU clean ups

This series does some further clean up mostly around BookE MMU to untangle it from other MMU models. It also contains some other changes that I've come up with while working on this. The first 3 patches are from the last exception handling clean up series that were dropped due to some error on CI

[PATCH v2 09/28] target/ppc/mmu_common.c: Drop cases for unimplemented MPC8xx MMU

The default case will catch this and abort the same way and there is still a warning about it in ppc_tlb_invalidate_all() so drop these from mmu_common.c to simplify this code. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 9 - 1 file changed, 9 deletions(-) diff --git

[PATCH v2 25/28] target/ppc/mmu_common.c: Simplify ppc_booke_xlate()

Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 147 +++- 1 file changed, 56 insertions(+), 91 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index d61c41d8c9..b76611da80 100644 --- a/target/ppc/mmu_common.c +++

[PATCH v2 20/28] target/ppc/mmu_common.c: Make get_physical_address_wtlb() static

This function is not used from any other files so make it static and fix the maybe used uninitialised warnings this has uncovered. Signed-off-by: BALATON Zoltan --- target/ppc/internal.h | 5 + target/ppc/mmu_common.c | 5 - 2 files changed, 5 insertions(+), 5 deletions(-) diff --git

[PATCH v2 22/28] target/ppc: Remove ppc_hash32_pp_prot() and reuse common function

The ppc_hash32_pp_prot() function in mmu-hash32.c is the same as pp_check() in mmu_common.c. Rename the latter to ppc_pte_prot() and merge with ppc_hash32_pp_prot() to remove duplicated code. Signed-off-by: BALATON Zoltan --- target/ppc/internal.h | 2 +- target/ppc/mmu-hash32.c | 47

[PATCH v2 21/28] target/ppc: Move mmu_ctx_t definition to mmu_common.c

This type is only used within mmu_common.c. Move its definition from internal.h to there. Signed-off-by: BALATON Zoltan --- target/ppc/internal.h | 12 target/ppc/mmu_common.c | 11 +++ 2 files changed, 11 insertions(+), 12 deletions(-) diff --git a/target/ppc/internal.h

[PATCH v2 12/28] target/ppc/mmu_common.c: Split out BookE cases before checking real mode

BookE does not have real mode so split off and handle it first in get_physical_address_wtlb() before checking for real mode for other MMU models. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git

[PATCH v2 03/28] target/ppc: Simplify syscall exception handlers

After previous changes the hypercall handling in 7xx and 74xx exception handlers can be folded into one if statement to simplify this code. Also add "unlikely" to mark the less frequently used branch for the compiler. Signed-off-by: BALATON Zoltan Reviewed-by: Harsh Prateek Bora ---

Re: [RFC 1/2] iova_tree: add an id member to DMAMap

On 4/30/2024 10:19 AM, Eugenio Perez Martin wrote: On Tue, Apr 30, 2024 at 7:55 AM Si-Wei Liu wrote: On 4/29/2024 1:14 AM, Eugenio Perez Martin wrote: On Thu, Apr 25, 2024 at 7:44 PM Si-Wei Liu wrote: On 4/24/2024 12:33 AM, Eugenio Perez Martin wrote: On Wed, Apr 24, 2024 at 12:21 AM

Re: [RFC 1/2] iova_tree: add an id member to DMAMap

On 4/30/2024 11:11 AM, Eugenio Perez Martin wrote: On Mon, Apr 29, 2024 at 1:19 PM Jonah Palmer wrote: On 4/29/24 4:14 AM, Eugenio Perez Martin wrote: On Thu, Apr 25, 2024 at 7:44 PM Si-Wei Liu wrote: On 4/24/2024 12:33 AM, Eugenio Perez Martin wrote: On Wed, Apr 24, 2024 at 12:21 

Re: [PATCH v7 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

Hi Markus, Michael and Jonathan, FYI. I have updated this patch based on the feedbacks so far, and posted here: https://lore.kernel.org/linux-cxl/20240418232902.583744-1-fan...@samsung.com/T/#ma25b6657597d39df23341dc43c22a8c49818e5f9 Comments are welcomed and appreciated. Fan On Wed, May 01,

Re: [PATCH v7 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

>From 873f59ec06c38645768ada452d9b18920a34723e Mon Sep 17 00:00:00 2001 From: Fan Ni Date: Tue, 20 Feb 2024 09:48:31 -0800 Subject: [PATCH] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents Status: RO Content-Length: 25172 Lines: 731 To simulate FM functionalities for

Re: [PULL 0/1] ufs queue

On 4/28/24 20:25, Jeuk Kim wrote: From: Jeuk Kim The following changes since commit fd87be1dada5672f877e03c2ca8504458292c479: Merge tag 'accel-20240426' ofhttps://github.com/philmd/qemu into staging (2024-04-26 15:28:13 -0700) are available in the Git repository at:

Re: [PULL 0/9] QGA misc changes for 2024-05-01

On 5/1/24 00:43, Konstantin Kostiuk wrote: The following changes since commit 9c6c079bc6723da8061ccfb44361d67b1dd785dd: Merge tag 'pull-target-arm-20240430' ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-04-30 09:58:54 -0700) are available in the Git repository at:

Re: [PATCH v4 17/17] hw/arm: xen: Enable use of grant mappings

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- > hw/arm/xen_arm.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.c > index

Re: [PATCH v4 15/17] xen: mapcache: Remove assumption of RAMBlock with 0 offset

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > The current mapcache assumes that all memory is mapped > in a single RAM MR (the first one with offset 0). Remove > this assumption and propagate the offset to the mapcache > so it can do reverse mappings (from hostptr

Re: [PATCH v4 14/17] xen: Add xen_mr_is_memory()

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Add xen_mr_is_memory() to abstract away tests for the > xen_memory MR. > > Signed-off-by: Edgar E. Iglesias There is an important change in this patch below > --- > hw/xen/xen-hvm-common.c | 8 +++- >

Re: [PATCH v4 13/17] softmmu: Pass RAM MemoryRegion and is_write xen_map_cache()

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Propagate MR and is_write to xen_map_cache(). > This is in preparation for adding support for grant mappings. > > No functional change. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > ---

Re: [PATCH v4 12/17] xen: mapcache: Unmap first entries in buckets

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > When invalidating memory ranges, if we happen to hit the first > entry in a bucket we were never unmapping it. This was harmless > for foreign mappings but now that we're looking to reuse the > mapcache for transient

Re: [PATCH v4 11/17] xen: mapcache: Make MCACHE_BUCKET_SHIFT runtime configurable

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Make MCACHE_BUCKET_SHIFT runtime configurable per cache instance. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- > hw/xen/xen-mapcache.c | 52

Re: [PATCH v4 10/17] xen: mapcache: Break out xen_map_cache_init_single()

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Break out xen_map_cache_init_single() in preparation for > adding multiple map caches. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- > hw/xen/xen-mapcache.c | 53

Re: [PATCH v4 09/17] xen: mapcache: Break out xen_invalidate_map_cache_single()

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Break out xen_invalidate_map_cache_single(). > > No functional changes. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- > hw/xen/xen-mapcache.c | 25 +++-- > 1

Re: [PATCH v4 08/17] xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Add MapCache argument to xen_invalidate_map_cache_entry_unlocked. > This is in preparation for supporting multiple map caches. > > No functional changes. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano

Re: [PATCH v4 07/17] xen: mapcache: Refactor xen_replace_cache_entry_unlocked

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Add MapCache argument to xen_replace_cache_entry_unlocked in > preparation for supporting multiple map caches. > > No functional change. > > Signed-off-by: Edgar E. Iglesias > --- > hw/xen/xen-mapcache.c | 8

Re: [PATCH v4 06/17] xen: mapcache: Break out xen_ram_addr_from_mapcache_single

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Break out xen_ram_addr_from_mapcache_single(), a multi-cache > aware version of xen_ram_addr_from_mapcache. > > No functional changes. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- >

Re: [PATCH v4 05/17] xen: mapcache: Refactor xen_remap_bucket for multi-instance

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Add MapCache argument to xen_remap_bucket in preparation > to support multiple map caches. > > No functional changes. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- >

Re: [PATCH v4 04/17] xen: mapcache: Refactor xen_map_cache for multi-instance

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Make xen_map_cache take a MapCache as argument. This is in > prepaparation to support multiple map caches. > > No functional changes. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- >

Re: [PATCH v4 03/17] xen: mapcache: Refactor lock functions for multi-instance

On Tue, 30 Apr 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Make the lock functions take MapCache * as argument. This is > in preparation for supporting multiple caches. > > No functional changes. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > ---

Re: [PATCH v4 00/14] Use Intel DSA accelerator to offload zero page checking in multifd live migration.

On Thu, Apr 25, 2024 at 02:21:03AM +, Hao Xiang wrote: > 7. Added a new migration option multifd-normal-page-ratio to make > multifd live migration easier to test. Setting a normal page ratio will > make live migration recognize a zero page as a normal page and send > the entire payload over

Re: [PATCH v9 09/11] virtio-gpu: Register capsets dynamically

On 5/1/24 22:38, Dmitry Osipenko wrote: > On 5/1/24 22:31, Dmitry Osipenko wrote: >> On 4/27/24 10:12, Akihiko Odaki wrote:   int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g)   {   uint32_t capset2_max_ver, capset2_max_size; + +    if (g->capset_ids) { >>> >>> Move

Re: [PATCH v9 09/11] virtio-gpu: Register capsets dynamically

On 5/1/24 22:31, Dmitry Osipenko wrote: > On 4/27/24 10:12, Akihiko Odaki wrote: >>>   int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) >>>   { >>>   uint32_t capset2_max_ver, capset2_max_size; >>> + >>> +    if (g->capset_ids) { >> >> Move capset_ids initialization to

Re: [PATCH v4 11/14] migration/multifd: Add migration option set packet size.

On Thu, Apr 25, 2024 at 02:21:14AM +, Hao Xiang wrote: > The current multifd packet size is 128 * 4kb. This change adds > an option to set the packet size. Both sender and receiver needs > to set the same packet size for things to work. > > Signed-off-by: Hao Xiang > --- >

Re: [PATCH v9 09/11] virtio-gpu: Register capsets dynamically

On 4/27/24 10:12, Akihiko Odaki wrote: >>   int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g) >>   { >>   uint32_t capset2_max_ver, capset2_max_size; >> + >> +    if (g->capset_ids) { > > Move capset_ids initialization to virtio_gpu_virgl_init() to save this > conditional. Capsets are used

Re: [PATCH v4 10/14] migration/multifd: Enable DSA offloading in multifd sender path.

On Thu, Apr 25, 2024 at 02:21:13AM +, Hao Xiang wrote: > Multifd sender path gets an array of pages queued by the migration > thread. It performs zero page checking on every page in the array. > The pages are classfied as either a zero page or a normal page. This > change uses Intel DSA to

Re: [PATCH v8 08/11] virtio-gpu: Handle resource blob commands

On 4/27/24 08:52, Akihiko Odaki wrote: > On 2024/04/24 19:30, Dmitry Osipenko wrote: >> On 4/19/24 12:18, Akihiko Odaki wrote: @@ -61,6 +61,10 @@ struct virtio_gpu_simple_resource {    int dmabuf_fd;    uint8_t *remapped;    +    MemoryRegion *mr; +    bool

Re: [PATCH v4 09/14] migration/multifd: Prepare to introduce DSA acceleration on the multifd path.

On Thu, Apr 25, 2024 at 02:21:12AM +, Hao Xiang wrote: > 1. Refactor multifd_send_thread function. > 2. Introduce the batch task structure in MultiFDSendParams. > > Signed-off-by: Hao Xiang > --- > include/qemu/dsa.h | 51 +++-- > migration/multifd.c

Re: [PATCH v8 07/11] virtio-gpu: Support suspension of commands processing

On 4/27/24 08:48, Akihiko Odaki wrote: >> >> The VIRTIO_GPU_FILL_CMD() macro returns void and this macro is used by >> every function processing commands. Changing process_cmd() to return >> bool will require to change all those functions. Not worthwhile to >> change it, IMO. > >> The flag

Re: [PATCH v4 07/14] util/dsa: Implement DSA task asynchronous submission and wait for completion.

On Thu, Apr 25, 2024 at 02:21:10AM +, Hao Xiang wrote: > +/** > + * @brief Performs buffer zero comparison on a DSA batch task asynchronously. > + * > + * @param batch_task A pointer to the batch task. > + * @param buf An array of memory buffers. > + * @param count The number of buffers in the

[PATCH 06/14] hw/i386: convert 'i440fx' machine definitions to use new macros

This changes the DEFINE_I440FX_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. The added benefit is that it avoids the need to repeat the version number thrice in three different formats in the calls to

[PATCH 12/14] hw/ppc: remove obsolete manual deprecation reason string of spapr machines

The automatic deprecation mechanism introduced in the preceeding patches will mark every spapr machine upto and including 2.12 as deprecated. As such we can revert the manually added deprecation which was a subset: commit 1392617d35765d5d912625fbb5cab1ffbed8e140 Author: Cédric Le Goater

[PATCH 10/14] hw: set deprecation info for all versioned machine types

This calls the MACHINE_VER_DEPRECATION() macro in the definition of all machine type classes which support versioning. This ensures that they will automatically get deprecation info set when they reach the appropriate point in their lifecycle. Signed-off-by: Daniel P. Berrangé --- hw/arm/virt.c

[PATCH 14/14] docs: document special exception for machine type deprecation & removal

This extends the deprecation policy to indicate that versioned machine types will be marked deprecated after 3 years, and then subject to removal after a further 3 years has passed. Signed-off-by: Daniel P. Berrangé --- docs/about/deprecated.rst | 12 1 file changed, 12

[PATCH 11/14] hw: skip registration of outdated versioned machine types

This calls the MACHINE_VER_DELETION() macro in the machine type registration method, so that when a versioned machine type reaches the end of its life, it is no longer registered with QOM and thus cannot be used. The actual definition of the machine type should be deleted at this point, but

[PATCH 13/14] hw/i386: remove obsolete manual deprecation reason string of i440fx machines

The automatic deprecation mechanism introduced in the preceeding patches will mark every i440fx machine upto and including 2.12 as deprecated. As such we can revert the manually added deprecation which was a subset: commit c7437f0ddb8ee45bf96d949ddfcbb7697ae3d415 Author: Thomas Huth Date:

[PATCH 03/14] hw/s390x: convert 'ccw' machine definitions to use new macros

This changes the DEFINE_CCW_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. The added benefit is that it avoids the need to repeat the version number twice in two different formats in the calls to

[PATCH 04/14] hw/ppc: convert 'spapr' machine definitions to use new macros

This changes the DEFINE_SPAPR_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. The added benefit is that it avoids the need to repeat the version number twice in two different formats in the calls to

[PATCH 08/14] include/hw: add macros for deprecation & removal of versioned machines

Versioned machines live for a long time to provide back compat for incoming migration and restore of saved images. To guide users away from usage of old machines, however, we want to deprecate any older than 3 years (equiv of 9 releases), and delete any older than 6 years (equiva of 18 releases).

[PATCH 07/14] hw/i386: convert 'q35' machine definitions to use new macros

This changes the DEFINE_Q35_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. The added benefit is that it avoids the need to repeat the version number thrice in three different formats in the calls to

[PATCH 09/14] hw: temporarily disable deletion of versioned machine types

The new deprecation and deletion policy for versioned machine types is being introduced in QEMU 9.1.0. Under the new policy a number of old machine types (any prior to 2.12) would be liable for immediate deletion which would be a violation of our historical deprecation and removal policy Thus

[PATCH 05/14] hw/m68k: convert 'virt' machine definitions to use new macros

This changes the DEFINE_VIRT_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. A DEFINE_VIRT_MACHINE_AS_LATEST helper is added so that it is not required to pass 'false' for every single historical machine

[PATCH 00/14] hw: define and enforce a standard lifecycle for versioned machines

Thomas proposed a new deprecation and removal policy for versioned machine types that would see them liable for deletion after 6 years: https://lists.nongnu.org/archive/html/qemu-devel/2024-04/msg04683.html This suggest was met with broad approval, however, I suggested that we could take it

[PATCH 01/14] include/hw: add helpers for defining versioned machine types

The various targets which define versioned machine types have a bunch of obfuscated macro code for defining unique function and variable names using string concatenation. This addes a couple of helpers to improve the clarity of such code macro. Signed-off-by: Daniel P. Berrangé ---

[PATCH 02/14] hw/arm: convert 'virt' machine definitions to use new macros

This changes the DEFINE_VIRT_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. Signed-off-by: Daniel P. Berrangé --- hw/arm/virt.c | 28 +++- 1 file changed, 15 insertions(+), 13

Re: [PATCH v10 2/2] tpm: add backend for mssim

On Wed, 2024-05-01 at 13:20 -0400, Stefan Berger wrote: > > > On 5/1/24 12:52, James Bottomley wrote: > > On Wed, 2024-05-01 at 12:31 -0400, Stefan Berger wrote: > > > > > > > > > On 5/1/24 12:21, James Bottomley wrote: > > > > On Tue, 2024-04-30 at 17:12 -0400, Stefan Berger wrote: > > > > >

Re: [PATCH] target/arm: fix MPIDR value for ARM CPUs with SMT

W dniu 22.04.2024 o 17:21, Richard Henderson pisze: For Arm's CPUs they fall into two categories:   * older ones don't set MT in their MPIDR, and the Aff0     field is effectively the CPU number   * newer ones do set MT in their MPIDR, but don't have     SMT, so their Aff0 is always 0 and their

Re: [PATCH v10 2/2] tpm: add backend for mssim

On 5/1/24 12:52, James Bottomley wrote: On Wed, 2024-05-01 at 12:31 -0400, Stefan Berger wrote: On 5/1/24 12:21, James Bottomley wrote: On Tue, 2024-04-30 at 17:12 -0400, Stefan Berger wrote: On 4/30/24 15:08, James Bottomley wrote: [...] +The mssim backend supports snapshotting and

Re: [PATCH v10 2/2] tpm: add backend for mssim

On Wed, 2024-05-01 at 12:31 -0400, Stefan Berger wrote: > > > On 5/1/24 12:21, James Bottomley wrote: > > On Tue, 2024-04-30 at 17:12 -0400, Stefan Berger wrote: > > > On 4/30/24 15:08, James Bottomley wrote: > > [...] > > > > +The mssim backend supports snapshotting and migration by not > > > >

Re: [PATCH v4 13/17] softmmu: Pass RAM MemoryRegion and is_write xen_map_cache()

On Tue, Apr 30, 2024 at 06:49:35PM +0200, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Propagate MR and is_write to xen_map_cache(). > This is in preparation for adding support for grant mappings. > > No functional change. > > Signed-off-by: Edgar E. Iglesias Acked-by: Peter Xu

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