[PATCH 7/8] vga: use latches in odd/even mode too

; planar mode is how the plane is computed in read mode 0, and how the planes are masked if the aforementioned bit 2 is reset. It is almost enough to fix the game. You also need to honor byte/word mode selection, which is done in the next patch. Signed-off-by: Paolo Bonzini --- h

[PATCH 2/8] vga: introduce VGADisplayParams

The next patches will introduce more parameters that cause a full refresh. Instead of adding arguments to get_offsets and lines to update_basic_params, do everything through a struct. Signed-off-by: Paolo Bonzini --- hw/display/cirrus_vga.c | 24 +--- hw/display/vga.c| 82

[PATCH 5/8] vga: optimize horizontal pel panning in 256-color modes

Do not go through the panning buffer unless the address wraps in the middle of the line. Signed-off-by: Paolo Bonzini --- hw/display/vga-helpers.h | 12 1 file changed, 12 insertions(+) diff --git a/hw/display/vga-helpers.h b/hw/display/vga-helpers.h index 29933562c45..60ddb27d946

[PATCH 8/8] vga: sort-of implement word and double-word access modes

ndependent, chain4 does not assert anymore that the address is in range. Instead it just returns all ones and discards writes, like other modes. Signed-off-by: Paolo Bonzini --- hw/display/vga.c | 90 +++ hw/display/vga_regs.h | 4 ++ 2 files c

[PATCH 3/8] vga: mask addresses in non-VESA modes to 256k

This allows setting the start address to a high value, and reading the bottom of the screen from the beginning of VRAM. Commander Keen 4 ("Goodbye, Galaxy!") relies on this behavior. Signed-off-by: Paolo Bonzini --- hw/display/vga-helpers.h | 9 + hw/display/vga.c

[PULL 32/46] meson: move program checks together

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- meson.build | 107 +++- 1 file changed, 56 insertions(+), 51 deletions(-) diff --git a/meson.build b/meson.build index c437e9f55e6..3a1f4cbb90f 100644 --- a/meson.build +++ b

[PULL 22/46] target/i386: implement CMPccXADD

. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/cpu.c| 2 +- target/i386/tcg/decode-new.c.inc | 25 target/i386/tcg/decode-new.h | 1 + target/i386/tcg/emit.c.inc | 104 +++ target/i386/tcg/translate.c

[PULL 40/46] meson: remove OS definitions from config_targetos

CONFIG_DARWIN, CONFIG_LINUX and CONFIG_BSD are used in some rules, but only CONFIG_LINUX has substantial use. Convert them all to if...endif. Signed-off-by: Paolo Bonzini --- accel/tcg/meson.build | 4 +++- backends/meson.build | 4 +++- block/meson.build | 4 +++- fsdev/meson.build

[PULL 38/46] meson: move subdirs to "Collect sources" section

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- meson.build | 66 ++--- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/meson.build b/meson.build index 151db21c038..21335055ef8 100644 --- a/meson.build +++ b

[PULL 33/46] meson: move option validation together

Check options before compiler flags, because some compiler flags are incompatible with modules. Signed-off-by: Paolo Bonzini --- meson.build | 137 ++-- 1 file changed, 68 insertions(+), 69 deletions(-) diff --git a/meson.build b/meson.build

[PULL 39/46] meson: always probe u2f and canokey if the option is enabled

Signed-off-by: Paolo Bonzini --- meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meson.build b/meson.build index 21335055ef8..7344e363826 100644 --- a/meson.build +++ b/meson.build @@ -1828,12 +1828,12 @@ if not get_option('smartcard').auto() or have_system

[PULL 31/46] meson: add more sections to main meson.build

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- meson.build | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/meson.build b/meson.build index 6c77d9687de..c437e9f55e6 100644 --- a/meson.build +++ b/meson.build @@ -9,6 +9,10

[PULL 21/46] target/i386: introduce flags writeback mechanism

ure that decode->cc_src is written, otherwise the new assertions trigger. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/cpu.h| 1 + target/i386/tcg/decode-new.c.inc | 34 + target/i386/tcg/decode-new.h | 4 target/i3

[PULL 26/46] meson: remove unused variable

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- tests/bench/meson.build | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/bench/meson.build b/tests/bench/meson.build index 3c799dbd983..7e76338a52d 100644 --- a/tests/bench/meson.build +++ b

[PULL 43/46] meson: remove CONFIG_ALL

CONFIG_ALL is tricky to use and was ported over to Meson from the recursive processing of Makefile variables. Meson sourcesets however have all_sources() and all_dependencies() methods that remove the need for it. Signed-off-by: Paolo Bonzini --- docs/devel/build-system.rst | 15

[PULL 19/46] target/i386: move operand load and writeback out of gen_cmovcc1

ted in order to overwrite s->T0 with cpu_regs[reg] if the MOV is not performed. This only applies to the old decoder, and this code will go away soon. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 16 ++-- 1 file changed, 6 insertions(

[PULL 44/46] meson: rename config_all

config_all now lists only accelerators, rename it to indicate its actual content. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- hw/mips/meson.build | 2 +- meson.build | 16 target/arm/meson.build | 2 +- target/mips/meson.build | 2

[PULL 35/46] meson: keep subprojects together

And move away dependencies that are not subprojects anymore. Signed-off-by: Paolo Bonzini --- meson.build | 72 ++--- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/meson.build b/meson.build index 1867e0428b1..efb36c762e9 100644

[PULL 37/46] meson: move config-host.h definitions together

Signed-off-by: Paolo Bonzini --- meson.build | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/meson.build b/meson.build index 5c54441a3cd..151db21c038 100644 --- a/meson.build +++ b/meson.build @@ -40,7 +40,6 @@ qemu_moddir = get_option('libdir

[PULL 06/46] target/i386: clean up cpu_cc_compute_all

value, so remove it and clean up some lines that are not too long anymore. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 4 ++-- target/i386/tcg/cc_helper.c | 6 +++--- target/i386/tcg/fpu_helper.c | 10 -- target/i386/tcg/int_help

[PULL 28/46] Makefile: clean qemu-iotests output

Signed-off-by: Paolo Bonzini --- Makefile | 1 + configure | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 676a4a54f48..8f369903356 100644 --- a/Makefile +++ b/Makefile @@ -202,6 +202,7 @@ clean: recurse-clean ! -path ./roms/edk2

[PULL 36/46] meson: move CFI detection code with other compiler flags

Keep it together with the other compiler modes, and before dependencies. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- meson.build | 80 ++--- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/meson.build b

[PULL 46/46] meson.build: report graphics backends separately

ga support libraries. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231222114846.2850741-1-alex.ben...@linaro.org> [Remove from dependencies as suggested by Philippe. - Paolo] Signed-off-by: Paolo Bonzini --- meson.build | 8 ++-- 1 file changed, 6 insertions

[PULL 23/46] target/i386: the sgx_epc_get_section stub is reachable

The sgx_epc_get_section stub is reachable from cpu_x86_cpuid. It should not assert, instead it should just return true just like the "real" sgx_epc_get_section does when SGX is disabled. Reported-by: Vladimír Beneš Cc: qemu-sta...@nongnu.org Signed-off-by: Paolo Bonzini

[PULL 30/46] configure: unify again the case arms in probe_target_compiler

Remove assignments that match the default, and group the targets for debian-legacy-test-cross and debian-all-test-cross into a single arm. Signed-off-by: Paolo Bonzini --- configure | 87 ++- 1 file changed, 28 insertions(+), 59 deletions

[PULL 41/46] meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos

For consistency with other OSes, use if...endif for rules that are target-independent. Signed-off-by: Paolo Bonzini --- backends/meson.build | 6 -- block/meson.build| 7 +-- chardev/meson.build | 26 ++ hw/usb/meson.build | 4 +++- meson.build

[PULL 29/46] configure: remove unnecessary subshell

Do not use a subshell to hide the shadowing of $config_host_mak. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- configure | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/configure b/configure index 9885cfed792..ed2d220040d 100755

[PULL 01/46] configure: use a native non-cross compiler for linux-user

compiler setup) even when building TCG tests that are native to the host architecture. Always allow the host compiler in that case. Cc: qemu-sta...@nongnu.org Fixes: c2118e9e1ab ("configure: don't try a "native" cross for linux-user", 2023-11-23) Signed-off-by: Paolo Bonzini --

[PULL 16/46] target/i386: do not use s->tmp4 for push

Just create a temporary for the occasion. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index b79c312465b..afe0fa6c65f

[PULL 24/46] esp: check for NULL result from scsi_device_find()

Diupina Message-ID: <20231229152647.19699-1-adiup...@astralinux.ru> Signed-off-by: Paolo Bonzini --- hw/scsi/esp.c | 9 + 1 file changed, 9 insertions(+) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 9b11d8c5738..d2cae79194c 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@

[PULL 27/46] meson: use version_compare() to compare version

While a simple lexicographic comparison usually works, it is less robust than a more specific algorithm designed to compare versions. Signed-off-by: Paolo Bonzini --- qga/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qga/meson.build b/qga/meson.build index

[PULL 03/46] target/i386: speedup JO/SETO after MUL or IMUL

OF is equal to the carry flag, so use the same CCPrepare. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 8fb80011a22..a16eb8d4008

[PULL 42/46] meson: remove config_targetos

test for symbols in "when:" by computing the set of files without "strict: false". Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- chardev/meson.build| 2 +- gdbstub/meson.build| 4 ++-- meson.build| 24 +

[PULL 45/46] configure, meson: rename targetos to host_os

This variable is about the host OS, not the target. It is used a lot more since the Meson conversion, but the original sin dates back to 2003. Time to fix it. Signed-off-by: Paolo Bonzini --- accel/tcg/meson.build| 2 +- backends/meson.build | 4 +- block

[PULL 25/46] meson: fix type of "relocatable" option

Since the option is of boolean type, the default value should be a boolean rather than a string. Signed-off-by: Paolo Bonzini --- meson_options.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meson_options.txt b/meson_options.txt index c9baeda6395..0a99a059ec8 100644

[PULL 12/46] target/i386: do not decode string source/destination into decode->mem

decode->mem is only used if one operand has has_ea == true. String operations will not use decode->mem and will load A0 on their own, because they are the only case of two memory operands in a single instruction. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i3

[PULL 17/46] target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0

Create a new temporary, to ease the register allocator's work. Creation of the temporary is pushed into gen_ext_tl, which also allows NULL as the first parameter now. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 9 ++--- 1 file changed, 6

[PULL 34/46] meson: move accelerator dependency checks together

Signed-off-by: Paolo Bonzini --- meson.build | 175 +++- 1 file changed, 91 insertions(+), 84 deletions(-) diff --git a/meson.build b/meson.build index 2c6f09352c9..1867e0428b1 100644 --- a/meson.build +++ b/meson.build @@ -602,7 +602,10

[PULL 04/46] target/i386: remove unnecessary arguments from raise_interrupt

is_int is always 1, and error_code is always zero. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/excp_helper.c | 7 +++ target/i386/tcg/helper-tcg.h | 3 +-- target/i386/tcg/misc_helper.c | 2 +- 3 files changed, 5 insertions(+), 7 deletions(-) diff

[PULL 14/46] target/i386: do not clobber T0 on string operations

The new decoder would rather have the operand in T0 when expanding SCAS, rather than use R_EAX directly as gen_scas currently does. This makes SCAS more similar to CMP and SUB, in that CC_DST = T0 - T1. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg

[PULL 20/46] target/i386: adjust decoding of J operand

code. The result is that J is now the same as the I operand. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 10 -- 1 file changed, 10 deletions(-) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index

[PULL 11/46] target/i386: add X86_SPECIALs for MOVSX and MOVZX

son Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 18 ++ target/i386/tcg/decode-new.h | 4 +++ target/i386/tcg/emit.c.inc | 42 +--- 3 files changed, 40 insertions(+), 24 deletions(-) diff --git a/target/i386/tcg/decode-new.c.in

[PULL 18/46] target/i386: prepare for implementation of STOS/SCAS in new decoder

Do not use gen_op, and pull the load from the accumulator into disas_insn. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg

[PULL 02/46] target/i386: optimize computation of JL and JLE from flags

): this is OF^SF exactly. Because OF and SF are not adjacent, just place more 1 bits to the left so that the carry propagates, which means summing CC_O - CC_S. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 10 -- 1 file changed, 4 insertions(+), 6

[PULL 10/46] target/i386: rename zext0/zext2 and make them closer to the manual

and in fact are *not* filled with zeroes when loaded into s->T1. Rename the values to match the effect described in the manual, and explain better in the comments. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 16 target/i

[PULL 15/46] target/i386: split eflags computation out of gen_compute_eflags

mechanism will take care of copying the result to CC_SRC. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 28 +++- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg

[PULL 13/46] target/i386: do not clobber A0 in POP translation

The new decoder likes to compute the address in A0 very early, so the gen_lea_v_seg in gen_pop_T0 would clobber the address of the memory operand. Instead use T0 since it is already available and will be overwritten immediately after. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini

[PULL 00/46] (mostly) target/i386 and meson changes for 2023-12-31

graphics backends separately Alexandra Diupina (1): esp: check for NULL result from scsi_device_find() Paolo Bonzini (44): configure: use a native non-cross compiler for linux-user target/i386: optimize computation of JL and JLE from flags target/i386: speedup JO/SETO after

[PULL 09/46] target/i386: avoid trunc and ext for MULX and RORX

to not use tmpN* unless necessary. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/emit.c.inc | 37 + 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index

[PULL 08/46] target/i386: reimplement check for validity of LOCK prefix

The previous check erroneously allowed CMP to be modified with LOCK. Instead, tag explicitly the instructions that do support LOCK. Acked-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 17 ++--- target/i386/tcg/decode-new.h | 3

[PULL 07/46] target/i386: document more deviations from the manual

Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 12 1 file changed, 12 insertions(+) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 2bdbb1bba0f..232c6a45c96 100644 --- a/target/i386/tcg

[PULL 05/46] target/i386: remove unnecessary truncations

gen_lea_v_seg (called by gen_add_A0_ds_seg) already zeroes any bits of s->A0 beyond s->aflag. It does so before summing the segment base and, if not in 64-bit mode, also after summing it. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/emit.c.in

Re: [PATCH v2] esp: process the result of scsi_device_find()

Queued, thanks. Paolo

Re: [PATCH] tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates

Il gio 28 dic 2023, 21:45 Richard Henderson ha scritto: > On 12/28/23 23:05, Paolo Bonzini wrote: > > In the case where OR or XOR has an 8-bit immediate between 128 and 255, > we can > > operate on a low-byte register and shorten the output by two or three > bytes >

[PATCH v2] tcg/i386: convert add/sub of 128 to sub/add of -128

Extend the existing conditional that generates INC/DEC, to also swap an ADD for a SUB and vice versa when the immediate is 128. This facilitates using OPC_ARITH_EvIb instead of OPC_ARITH_EvIz. Best reviewed with "git diff -b". Signed-off-by: Paolo Bonzini --- tcg/i386/tcg-target.

[PATCH] tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates

In the case where OR or XOR has an 8-bit immediate between 128 and 255, we can operate on a low-byte register and shorten the output by two or three bytes (two if a prefix byte is needed for REX.B). Signed-off-by: Paolo Bonzini --- tcg/i386/tcg-target.c.inc | 7 +++ 1 file changed, 7

Re: [RFC PATCH] meson.build: report graphics backends

Queued with the duplication removed, thanks. Paolo

Re: [PATCH 3/5] target/i386: Fix physical address truncation

Il sab 23 dic 2023, 11:34 Michael Brown ha scritto: > I am confused by how BOUND can result in an access to a linear address > outside of the address-size range. I don't know the internals well > enough, but I'm guessing it might be in the line in helper_boundl(): > > high =

[PATCH 17/22] target/i386: extract gen_far_call/jmp, reordering temporaries

Extract the code into new functions, and swap T0/T1 so that T0 corresponds to the first immediate in the instruction stream. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 90 - 1 file changed, 50 insertions(+), 40 deletions(-) diff --git

[PATCH 09/22] target/i386: rename zext0/zext2 and make them closer to the manual

and in fact are *not* filled with zeroes when loaded into s->T1. Rename the values to match the effect described in the manual, and explain better in the comments. Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 16 target/i386/tcg/decode-new.h |

[PATCH 04/22] target/i386: remove unnecessary truncations

gen_lea_v_seg (called by gen_add_A0_ds_seg) already zeroes any bits of s->A0 beyond s->aflag. It does so before summing the segment base and, if not in 64-bit mode, also after summing it. Signed-off-by: Paolo Bonzini --- target/i386/tcg/emit.c.inc | 4 +--- target/i386/tcg/translate

[PATCH 11/22] target/i386: do not decode string source/destination into decode->mem

decode->mem is only used if one operand has has_ea == true. String operations will not use decode->mem and will load A0 on their own, because they are the only case of two memory operands in a single instruction. Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.in

[PATCH 07/22] target/i386: reimplement check for validity of LOCK prefix

The previous check erroneously allowed CMP to be modified with LOCK. Instead, tag explicitly the instructions that do support LOCK. Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 17 ++--- target/i386/tcg/decode-new.h | 3 +++ target/i386/tcg/emit.c.inc

[PATCH 12/22] target/i386: do not clobber A0 in POP translation

The new decoder likes to compute the address in A0 very early, so the gen_lea_v_seg in gen_pop_T0 would clobber the address of the memory operand. Instead use T0 since it is already available and will be overwritten immediately after. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini

[PATCH 15/22] target/i386: do not use s->tmp4 for push

Just create a temporary for the occasion. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index b79c312465b..afe0fa6c65f 100644 --- a/target/i386/tcg

[PATCH 06/22] target/i386: document more deviations from the manual

Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 12 1 file changed, 12 insertions(+) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 2bdbb1bba0f..232c6a45c96 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386

[PATCH 16/22] target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0

Create a new temporary, to ease the register allocator's work. Creation of the temporary is pushed into gen_ext_tl, which also allows NULL as the first parameter now. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions

[PATCH 13/22] target/i386: do not clobber T0 on string operations

The new decoder would rather have the operand in T0 when expanding SCAS, rather than use R_EAX directly as gen_scas currently does. This makes SCAS more similar to CMP and SUB, in that CC_DST = T0 - T1. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 45

[PATCH 05/22] target/i386: clean up cpu_cc_compute_all

so remove it and clean up some lines that are not too long anymore. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 4 ++-- target/i386/tcg/cc_helper.c | 6 +++--- target/i386/tcg/fpu_helper.c | 10 -- target/i386/tcg/int_helper.c | 8 targe

[PATCH 08/22] target/i386: avoid trunc and ext for MULX and RORX

to not use tmpN* unless necessary. Signed-off-by: Paolo Bonzini --- target/i386/tcg/emit.c.inc | 37 + 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index 98c4c9569ef..f5e44117eab 100644

[PATCH 22/22] target/i386: implement CMPccXADD

a NOP if the comparison fails. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c| 2 +- target/i386/tcg/decode-new.c.inc | 25 target/i386/tcg/decode-new.h | 1 + target/i386/tcg/emit.c.inc | 104 +++ target/i386/tcg/translate.c

[PATCH 14/22] target/i386: split eflags computation out of gen_compute_eflags

mechanism will take care of copying the result to CC_SRC. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 28 +++- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 00ed0cc9a31

[PATCH 10/22] target/i386: add X86_SPECIALs for MOVSX and MOVZX

ode in the emission functions, because the instructions do not support memory operands. However the logic is generic and applies to several more instructions such as MOVSXD (aka movslq), one-byte shift instructions, multiplications, XLAT, and indirect calls/jumps. Signed-off-by: Paolo Bonz

[PATCH 19/22] target/i386: move operand load and writeback out of gen_cmovcc1

ted in order to overwrite s->T0 with cpu_regs[reg] if the MOV is not performed. This only applies to the old decoder, and this code will go away soon. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/

[PATCH 18/22] target/i386: prepare for implementation of STOS/SCAS in new decoder

Do not use gen_op, and pull the load from the accumulator into disas_insn. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index edbad0ad746

[PATCH 03/22] target/i386: remove unnecessary arguments from raise_interrupt

is_int is always 1, and error_code is always zero. Signed-off-by: Paolo Bonzini --- target/i386/tcg/excp_helper.c | 7 +++ target/i386/tcg/helper-tcg.h | 3 +-- target/i386/tcg/misc_helper.c | 2 +- 3 files changed, 5 insertions(+), 7 deletions(-) diff --git a/target/i386/tcg

[PATCH 01/22] target/i386: optimize computation of JL and JLE from flags

): this is OF^SF exactly. Because OF and SF are not adjacent, just place more 1 bits to the left so that the carry propagates, which means summing CC_O - CC_S. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/target

[PATCH 20/22] target/i386: adjust decoding of J operand

code. The result is that J is now the same as the I operand. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 10 -- 1 file changed, 10 deletions(-) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index

[PATCH 00/22] target/i386: first part of TCG changes for 9.0

innocuous changes, and easy to bisect in case things go wrong. Paolo Paolo Bonzini (22): target/i386: optimize computation of JL and JLE from flags target/i386: speedup JO/SETO after MUL or IMUL target/i386: remove unnecessary arguments from raise_interrupt target/i386: remove unnecessary

[PATCH 21/22] target/i386: introduce flags writeback mechanism

ure that decode->cc_src is written, otherwise the new assertions trigger. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h| 1 + target/i386/tcg/decode-new.c.inc | 34 + target/i386/tcg/decode-new.h | 4 target/i386/tcg/emit.c.inc

[PATCH 02/22] target/i386: speedup JO/SETO after MUL or IMUL

OF is equal to the carry flag, so use the same CCPrepare. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 8fb80011a22..a16eb8d4008 100644 --- a/target/i386/tcg

[PATCH 3/5] target/i386: Fix physical address truncation

oject/qemu/-/issues/2040 Fixes: 4a1e9d4d11c ("target/i386: Use atomic operations for pte updates", 2022-10-18) Cc: qemu-sta...@nongnu.org Co-developed-by: Michael Brown Signed-off-by: Michael Brown Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/excp_helper.c | 11 ---

[PATCH 2/5] target/i386: check validity of VMCB addresses

the manual is not clear on that. Cc: qemu-sta...@nongnu.org Fixes: 4a1e9d4d11c ("target/i386: Use atomic operations for pte updates", 2022-10-18) Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/misc_helper.c | 3 +++ target/i386/tcg/sysemu/svm_helper.c | 27 +--

[PATCH 1/5] target/i386: mask high bits of CR3 in 32-bit mode

("target/i386: Use atomic operations for pte updates", 2022-10-18) Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/excp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_help

[PATCH 5/5] target/i386: leave the A20 bit set in the final NPT walk

tomic operations for pte updates", 2022-10-18) Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/excp_helper.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c index e

[PATCH 4/5] target/i386: remove unnecessary/wrong application of the A20 mask

. Cc: qemu-sta...@nongnu.org Fixes: 4a1e9d4d11c ("target/i386: Use atomic operations for pte updates", 2022-10-18) Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/excp_helper.c | 21 - 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/targe

[PATCH 0/5] target/i386: Fix physical address masking bugs

tests from kvm-unit-tests (which is better than nothing, still). Supersedes: <0102018c8d11471f-9a6d73eb-0c34-4f61-8d37-5a4418f9e0d7-000...@eu-west-1.amazonses.com> Paolo Bonzini (5): target/i386: mask high bits of CR3 in 32-bit mode target/i386: check validity of VMCB addresses targe

Re: [PATCH v2] target/i386: Fix physical address truncation

On Fri, Dec 22, 2023 at 5:16 PM Paolo Bonzini wrote: > > On Fri, Dec 22, 2023 at 10:04 AM Paolo Bonzini wrote: > > > If the extension is not needed, then the a20 mask isn't either. > > > > I think it is. The extension is not needed because the masking is >

Re: [PATCH v2] target/i386: Fix physical address truncation

On Fri, Dec 22, 2023 at 10:04 AM Paolo Bonzini wrote: > > If the extension is not needed, then the a20 mask isn't either. > > I think it is. The extension is not needed because the masking is > applied by either TCG (e.g. in gen_lea_v_seg_dest or gen_add_A0_im) or > mmu_transl

[PATCH] configure: use a native non-cross compiler for linux-user

compiler setup) even when building TCG tests that are native to the host architecture. Always allow the host compiler in that case. Cc: qemu-sta...@nongnu.org Fixes: c2118e9e1ab ("configure: don't try a "native" cross for linux-user", 2023-11-23) Signed-off-by: Paolo Bonzini --

Re: [PATCH v2] target/i386: Fix physical address truncation

On Thu, Dec 21, 2023 at 10:33 PM Richard Henderson wrote: > > On 12/22/23 02:49, Michael Brown wrote: > > The address translation logic in get_physical_address() will currently > > truncate physical addresses to 32 bits unless long mode is enabled. > > This is incorrect when using physical

[PATCH 06/21] configure: unify again the case arms in probe_target_compiler

Remove assignments that match the default, and group the targets for debian-legacy-test-cross and debian-all-test-cross into a single arm. Signed-off-by: Paolo Bonzini --- configure | 86 +-- 1 file changed, 27 insertions(+), 59 deletions

Re: [PATCH v2] target/i386: Fix physical address truncation

Queued, thanks. Paolo

[PATCH 13/21] meson: add more sections to main meson.build

Signed-off-by: Paolo Bonzini --- meson.build | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/meson.build b/meson.build index b5a85c4c255..b8c64c5ecf7 100644 --- a/meson.build +++ b/meson.build @@ -9,6 +9,10 @@ add_test_setup('thorough', env

[PATCH 15/21] meson: move option validation a bit closer

Not entirely possible for option that depend on compiler or dependency checks, but it's a start. Signed-off-by: Paolo Bonzini --- meson.build | 52 1 file changed, 28 insertions(+), 24 deletions(-) diff --git a/meson.build b/meson.build

[PATCH 21/21] configure, meson: rename targetos to host_os

This variable is about the host OS, not the target. It is used a lot more since the Meson conversion, but the original sin dates back to 2003. Time to fix it. Signed-off-by: Paolo Bonzini --- accel/tcg/meson.build| 2 +- backends/meson.build | 4 +- block

[PATCH 16/21] meson: separate host-specific checks from option validation

Signed-off-by: Paolo Bonzini --- meson.build | 97 +++-- 1 file changed, 50 insertions(+), 47 deletions(-) diff --git a/meson.build b/meson.build index f7e7deeabdc..e777f507ce3 100644 --- a/meson.build +++ b/meson.build @@ -602,53 +602,6

[PATCH 18/21] meson: move CFI detection code earlier

Keep it together with the other compiler modes, and before dependencies. Signed-off-by: Paolo Bonzini --- meson.build | 80 ++--- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/meson.build b/meson.build index f8d61a46ad1

[PATCH 07/21] meson: always probe u2f and canokey if the option is enabled

Signed-off-by: Paolo Bonzini --- meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meson.build b/meson.build index 6c77d9687de..de33e323d43 100644 --- a/meson.build +++ b/meson.build @@ -1759,12 +1759,12 @@ if not get_option('smartcard').auto() or have_system

[PATCH 12/21] meson: rename config_all

config_all now lists only accelerators, rename it to indicate its actual content. Signed-off-by: Paolo Bonzini --- hw/mips/meson.build | 2 +- meson.build | 16 target/arm/meson.build | 2 +- target/mips/meson.build | 2 +- tests/fp/meson.build| 2

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