The number of PIDs is in the upper 16 bits of cdw10. So we need to
right-shift by 16 bits instead of only a single bit.
Signed-off-by: Vincent Fu
---
hw/nvme/ctrl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 127c3d2383..e89f9f7808
0);
-uint8_t mo = (cdw10 & 0xff);
+uint8_t mo = cdw10 & 0xf;
switch (mo) {
case NVME_IOMS_MO_NOP:
---
base-commit: 84b0eb1826f690aa8d51984644318ee6c810f5bf
change-id: 20240506-fix-ioms-mo-97098c6c5396
Best regards,
Reviewed-by: Vincent Fu
On 5/7/24 10:05, Vincent Fu wrote:
On 5/6/24 04:06, Klaus Jensen wrote:
The Management Operation field of I/O Management Send is only 8 bits,
not 16.
Fixes: 73064edfb864 ("hw/nvme: flexible data placement emulation")
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 2 +-
1 file
