RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid
code duplication by moving the code in arm and riscv to a device specific
file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/arm/virt-acpi-build.c | 19 ++-
hw/nvram/fw_cfg-acpi.c
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
---
hw/riscv/virt.c | 25 +
include
RISC-V also needs to create the virtio in DSDT in the same way as ARM. So,
instead of duplicating the code, move this function to the device specific
file which is common across architectures.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/arm/virt-acpi-build.c| 29
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 66 +++---
1 file changed, 62 insertions(+), 4 deletions(-)
diff --git a/hw/riscv/virt-acpi-build.c b/hw
riscv-to-apply.next and added RB tags as
appropriate.
Sunil V L (12):
hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location
hw/arm/virt-acpi-build.c: Migrate virtio creation to common location
hw/riscv: virt: Make few IMSIC macros and functions public
hw/riscv
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 36
1 file changed, 36 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
Update the GPEX host bridge properties related to MMIO ranges with values
set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/riscv/virt.c | 47 -
include/hw/riscv/virt.h | 1 +
2 files changed, 33 insertions
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv
initialize these properties with correct values for the platform. This
basically allows DSDT generator code independent of the machine specific
memory map accesses.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/pci-host/gpex-acpi.c| 13 +
hw/pci-host/gpex.c | 12
Add PLIC structures for each socket in the MADT when system is configured
with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
---
hw/riscv/virt-acpi-build.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/riscv
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 36 ++--
1 file changed, 34
Add basic IO controllers and devices like PCI, VirtIO and UART in the ACPI
namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 76 --
2 files changed, 73 insertions
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
---
hw/riscv/virt-acpi-build.c | 36
RISC-V also needs to create the virtio in DSDT in the same way as ARM.
So, instead of duplicating the code, move this function to the device
specific file which is common across architectures.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Reviewed
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed-by: Andrew Jones
---
hw/riscv/virt.c | 25
With common function to add virtio in DSDT created now, update microvm
code also to use it instead of duplicate code.
Suggested-by: Andrew Jones
Signed-off-by: Sunil V L
---
hw/i386/acpi-microvm.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/hw/i386/acpi
On Mon, Oct 23, 2023 at 02:28:22PM +0200, Andrew Jones wrote:
> On Thu, Oct 19, 2023 at 06:56:38PM +0530, Sunil V L wrote:
> > RISC-V also needs to create the virtio in DSDT in the same way as ARM. So,
> > instead of duplicating the code, move this function to the device specific
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
---
hw/riscv/virt-acpi-build.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/hw
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed
initialize these properties with correct values for the platform.
This basically allows DSDT generator code independent of the machine
specific memory map accesses.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/pci-host/gpex-acpi.c| 13 +
hw/pci-host/gpex.c | 12
Add basic IO controllers and devices like PCI, VirtIO and UART in the
ACPI namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 79 --
2 files changed, 76 insertions
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/virt
Add PLIC structures for each socket in the MADT when system is
configured with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
---
hw/riscv/virt-acpi-build.c | 29
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
---
hw/riscv/virt-acpi-build.c | 66 +++---
1 file changed, 62 insertions(+), 4 deletions(-)
diff --git a/hw
Update the GPEX host bridge properties related to MMIO ranges with
values set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/riscv/virt.c | 47 -
include/hw/riscv/virt.h | 1 +
2 files changed, 33 insertions
RISC-V also needs to use the same code to create fw_cfg in DSDT. So,
avoid code duplication by moving the code in arm and riscv to a device
specific file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed
itself. This makes the code
generic instead of machine specific.
3) Added PLIC patch from Haibo.
4) Rebased to latest riscv-to-apply.next and added RB tags as
appropriate.
Sunil V L (13):
hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location
hw
On Thu, Nov 02, 2023 at 09:10:05AM -0300, Daniel Henrique Barboza wrote:
> Alistair, Sunil,
>
> This patch is breaking riscv-to-apply.next build when using 'clang' and
> --enable-debug:
>
> URCE=600 -DNCURSES_WIDECHAR=1 -DSTRUCT_IOVEC_DEFINED -MD -MQ
> libcommon.fa.p/hw_virtio_virtio-acpi.c.o
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Reviewed-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 43 ++
1 file
With common function to add virtio in DSDT created now, update microvm
code also to use it instead of duplicate code.
Suggested-by: Andrew Jones
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/i386/acpi-microvm.c | 15 ++-
1 file changed, 2
RISC-V also needs to create the virtio in DSDT in the same way as ARM.
So, instead of duplicating the code, move this function to the device
specific file which is common across architectures.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Reviewed
Update the GPEX host bridge properties related to MMIO ranges with
values set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt.c | 47
as
appropriate.
Sunil V L (13):
hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location
hw/arm/virt-acpi-build.c: Migrate virtio creation to common location
hw/i386/acpi-microvm.c: Use common function to add virtio in DSDT
hw/riscv: virt: Make few IMSIC macros and functions
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt
initialize these properties with correct values for the platform.
This basically allows DSDT generator code independent of the machine
specific memory map accesses.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
Reviewed-by: Daniel Henrique
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 36
Add PLIC structures for each socket in the MADT when system is
configured with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 35 +++
1 file changed, 35
RISC-V also needs to use the same code to create fw_cfg in DSDT. So,
avoid code duplication by moving the code in arm and riscv to a device
specific file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw
Add basic IO controllers and devices like PCI, VirtIO and UART in the
ACPI namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 79
RISC-V also needs to use the same code to create fw_cfg in DSDT. So,
avoid code duplication by moving the code in arm and riscv to a device
specific file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed
On Thu, Nov 02, 2023 at 06:00:22PM -0300, Daniel Henrique Barboza wrote:
> Sunil,
>
>
> While doing unrelated work (running Gitlab on my series built on top of
> current riscv-to-apply.next), I hit the following error:
>
> https://gitlab.com/danielhb/qemu/-/jobs/5448178994
>
> ==
>
>
Add basic IO controllers and devices like PCI, VirtIO and UART in the
ACPI namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 79
initialize these properties with correct values for the platform.
This basically allows DSDT generator code independent of the machine
specific memory map accesses.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
Reviewed-by: Daniel Henrique
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 35 +++
1 file changed, 35
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt
Add PLIC structures for each socket in the MADT when system is
configured with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
from Haibo.
4) Rebased to latest riscv-to-apply.next and added RB tags as
appropriate.
Sunil V L (13):
hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location
hw/arm/virt-acpi-build.c: Migrate virtio creation to common location
hw/i386/acpi-microvm.c: Use
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw
RISC-V also needs to create the virtio in DSDT in the same way as ARM.
So, instead of duplicating the code, move this function to the device
specific file which is common across architectures.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Reviewed
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Reviewed-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 43 ++
1 file
Update the GPEX host bridge properties related to MMIO ranges with
values set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt.c | 47
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 36
With common function to add virtio in DSDT created now, update microvm
code also to use it instead of duplicate code.
Suggested-by: Andrew Jones
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/i386/acpi-microvm.c | 15 ++-
1 file changed, 2
On Thu, Oct 26, 2023 at 10:46:56AM +0200, Andrew Jones wrote:
> On Thu, Oct 26, 2023 at 01:37:05AM +0530, Sunil V L wrote:
> > Update the RINTC structure in MADT with AIA related fields.
> >
> > Signed-off-by: Sunil V L
> > Reviewed-by: Daniel Henrique Barboza
>
On Thu, Oct 26, 2023 at 10:15:00AM +0200, Andrew Jones wrote:
> On Thu, Oct 26, 2023 at 01:37:01AM +0530, Sunil V L wrote:
> ...
> > diff --git a/hw/nvram/fw_cfg-acpi.c b/hw/nvram/fw_cfg-acpi.c
> > new file mode 100644
> > index 00..eddaffc09b
> > --- /dev/
On Thu, Oct 26, 2023 at 10:31:51AM +0200, Andrew Jones wrote:
> On Thu, Oct 26, 2023 at 01:37:09AM +0530, Sunil V L wrote:
> > MMU type information is available via MMU node in RHCT. Add this node in
> > RHCT.
> >
> > Signed-off-by: Sunil V L
> > Rev
With common function to add virtio in DSDT created now, update microvm
code also to use it instead of duplicate code.
Suggested-by: Andrew Jones
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
---
hw/i386/acpi-microvm.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions
generic instead of machine specific.
3) Added PLIC patch from Haibo.
4) Rebased to latest riscv-to-apply.next and added RB tags as
appropriate.
Sunil V L (13):
hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location
hw/arm/virt-acpi-build.c
RISC-V also needs to create the virtio in DSDT in the same way as ARM.
So, instead of duplicating the code, move this function to the device
specific file which is common across architectures.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Reviewed
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
---
hw/riscv/virt-acpi-build.c | 34
Update the GPEX host bridge properties related to MMIO ranges with
values set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
---
hw/riscv/virt.c | 47 -
include/hw/riscv/virt.h | 1 +
2
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed
RISC-V also needs to use the same code to create fw_cfg in DSDT. So,
avoid code duplication by moving the code in arm and riscv to a device
specific file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
---
hw/riscv/virt-acpi-build.c | 36 +++-
1 file changed, 35 insertions(+), 1 deletion
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed-by: Andrew Jones
---
hw/riscv/virt.c | 25
Add PLIC structures for each socket in the MADT when system is
configured with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
---
hw/riscv/virt-acpi-build.c
Add basic IO controllers and devices like PCI, VirtIO and UART in the
ACPI namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 79 --
2 files
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Reviewed-by: Andrew Jones
---
hw/riscv/virt-acpi-build.c | 43 ++
1 file changed, 39 insertions(+), 4
initialize these properties with correct values for the platform.
This basically allows DSDT generator code independent of the machine
specific memory map accesses.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
---
hw/pci-host/gpex-acpi.c| 13 +
hw/pci
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
---
hw/riscv/virt-acpi-build.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/hw
Hi Igor,
On Thu, Aug 24, 2023 at 07:59:39PM +0530, Sunil V L wrote:
> ACPI DSDT generator needs information like ECAM range, PIO range, 32-bit
> and 64-bit PCI MMIO range etc related to the PCI host bridge. Instead of
> making these values machine specific, create properties for the
and the DSDT generator can fetch
the information from the host bus itself. This makes the code
generic instead of machine specific.
3) Added PLIC patch from Haibo.
4) Rebased to latest riscv-to-apply.next and added RB tags as
appropriate.
Sunil V L (12):
hw
RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid
code duplication by moving the code in arm and riscv to a device specific
file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
---
hw/arm/virt-acpi-build.c | 19
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 36
1 file changed, 36 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 36 ++--
1 file changed, 34
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/virt-acpi-build.c | 66 +++---
1 file changed, 62 insertions(+), 4 deletions(-)
diff --git a/hw/riscv/virt-acpi-build.c b/hw
Add PLIC structures for each socket in the MADT when system is configured
with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
---
hw/riscv/virt-acpi-build.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/riscv
RISC-V also needs to create the virtio in DSDT in the same way as ARM. So,
instead of duplicating the code, move this function to the device specific
file which is common across architectures.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
---
hw/arm/virt
Add basic IO controllers and devices like PCI, VirtIO and UART in the ACPI
namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 76 --
2 files changed, 73 insertions
initialize these properties with correct values for the platform. This
basically allows DSDT generator code independent of the machine specific
memory map accesses.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/pci-host/gpex-acpi.c| 13 +
hw/pci-host/gpex.c | 12
Update the GPEX host bridge properties related to MMIO ranges with values
set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
---
hw/riscv/virt.c | 47 -
include/hw/riscv/virt.h | 1 +
2 files changed, 33 insertions
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
---
hw/riscv/virt.c | 25 +
include
On Wed, Aug 16, 2023 at 03:51:58PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 7/26/23 05:25, Igor Mammedov wrote:
> > On Tue, 25 Jul 2023 22:20:36 +0530
> > Sunil V L wrote:
> >
> > > On Mon, Jul 24, 2023 at 05:18:59PM +0200, Igor Mammedov wrote:
> &
Hi Atish,
On Tue, Jul 26, 2022 at 11:49:11PM -0700, Atish Patra wrote:
> Qemu virt machine can support few cache events and cycle/instret counters.
> It also supports counter overflow for these events.
>
> Add a DT node so that OpenSBI/Linux kernel is aware of the virt machine
> capabilities.
to support the use case when both -kernel and -pflash
are configured.
2) Refactor patches added to help (1) above.
3) Cover letter added with test instructions.
Sunil V L (3):
hw/arm,loongarch: Move load_image_to_fw_cfg() to common location
hw/riscv: virt: Move create_fw_cfg() prior
To enable both -kernel and -pflash options, the fw_cfg needs to be
created prior to loading the kernel.
Signed-off-by: Sunil V L
---
hw/riscv/virt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index ff8c0df5cd..b6bbf03f61
-mode
firmware.
Signed-off-by: Sunil V L
---
hw/riscv/boot.c | 28
hw/riscv/virt.c | 17 -
include/hw/riscv/boot.h | 1 +
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 1ae7596873
load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same
function will be required by riscv too. So, it's time to refactor and
move this function to a common path.
Signed-off-by: Sunil V L
---
hw/arm/boot.c | 49 ---
hw/loongarch
-mode
firmware.
Signed-off-by: Sunil V L
---
hw/riscv/boot.c | 28
hw/riscv/virt.c | 17 -
include/hw/riscv/boot.h | 1 +
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 1ae7596873
On Mon, Sep 05, 2022 at 10:20:40PM +0100, Peter Maydell wrote:
> On Mon, 5 Sept 2022 at 19:23, Sunil V L wrote:
> >
> > load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same
> > function will be required by riscv too. So, it's time to refactor and
&
To enable both -kernel and -pflash options, the fw_cfg needs to be
created prior to loading the kernel.
Signed-off-by: Sunil V L
---
hw/riscv/virt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index ff8c0df5cd..b6bbf03f61
load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same
function will be required by riscv too. So, it's time to refactor and
move this function to a common path.
Signed-off-by: Sunil V L
---
hw/arm/boot.c | 49 ---
hw/loongarch
comment to .h file
Changes since V1:
1) Modified code to support the use case when both -kernel and -pflash
are configured.
2) Refactor patches added to help (1) above.
3) Cover letter added with test instructions.
Sunil V L (3):
hw/arm,loongarch: Move load_image_to_fw_cfg
1 - 100 of 276 matches
Mail list logo