Re: [PATCH v3 0/3] target/riscv: Support Zve32x and Zve64x extensions

On Thu, Mar 28, 2024 at 12:25 PM Jason Chien wrote: > > This patch series adds the support for Zve32x and Zvx64x and makes vector > registers visible in GDB if any of the V/Zve*/Zvk* extensions is enabled. > > v2: > Rebase onto riscv-to-apply.next (commit 385e575). > v3: > Spuash patch 2

Re: [PATCH v3 0/3] target/riscv: Support Zve32x and Zve64x extensions

Hi Jason, We're in the middle of code freeze for the incoming 9.0 release. In this period the maintainer will only queue bug fixes. Your support is a new feature, so it'll only be pushed after the release is done. Current ETA for the release is Apr 16th if there's no rc4. A safe bet is to

Re: [PATCH v3 0/3] target/riscv: Support Zve32x and Zve64x extensions

Ping. Jason Chien 於 2024年3月28日 週四 上午10:23寫道： > This patch series adds the support for Zve32x and Zvx64x and makes vector > registers visible in GDB if any of the V/Zve*/Zvk* extensions is enabled. > > v2: > Rebase onto riscv-to-apply.next (commit 385e575). > v3: > Spuash patch 2 into

[PATCH v3 0/3] target/riscv: Support Zve32x and Zve64x extensions

This patch series adds the support for Zve32x and Zvx64x and makes vector registers visible in GDB if any of the V/Zve*/Zvk* extensions is enabled. v2: Rebase onto riscv-to-apply.next (commit 385e575). v3: Spuash patch 2 into patch 1. Spuash patch 4 into patch 3. Jason Chien (3):