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---
arch/arm/configs/mvebu_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
Applied to mvebu/boards
thx,
Jason.
diff --git a/arch/arm/configs/mvebu_defconfig
b/arch/arm/configs/mvebu_defconfig
index 43a0dbf..322baca 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch
) conflict.
thx,
Jason.
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: support for the new Armada XP development board(DB-MV784MP-GP)
arch/arm/boot/dts/armada-xp-gp.dts | 12
1 files changed, 12 insertions(+), 0 deletions(-)
Applied to mvebu/dt
thx,
Jason.
--
The Go
/boot/dts/armada-xp-db.dts | 12
1 file changed, 12 insertions(+)
Both 1 and 2 of this series applied to mvebu/dt, resolved add/add
conflicts in both (usb).
thx,
Jason.
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On Sat, Feb 16, 2013 at 02:34:47PM -0300, Ezequiel Garcia wrote:
Hi Jason,
On Sat, Feb 16, 2013 at 10:02:28AM -0500, Jason Cooper wrote:
On Wed, Feb 06, 2013 at 10:06:24AM -0300, Ezequiel Garcia wrote:
The Armada XP DB-MV784MP-GP board has an SPI flash device.
These options allow
On Wed, Feb 13, 2013 at 06:24:14AM -0300, Ezequiel Garcia wrote:
Hi Jason,
On Wed, Feb 6, 2013 at 10:28 AM, Jason Cooper ja...@lakedaemon.net wrote:
On Wed, Feb 06, 2013 at 02:16:54PM +0100, Gregory CLEMENT wrote:
On 02/06/2013 02:06 PM, Ezequiel Garcia wrote:
This is second version
:
Acked-by: Gregory Clement gregory.clem...@free-electrons.com
on the patch that didn't have yet.
Jason,
could you add this series in your incoming pull request?
That's the plan. I'm waiting for a response from Olof to see If I need
to redo /boards and /dt. In either case, my next round
/armada-xp-gp.dts | 12
1 files changed, 12 insertions(+), 0 deletions(-)
Very nice, thanks for listing the dependencies. That makes things a lot
easier on this end.
thx,
Jason.
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said there was nothing
on it. So it's not really needed to boot. I don't have a strong
opinion on it though, so =y, =m, or =n.
thx,
Jason.
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On Tue, Feb 05, 2013 at 11:27:21AM -0300, Ezequiel Garcia wrote:
On Tue, Feb 05, 2013 at 07:48:33AM -0500, Jason Cooper wrote:
Morning-ish Andrew,
On Tue, Feb 05, 2013 at 01:38:27PM +0100, Andrew Lunn wrote:
And don't forget to compile the SPI flash driver, CONFIG_MTD_M25P80=y
On Tue, Feb 05, 2013 at 05:17:01PM +0100, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Tue, 5 Feb 2013 10:31:35 -0500, Jason Cooper wrote:
One thing we've been doing a lot of with mvebu is using it for
build-testing. For that use case, since the bootloader is there, I'd
recommend
for the new devboard we should set CONFIG_RAM=n? ;-)
thx,
Jason.
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Ezequiel,
This series looks good. just a few comments:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
Hi,
This patchset adds support for the SPI controller
available in Armada 370 and Armada XP SoC.
The patches are based in Jason Cooper's mvebu/dt branch.
It probably
Ezequiel,
On Mon, Feb 04, 2013 at 04:29:15PM -0300, Ezequiel Garcia wrote:
On Mon, Feb 04, 2013 at 01:37:33PM -0500, Jason Cooper wrote:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
The patches are based in Jason Cooper's mvebu/dt branch.
It probably doesn't matter
On Thu, Dec 06, 2012 at 02:25:21PM +, Grant Likely wrote:
On Wed, 21 Nov 2012 12:23:35 -0700, Jason Gunthorpe
jguntho...@obsidianresearch.com wrote:
Support these transfer modes from the SPI layer by setting
the appropriate register bits before doing the transfer.
This was tested
-ofdev == NULL'
would do the trick for now, then at least people can test the DT vs
the platform boot.
I am hoping to have time to revise patches on Friday, I will see.
Jason: Do you have any of these possibly affected boards with a SPI
flash to test linux-next? dove, dreamplug, ts219 and lsxl
On Thu, Dec 06, 2012 at 04:49:17PM -0700, Jason Gunthorpe wrote:
Jason: Do you have any of these possibly affected boards with a SPI
flash to test linux-next? dove, dreamplug, ts219 and lsxl
Yep, dreamplug ought to do.
thx,
Jason
On Thu, Dec 06, 2012 at 06:53:11PM -0500, Jason Cooper wrote:
On Thu, Dec 06, 2012 at 04:49:17PM -0700, Jason Gunthorpe wrote:
Jason: Do you have any of these possibly affected boards with a SPI
flash to test linux-next? dove, dreamplug, ts219 and lsxl
Yep, dreamplug ought to do.
Hmm, I
On Thu, Dec 06, 2012 at 05:14:33PM -0700, Jason Gunthorpe wrote:
On Thu, Dec 06, 2012 at 06:53:11PM -0500, Jason Cooper wrote:
On Thu, Dec 06, 2012 at 04:49:17PM -0700, Jason Gunthorpe wrote:
Jason: Do you have any of these possibly affected boards with a SPI
flash to test linux-next
Support these transfer modes from the SPI layer by setting
the appropriate register bits before doing the transfer.
This was tested on the Marvell kirkwood SOC that uses this driver.
Reviewed-by: Jason Gunthorpe jguntho...@obsidianresearch.com
Signed-off-by: Rolf Manderscheid r
On Wed, Nov 21, 2012 at 12:23:35PM -0700, Jason Gunthorpe wrote:
Support these transfer modes from the SPI layer by setting
the appropriate register bits before doing the transfer.
This was tested on the Marvell kirkwood SOC that uses this driver.
Reviewed-by: Jason Gunthorpe jguntho
On Wed, Nov 21, 2012 at 02:35:52PM -0500, Jason Cooper wrote:
/* we support only mode 0, and no options */
- master-mode_bits = 0;
+ master-mode_bits = SPI_CPHA | SPI_CPOL;
The comment no longer seems valid. ;-) Also, you are unconditionally
enabling these modes. Do all users
.
Signed-off-by: Andrew Lunn and...@lunn.ch
Acked-by: Jason Cooper ja...@lakedaemon.net
---
.../devicetree/bindings/gpio/mrvl-gpio.txt | 25 +++
arch/arm/boot/dts/kirkwood.dtsi| 20 ++
arch/arm/mach-kirkwood/irq.c | 20
(KIRKWOOD_DT, Marvell Kirkwood (Flattened Device Tree))
/* Maintainer: Jason Cooper ja...@lakedaemon.net */
.map_io = kirkwood_map_io,
.init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
+ .init_irq = kirkwood_dt_init_irq,
.timer
that,
Acked-by: Jason Cooper ja...@lakedaemon.net
+ {},
+};
+
static void __init kirkwood_dt_init(void)
{
pr_info(Kirkwood: %s, TCLK=%d.\n, kirkwood_id(), kirkwood_tclk);
@@ -69,7 +74,8 @@ static void __init kirkwood_dt_init(void)
if (of_machine_is_compatible(raidsonic,ib
this). Thanks.
Other than that,
Acked-by: Jason Cooper ja...@lakedaemon.net
thx,
Jason.
help
Say 'Y' here if you want your kernel to support the
Marvell Kirkwood using flattened device tree.
@@ -80,6 +81,20 @@ config MACH_IB62X0_DT
RaidSonic IB-NAS6210 IB
for the patch series. At first glance, things look good.
I'll let this sit on the mailinglist for a few days and try to test it
early this week.
thx,
Jason.
The SPI DT patches are from Michael Walle, and have been previously
posted. I've addressed the issues raised during the review.
The SPI
comment as before regarding magic register addresses...
thx,
Jason.
{},
};
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c
b/drivers/i2c/busses/i2c-mv64xxx.c
index 4f44a33..2146984 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -18,6 +18,9
It is reasonable, looks fine to me. :-)
Jason.
Uwe Kleine-König wrote:
there are no machines in-tree that still use the driver
name as device name. So save a few bytes and remove it.
Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de
---
drivers/spi/spi_imx.c | 30
the first data received in the RX_ONLY transfer will be that
random data instead of something meaningful.
We can avoid this by inserting a Disable/Re-enable toggle of the
channel after the TX_ONLY transfer, since it purges the rx register.
Signed-off-by: Jason Wang jason77.w...@gmail.com
Tested
Uwe Kleine-König wrote:
Hi Jason,
I have performed a git pull for your repository based off 2.6.36-rc4, and
built and validated these patches on imx51_3ds board, they worked fine.
The spi flash can be read without any problems.
And your patches looks pretty good to me
[config-cs] not of the u8 config-cs.
Yes, here (cs 0) means a SPI dedicate internal CS pin, while (cs = 0)
means a GPIO act as a SPI CS pin.
Thanks,
Jason.
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Hi Uwe,
Uwe Kleine-König wrote:
Hello,
On Thu, Sep 02, 2010 at 04:39:08PM +0200, Uwe Kleine-König wrote:
Hello Jason,
Actually I would prefer our patches, but of course I'm biased :-)
I don't know how we should handle this. And Sascha is on vacation this
and next week. I
Uwe Kleine-König wrote:
Hello Jason,
I currently merge your and our patch set. Will follow up with the
result hopefully later today.
On Fri, Sep 03, 2010 at 02:22:08PM +0800, Jason Wang wrote:
@@ -52,6 +53,18 @@ static int _clk_ccgr_enable(struct clk *clk)
return 0;
}
+static
Uwe Kleine-König wrote:
Hello Jason,
On Thu, Sep 02, 2010 at 03:51:59PM +0800, Jason Wang wrote:
There are 3 SPI controllers on i.MX51, one is called CSPI and is
100% compatible with the one on i.MX35, the other two are called
eCSPI and are not compatible with existing controllers
Uwe Kleine-König wrote:
On Thu, Sep 02, 2010 at 03:52:00PM +0800, Jason Wang wrote:
i.MX51 has two eCSPI and one CSPI controllers, now add clock
definitions and registrations for these controllers.
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/mach-mx5/clock-mx51.c
Uwe Kleine-König wrote:
Hi Jason,
On Thu, Sep 02, 2010 at 03:52:01PM +0800, Jason Wang wrote:
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/devices-imx51.h | 20
2 files changed, 21 insertions
-by: Jason Wang jason77.w...@gmail.com
---
drivers/spi/spi_imx.c | 135 +++--
1 files changed, 131 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 7972e90..8d9c9da 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers
On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash,
now add iomux definitions for those used pins.
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/plat-mxc/include/mach/iomux-mx51.h |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm
A 2M bytes SPI NOR flash(sst25vf016b) is soldered on the mx51_3ds
board, Now add registration for it in the board init stage.
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/mach-mx5/board-mx51_3ds.c | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff
i.MX51 has two eCSPI and one CSPI controllers, now add clock
definitions and registrations for these controllers.
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/mach-mx5/clock-mx51.c | 79
1 files changed, 79 insertions(+), 0 deletions
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/devices-imx51.h | 20
2 files changed, 21 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-mx5/devices-imx51.h
diff --git a/arch/arm/mach-mx5
Add platform data for eCSPI2 and register it through spi_imx dynamical
register interface.
Signed-off-by: Jason Wang jason77.w...@gmail.com
---
arch/arm/mach-mx5/board-mx51_3ds.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/board
Uwe Kleine-König wrote:
Hello Jason,
On Thu, Sep 02, 2010 at 03:51:58PM +0800, Jason Wang wrote:
Some explanations:
This patchset is to add SPI support in the existing spi_imx driver for
i.MX51 and add SPI relating stuffs for mx51_3ds board level.
i.MX51 has two eCSPI controllers
Uwe Kleine-König wrote:
From: Sascha Hauer s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
Signed-off-by: Uwe Kleine-König u.kleine-koe...@pengutronix.de
---
arch/arm/mach-mx5/clock-mx51.c | 42
++
7b310e690fcccff400233a4c3340f42168016c92 Mon Sep 17 00:00:00 2001
From: Jason Wang jason77.w...@gmail.com
Date: Tue, 13 Jul 2010 18:05:59 +0800
Subject: [PATCH] spi/omap2_mcspi: disable channel after TX_ONLY transfer
in PIO mode
In TX_ONLY transfer, the spi controller will receive datas
simultaneously and hold them
time.
Regards
Roman Tereshonkov
OK, Thanks, If possible, i will ask for help from IC designers to
explain it.
Thanks,
Jason.
-Original Message-
From: ext jason [mailto:jason77.w...@gmail.com]
Sent: 13 July, 2010 16:26
To: Tereshonkov Roman (Nokia-MS/Helsinki)
Cc
roman.tereshon...@nokia.com wrote:
Hi Jason,
Your logs do not show what I wanted to see.
But what I can see now at least is the case when TX is full and RX is full at
the same time.
1. Put
dev_dbg(spi-dev, status reg: %08x\n, __raw_readl(chstat_reg));
after do and before
roman.tereshon...@nokia.com wrote:
Hi Jason,
It is a little bit hard to analyze your logs.
1. You showed the bytes read in your own way but there is the data reading in
omap2_mcspi_txrx_pio function also.
2. For your third test case. You try to read data after TX_ONLY, before
triggering
roman.tereshon...@nokia.com wrote:
Hi Jason,
Your logs do not show what I wanted to see.
But what I can see now at least is the case when TX is full and RX is full at
the same time.
1. Put
dev_dbg(spi-dev, status reg: %08x\n, __raw_readl(chstat_reg));
after do and before
roman.tereshon...@nokia.com wrote:
Hi Jason,
It is a little bit hard to analyze your logs.
1. You showed the bytes read in your own way but there is the data reading in
omap2_mcspi_txrx_pio function also.
I add polling RXS bit and read rx register after TX_ONLY and before
triggering
roman.tereshon...@nokia.com wrote:
-Original Message-
From: ext jason [mailto:jason77.w...@gmail.com]
Sent: 25 June, 2010 15:31
To: Grant Likely
Cc: Tereshonkov Roman (Nokia-D/Helsinki); davi...@pacbell.net;
[snip]
the RXS bit will be set to status register
Grant Likely wrote:
On Fri, Jun 25, 2010 at 6:05 AM, jason jason77.w...@gmail.com wrote:
roman.tereshon...@nokia.com wrote:
[snip]
-Original Message-
}
c = 0
Grant Likely wrote:
On Thu, Jun 24, 2010 at 6:12 AM, Jason Wang jason77.w...@gmail.com wrote:
In current design, the SPI channel is always enable during the period
of handling a SPI message, it is risky when more than one SPI transfer
are included in a message. Current working route like
a SPI messge which includes,
[
TX_ONLY transfer (1 byte)
RX_ONLY transfer (2 bytes)
TX_ONLY transfer (1 byte)
RX_ONLY transfer (2 bytes)
]
If we don't add disable/reenable channel between TX and RX transfers,
the RX transfer will get wrong datas sent from slave.
Signed-off-by: Jason Wang
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