and
- if (espi-tx == 0 espi-rx == 0)
- espi-fifo_level = 0;
since it's always created as 0 and is always reset to 0 by the end of a transfer
and if you like
/* is transfer finished? */
- if (espi-tx == t-len espi-rx == t-len) {
+ if
On 4/10/10, Mika Westerberg mika.westerb...@iki.fi wrote:
Can you try following with your devices?
Woo, nice one!
Same CPU usage (~57%) same throughput (315kb/s) and it's much more
elegant. :) Just using repeated interrupts to handle the last 4 words
instead of the nasty busy-wait loops seems
On Fri, Apr 09, 2010 at 06:56:49PM +0100, Martin Guy wrote:
you end up with:
while (espi-tx t-len) {
ep93xx_do_write(espi, t);
while (ep93xx_spi_read_u8(espi, SSPSR) SSPSR_BSY);
ep93xx_do_read(espi, t);
}
This makes
Hi again
I've looked at this again, and v2 does send every complete block (up
to 512 bytes) before it returns from an interrupt. If you factor out
all the conditions that always have constant values, and those that
can never happen, from the central loop:
/*
* Write as long as
Oops, I mean
- unsigned n; /* Number of bytes to send to the TX FIFO */
+ unsigned n; /* Number of words to send to the TX FIFO */
and
- n = t-len - espi-tx; /* Total number of bytes waiting to be
-* sent to the TX FIFO for this
On 4/6/10, Mika Westerberg mika.westerb...@iki.fi wrote:
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
I have another question: like the Cirrus driver, this takes 100% CPU
doing busy wait for the current transfer to complete.
I tried to find out whether the driver did
On Tue, Apr 06, 2010 at 01:50:44PM +0100, Martin Guy wrote:
On 4/6/10, Mika Westerberg mika.westerb...@iki.fi wrote:
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
I have another question: like the Cirrus driver, this takes 100% CPU
doing busy wait for the current transfer
On 4/6/10, Mika Westerberg mika.westerb...@iki.fi wrote:
I only have one ep9302 board and 2 SPI devices
If you'd like one of the MMC-only boards to test on, I can ship it to
you - please provide smail mail address by private mail if that would
be welcome
Lastly, what is the meaning of
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
On 3/25/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI
controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
On 3/25/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI
controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver
On 3/25/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI
controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode but in future we
may add
Martin Guy wrote:
On 3/25/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI
controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode but in
On 3/18/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode but in future we may add
polling
On Thu, Mar 25, 2010 at 01:49:32PM +, Martin Guy wrote:
On 3/18/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode but in future we may add
polling mode support as well.
Signed-off-by: Mika Westerberg
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