Re: replace SRP with SMR in the if_idxmap commit

2022-11-10 Thread Visa Hankala
On Thu, Nov 10, 2022 at 11:59:02PM +1000, David Gwynne wrote: > On Thu, Nov 10, 2022 at 09:04:22PM +1000, David Gwynne wrote: > > On Thu, Nov 10, 2022 at 08:10:35AM +1000, David Gwynne wrote: > > > I know what this is. The barrier at the end of if_idxmap_alloc is > > > sleeping waiting for cpus

Re: replace SRP with SMR in the if_idxmap commit

2022-11-10 Thread Hrvoje Popovski
On 10.11.2022. 14:59, David Gwynne wrote: > On Thu, Nov 10, 2022 at 09:04:22PM +1000, David Gwynne wrote: >> On Thu, Nov 10, 2022 at 08:10:35AM +1000, David Gwynne wrote: >>> I know what this is. The barrier at the end of if_idxmap_alloc is sleeping >>> waiting for cpus to run that aren't running

Re: replace SRP with SMR in the if_idxmap commit

2022-11-10 Thread David Gwynne
On Thu, Nov 10, 2022 at 09:04:22PM +1000, David Gwynne wrote: > On Thu, Nov 10, 2022 at 08:10:35AM +1000, David Gwynne wrote: > > I know what this is. The barrier at the end of if_idxmap_alloc is sleeping > > waiting for cpus to run that aren't running cos we haven't finished booting > > yet. >

Re: replace SRP with SMR in the if_idxmap commit

2022-11-10 Thread David Gwynne
On Thu, Nov 10, 2022 at 08:10:35AM +1000, David Gwynne wrote: > I know what this is. The barrier at the end of if_idxmap_alloc is sleeping > waiting for cpus to run that aren't running cos we haven't finished booting > yet. > > I'll back it out and fix it up when I'm actually awake. i woke up,

Re: replace SRP with SMR in the if_idxmap commit

2022-11-09 Thread David Gwynne
I know what this is. The barrier at the end of if_idxmap_alloc is sleeping waiting for cpus to run that aren't running cos we haven't finished booting yet. I'll back it out and fix it up when I'm actually awake. dlg > On 10 Nov 2022, at 6:28 am, Hrvoje Popovski wrote: > > Hi all, > > I've

replace SRP with SMR in the if_idxmap commit

2022-11-09 Thread Hrvoje Popovski
Hi all, I've checkout cvs half an hour ago on two boxes and both boxes won't properly boot. First one stops here ppb10 at pci1 dev 28 function 4 "Intel 8 Series PCIE" rev 0xd5: msi pci12 at ppb10 bus 13 em4 at pci12 dev 0 function 0 "Intel I350" rev 0x01: msi, address 00:25:90:5d:c9:9a em5 at