Bruce,
the following is part of a discussion in comp.arch.fpga:
.
Hi,
I would like to know what are the common methods of introducing
delays as low as 10ps between two outputs in an FPGA. I do not
currently have a
From: Brooks Shera [EMAIL PROTECTED]
Subject: [time-nuts] Oops - wrong URL for tvb plot!
Date: Mon, 9 Apr 2007 20:10:12 -0600
Message-ID: [EMAIL PROTECTED]
Tom's (tvb) plot I referred to in a previous message is at
http://www.leapsecond.com/pages/3gps/gps-adev-mdev.gif
Sorry for the
From: Dr Bruce Griffiths [EMAIL PROTECTED]
Subject: Re: [time-nuts] GPS: ADEV or MDEV?
Date: Tue, 10 Apr 2007 17:49:03 +1200
Message-ID: [EMAIL PROTECTED]
Poul-Henning Kamp wrote:
In message [EMAIL PROTECTED], Brooks Shera writes:
The impact of time averaging to suppress white phase
Hello all,
Following on from the recent discussions of Adev and Mdev, I
have been hearing about Tdev recently - is this just another
modification to the basic idea?
Thanks,
Peter
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From: Peter Vince [EMAIL PROTECTED]
Subject: [time-nuts] Adev, Mdev, and now Tdev
Date: Tue, 10 Apr 2007 11:11:08 +0100
Message-ID: [EMAIL PROTECTED]
Hello all,
Following on from the recent discussions of Adev and Mdev, I
have been hearing about Tdev recently - is this just another
Ulrich Bangert wrote:
Bruce,
the following is part of a discussion in comp.arch.fpga:
.
Hi,
I would like to know what are the common methods of introducing
delays as low as 10ps between two outputs in an FPGA. I do
Peter,
you can learn almost everything about any statistical measure that is
seriously used in stability measurements by looking into the STABLE32
user manual which can be downloaded from www.wriley.com/Manual146.pdf.
Everything is explained very clear there perhaps better than in some
textbook.
Tom's (tvb) plot I referred to in a previous message is at
http://www.leapsecond.com/pages/3gps/gps-adev-mdev.gif
Sorry for the confusion.
Phew, I was kind of worried there for a while. The ADEV plot showed three
straight parallel lines with no tendendency to converge.
Interesting to
Hi Tom:
Why is the Datum2000 so much better than the other receivers?
Brooke,
I think mostly because the three Motorola GPS receivers
in that plot are 1PPS OEM boards and the Datum 2000 is
a fancy GPSDO (Rb). So it's not a fair comparison; I just
wanted to show a baseline in the plot and the
My friends, if you worry about jitter there is a trick:
synchronize the signat to the clock with a D-type flip flop,
just at the output.
Maybe too trivial for you.
E.
Enrico Rubiola
professor of electronics
web:http://rubiola.org
e-mail: [EMAIL PROTECTED]
FEMTO-ST Institute
32 av. de
From: Tom Van Baak [EMAIL PROTECTED]
Subject: Re: [time-nuts] Oops - wrong URL for tvb plot!
Date: Tue, 10 Apr 2007 07:46:30 -0700
Message-ID: [EMAIL PROTECTED]
Tom's (tvb) plot I referred to in a previous message is at
http://www.leapsecond.com/pages/3gps/gps-adev-mdev.gif
Sorry for
Do you have a brand/model that you can get off the XL-DC power supply? I
would think Symmetricom would use the same model for the systems that fit in
that common 1U chassis (but I could be wrong). If the model matches mine, I
can tell you the voltages pins used and I'm sure you could find a cheap
From: Magnus Danielson [EMAIL PROTECTED]
Subject: Re: [time-nuts] Oops - wrong URL for tvb plot!
Date: Tue, 10 Apr 2007 17:28:40 +0200 (CEST)
Message-ID: [EMAIL PROTECTED]
From: Tom Van Baak [EMAIL PROTECTED]
Subject: Re: [time-nuts] Oops - wrong URL for tvb plot!
Date: Tue, 10 Apr 2007
Did you drift-rate compensate the measures before ADEV/MDEV them?
That's another real world effect one may need to handle. For GPS receivers
against a good reference (H/CS) it may not be such a big issue thought. It
should be interesting to pull the drift rate values out and plot them
Well who is in Vegas next week?
** See what's free at http://www.aol.com.
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From: Tom Van Baak [EMAIL PROTECTED]
Subject: Re: [time-nuts] Oops - wrong URL for tvb plot!
Date: Tue, 10 Apr 2007 09:27:08 -0700
Message-ID: [EMAIL PROTECTED]
Did you drift-rate compensate the measures before ADEV/MDEV them?
That's another real world effect one may need to handle. For GPS
I am, but I live here...
--- [EMAIL PROTECTED] wrote:
Well who is in Vegas next week?
** See what's
free at http://www.aol.com.
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I would like to know what are the common methods of introducing
delays as low as 10ps between two outputs in an FPGA. I do not
I'd try to make the delays within the FPGA the same and then tweak the
external trace lengths. At that level of detail, you will have to pay
attention to the
[context is avoiding hanging bridges]
Ovenize it to control the sawtooth frequency?
Temperature controlled oscillator! :-)
Should be fairly simple to acheive, really just a FLL.
I was wondering about that a while ago. Is the basic idea feasible?
Assume you had a good crystal with an A/D
I don't normally remove phase drift (frequency offset)
as this drops out of any adev calculation.
I was talking about frequency drift rate, it is usually shorted into drift
rate. This is not canceled at all by either ADEV or MDEV. Frequency offsets
cancel naturally.
Infact, if you send
Enrico Rubiola wrote:
My friends, if you worry about jitter there is a trick:
synchronize the signat to the clock with a D-type flip flop,
just at the output.
Maybe too trivial for you.
E.
Enrico Rubiola
professor of electronics
web: http://rubiola.org
e-mail: [EMAIL PROTECTED]
Hal Murray wrote:
I would like to know what are the common methods of introducing
delays as low as 10ps between two outputs in an FPGA. I do not
I'd try to make the delays within the FPGA the same and then tweak the
external trace lengths. At that level of detail, you will have to
From: Tom Van Baak [EMAIL PROTECTED]
Subject: Re: [time-nuts] Oops - wrong URL for tvb plot!
Date: Tue, 10 Apr 2007 14:26:27 -0700
Message-ID: [EMAIL PROTECTED]
Tom,
I can see the danger now of a plot without any accompanying text.
As always.
The raw data for the three 12 hour Motorola
Hal Murray wrote:
[context is avoiding hanging bridges]
Ovenize it to control the sawtooth frequency?
Temperature controlled oscillator! :-)
Should be fairly simple to acheive, really just a FLL.
I was wondering about that a while ago. Is the basic idea feasible?
Assume you had
From: Dr Bruce Griffiths [EMAIL PROTECTED]
Subject: Re: [time-nuts] Gate propagation delay jitter
Date: Wed, 11 Apr 2007 09:32:26 +1200
Message-ID: [EMAIL PROTECTED]
One of the wizards on the fpga newsgroup has a war story about clock jitter
due to outputs near the clock input switching. I
Then we would need to know/measure the jitter of the retiming
flipflop.
Expected values
microwave: -120 dBrad^2/Hz flicker, -150 dB white
RF:-140 dBrad^2/Hz flicker, -150 dB white
Use a double balanced mixer, traditional configuration.
A correlation scheme is probably not
Magnus Danielson wrote:
From: Enrico Rubiola [EMAIL PROTECTED]
Subject: Re: [time-nuts] Gate propagation delay jitter
Date: Wed, 11 Apr 2007 00:14:01 +0200
Message-ID: [EMAIL PROTECTED]
Enrico,
Then we would need to know/measure the jitter of the retiming
flipflop.
Expected
In a message dated 4/10/2007 14:48:34 Pacific Daylight Time,
[EMAIL PROTECTED] writes:
with a 53132A against a good atomic house standard. You'll
see a large phase offset (many microseconds), a frequency
offset (about +3e-12 or -3e-13). No, I didn't remove frequency
drift (if any) from the
In a message dated 4/10/2007 14:33:17 Pacific Daylight Time,
[EMAIL PROTECTED] writes:
Yes ground bounce can play havoc with the effective switching thresholds.
One would expect this effect to be much worse with single ended clocks.
Bruce
Hi Bruce,
not to give away too much, but in
[EMAIL PROTECTED] wrote:
In a message dated 4/10/2007 14:33:17 Pacific Daylight Time,
[EMAIL PROTECTED] writes:
Yes ground bounce can play havoc with the effective switching thresholds.
One would expect this effect to be much worse with single ended clocks.
Bruce
Hi Bruce,
[EMAIL PROTECTED] wrote:
In a message dated 4/10/2007 14:28:11 Pacific Daylight Time,
[EMAIL PROTECTED] writes:
Then we would need to know/measure the jitter of the retiming flipflop.
There appears to be little definitive published data on the jitter of
various logic gates and
I await Bob Paddock's circuit with bated breath.
Found a copy of the circuit I had in mind on line, look at figure #25:
http://www.linear-tech.co.jp/pc/downloadDocument.do?navId=H0,C1,C1155,C1001,C1158,P1442,D1594
That circuit has a few problems, it is also based on ten year old parts.
One
From: Tom Van Baak [EMAIL PROTECTED]
Subject: Re: [time-nuts] Oops - wrong URL for tvb plot!
Date: Tue, 10 Apr 2007 14:26:27 -0700
Message-ID: [EMAIL PROTECTED]
Tom,
I can see the danger now of a plot without any accompanying text.
The raw data for the three 12 hour Motorola receivers is here:
OK. I'll see what I can do. I beleive I already have something, but I think I
will have to massage it to do anything but ascii-tables.
The phase and frequency offsets will naturally be canceled out by ADEV and
MDEV. It is interesting to plot compensated and non-compensated data alongside
Said,
The nice thing about 1PPS measurements is that they are
known to be regular, in spite of delays in the counter or the
measurement system. For mid- or long-term analysis one
sample a second is more than enough. For example, if you're
making a tau 1 second to tau 1 day ADEV plot you don't
FYI -- Note that between 10,000 and 100,000 seconds, the uncalibrated
diurnal ionosphere signature just about doubles the noise level. The
GPS broadcast signals contain an approximate ionosphere correction
that is based on sunspot count, and most receivers follow the GPS
ICD200 recipe.
I'll try to answer several of the questions at one time
Brooke (no relation) Clarke
Why is the Datum2000 so much better than the other receivers?
It is a GPSDO. It is pretty obvious that the handover from the
2000's Rb to GPS is at ~1,000-10,000 seconds.
Brooks Shera:
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