Remy Bohmer wrote:
Hi Tom,
2009/11/6 Tom Rix t...@bumblecow.com:
Remy Bohmer wrote:
Hi Tom,
I would rather keep the patch set together.
OK.
My current work depends on it.
I am working with the usb/cdc branch to added gadget support for omap
and ultimately help mainline the usb/cdc
Hi List,
I am trying to compile U-Boot for beagleboard. I have run following
commands:
make CROSS_COMPILE=arm-none-linux-gnueabi- mrproper
make CROSS_COMPILE=arm-none-linux-gnueabi- omap3_beagle_config
make CROSS_COMPILE=arm-none-linux-gnueabi-
But it resulted in following error:
make[1]:
Chetan Nanda wrote:
Hi List,
I am trying to compile U-Boot for beagleboard. I have run following
commands:
make CROSS_COMPILE=arm-none-linux-gnueabi- mrproper
make CROSS_COMPILE=arm-none-linux-gnueabi- omap3_beagle_config
make CROSS_COMPILE=arm-none-linux-gnueabi-
But it resulted in
Remove SDP referenced unused defines
Signed-off-by: Nishanth Menon n...@ti.com
---
cpu/arm_cortexa8/omap3/mem.c |2 +-
cpu/arm_cortexa8/omap3/sys_info.c |2 +-
include/asm-arm/arch-omap3/mem.h | 11 ++-
3 files changed, 4 insertions(+), 11 deletions(-)
Pushed
Micron DDR timings based on:
http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-
omap3.git;a=blob;f=include/asm/arch-
omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD
Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
Paulraj, Sandeep wrote:
Micron DDR timings based on:
http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-
omap3.git;a=blob;f=include/asm/arch-
omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD
Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and
Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
options to allow for platform files to setup their timings as
per the type of DDR selected
Reported-by: Steve Sakoman in
From: Sandeep Paulraj s-paul...@ti.com
This patch updates the chip_shift calculation in the
NAND driver. This is being done to sync up the NAND driver with
the kernel NAND driver.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
drivers/mtd/nand/nand_base.c |2 +-
1 files changed, 1
From: Sandeep Paulraj s-paul...@ti.com
Patch removes already commented out dead code
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
drivers/mtd/nand/nand_base.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c
From: Sandeep Paulraj s-paul...@ti.com
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
From: Sandeep Paulraj s-paul...@ti.com
Patch updates the comments and explanations for
the arguments to various functions.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
drivers/mtd/nand/nand_base.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git
From: Sandeep Paulraj s-paul...@ti.com
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
drivers/mtd/nand/nand_base.c |2 +-
1 files
From: Sandeep Paulraj s-paul...@ti.com
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
This particular issue was found while
From: David Brownell dbrown...@users.sourceforge.net
The syndrome based page read/write routines store ECC, and possibly other
OOB data, right after each chunk of ECC'd data. With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:
data-0 OOB-0 data-1 OOB-1 data-2 OOB-2
Dear Wolfgang Denk,
i still working on replacing AT91 defs by C structures.
But I have a problem with lowlevel_init.s files
Both AT91 and AT91RM9200 use the register defines here.
The C header files have a
#ifndef __assembly
...
#endif
to prevent assembler error.
My Question:
Should we move
Quick head up.
I submitted this patch to the u-boot mailing list on David Brownell's behalf.
Sandeep
Subject: [U-Boot] [PATCH] NAND: fix raw reads with ECC syndrome layouts
From: David Brownell dbrown...@users.sourceforge.net
The syndrome based page read/write routines store ECC, and
On Sat, Nov 7, 2009 at 10:15 AM, Paulraj, Sandeep s-paul...@ti.com wrote:
Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
options to allow for platform files to setup their timings as
per the type of DDR selected
Reported-by:
On Saturday 07 November 2009, Paulraj, Sandeep wrote:
Quick head up.
I submitted this patch to the u-boot mailing list on David Brownell's behalf.
Sandeep
You should *NEVER* forge From addresses like spammers do.
___
U-Boot mailing list
From: David Brownell dbrown...@users.sourceforge.net
The syndrome based page read/write routines store ECC, and possibly other
OOB data, right after each chunk of ECC'd data. With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:
data-0 OOB-0 data-1 OOB-1 data-2 OOB-2
Subject: Re: [U-Boot] [PATCH] NAND: fix raw reads with ECC syndrome
layouts
On Saturday 07 November 2009, Paulraj, Sandeep wrote:
Quick head up.
I submitted this patch to the u-boot mailing list on David Brownell's
behalf.
Sandeep
You should *NEVER* forge From addresses like
Remy Bohmer wrote:
Hi,
[patch] ARM: Use Linux version for unaligned access code
This one is in arm/next
http://lists.denx.de/pipermail/u-boot/2009-October/063437.html
Well, I thought we agreed to include (the updated version from Stefan)
in the current release?
Remy
Wolfgang,
I
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